CPLD_DIUCSR 51 arch/powerpc/platforms/85xx/t1042rdb_diu.c clrbits8(cpld_base + CPLD_DIUCSR, CPLD_DIUCSR_DVIEN); CPLD_DIUCSR 59 arch/powerpc/platforms/85xx/t1042rdb_diu.c setbits8(cpld_base + CPLD_DIUCSR, 0x01 << 8); CPLD_DIUCSR 60 arch/powerpc/platforms/85xx/t1042rdb_diu.c setbits8(cpld_base + CPLD_DIUCSR, 0x01 << 4); CPLD_DIUCSR 61 arch/powerpc/platforms/85xx/t1042rdb_diu.c setbits8(cpld_base + CPLD_DIUCSR, CPLD_DIUCSR_BACKLIGHT);