CPHYSADDR 109 arch/mips/alchemy/common/clock.c #define IOMEM(x) ((void __iomem *)(KSEG1ADDR(CPHYSADDR(x)))) CPHYSADDR 37 arch/mips/alchemy/common/platform.c alchemy_uart_enable(CPHYSADDR(port->membase)); CPHYSADDR 42 arch/mips/alchemy/common/platform.c alchemy_uart_disable(CPHYSADDR(port->membase)); CPHYSADDR 33 arch/mips/alchemy/devboards/bcsr.c bcsr1_phys = KSEG1ADDR(CPHYSADDR(bcsr1_phys)); CPHYSADDR 34 arch/mips/alchemy/devboards/bcsr.c bcsr2_phys = KSEG1ADDR(CPHYSADDR(bcsr2_phys)); CPHYSADDR 24 arch/mips/ar7/memory.c u32 *kernel_end = (u32 *)KSEG1ADDR(CPHYSADDR((u32)&_end)); CPHYSADDR 76 arch/mips/bcm47xx/prom.c off = CPHYSADDR((unsigned long)prom_init); CPHYSADDR 106 arch/mips/dec/kn01-berr.c address = CPHYSADDR(vaddr); CPHYSADDR 45 arch/mips/dec/tc.c tbus->slot_base = CPHYSADDR((long)rex_slot_address(0)); CPHYSADDR 73 arch/mips/include/asm/addrspace.h #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) CPHYSADDR 74 arch/mips/include/asm/addrspace.h #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) CPHYSADDR 75 arch/mips/include/asm/addrspace.h #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2) CPHYSADDR 76 arch/mips/include/asm/addrspace.h #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3) CPHYSADDR 80 arch/mips/include/asm/addrspace.h #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) CPHYSADDR 81 arch/mips/include/asm/addrspace.h #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) CPHYSADDR 82 arch/mips/include/asm/addrspace.h #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) CPHYSADDR 83 arch/mips/include/asm/addrspace.h #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) CPHYSADDR 88 arch/mips/include/asm/addrspace.h #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) CPHYSADDR 89 arch/mips/include/asm/addrspace.h #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) CPHYSADDR 90 arch/mips/include/asm/addrspace.h #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) CPHYSADDR 91 arch/mips/include/asm/addrspace.h #define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) CPHYSADDR 242 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(CPHYSADDR(chan->fifo_addr), chan->io + DMA_PERIPHERAL_ADDR); CPHYSADDR 307 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(CPHYSADDR(a), chan->io + DMA_PERIPHERAL_ADDR); CPHYSADDR 20 arch/mips/include/asm/mach-dec/mc146818rtc.h #define RTC_PORT(x) CPHYSADDR((long)dec_rtc_base) CPHYSADDR 68 arch/mips/include/asm/mach-jazz/floppy.h vdma_set_addr(JAZZ_FLOPPY_DMA, vdma_phys2log(CPHYSADDR((unsigned long)a))); CPHYSADDR 112 arch/mips/include/asm/mach-jazz/floppy.h vdma_alloc(CPHYSADDR(mem), size); /* XXX error checking */ CPHYSADDR 119 arch/mips/include/asm/mach-jazz/floppy.h vdma_free(vdma_phys2log(CPHYSADDR(addr))); CPHYSADDR 179 arch/mips/include/asm/page.h return x < CKSEG0 ? XPHYSADDR(x) : CPHYSADDR(x); CPHYSADDR 189 arch/mips/include/asm/page.h return CPHYSADDR(x); CPHYSADDR 85 arch/mips/jazz/jazzdma.c CPHYSADDR((unsigned long)pgtbl)); CPHYSADDR 30 arch/mips/kvm/trap_emul.c gpa = CPHYSADDR(gva); CPHYSADDR 62 arch/mips/lantiq/prom.c if (CPHYSADDR(p) && *p) { CPHYSADDR 32 arch/mips/lantiq/xway/vmmc.c (void *) CPHYSADDR(dma_alloc_coherent(&pdev->dev, CP1_SIZE, CPHYSADDR 628 arch/mips/mm/page.c u64 to_phys = CPHYSADDR((unsigned long)page); CPHYSADDR 653 arch/mips/mm/page.c u64 from_phys = CPHYSADDR((unsigned long)from); CPHYSADDR 654 arch/mips/mm/page.c u64 to_phys = CPHYSADDR((unsigned long)to); CPHYSADDR 93 arch/mips/netlogic/xlr/platform.c xlr_uart_data[0].mapbase = CPHYSADDR(uartbase); CPHYSADDR 97 arch/mips/netlogic/xlr/platform.c xlr_uart_data[1].mapbase = CPHYSADDR(uartbase); CPHYSADDR 180 arch/mips/netlogic/xlr/platform.c memres = CPHYSADDR((unsigned long)usb_mmio); CPHYSADDR 237 arch/mips/netlogic/xlr/platform.c nlm_xlr_i2c_1.resource[0].start = CPHYSADDR(nlm_mmio_base(offset)); CPHYSADDR 100 arch/mips/pci/pci-malta.c GT_WRITE(GT_PCI0_CFGDATA_OFS, CPHYSADDR(MIPS_GT_BASE)); CPHYSADDR 453 arch/mips/pmcs-msp71xx/msp_prom.c memsize = CPHYSADDR(memsize); CPHYSADDR 458 arch/mips/pmcs-msp71xx/msp_prom.c heaptop = CPHYSADDR((u32)&_text); CPHYSADDR 469 arch/mips/pmcs-msp71xx/msp_prom.c heaptop = CPHYSADDR((u32)&_text); CPHYSADDR 474 arch/mips/pmcs-msp71xx/msp_prom.c heaptop = CPHYSADDR((u32)heaptop); CPHYSADDR 493 arch/mips/pmcs-msp71xx/msp_prom.c if (heaptop != CPHYSADDR((u32)_text)) { CPHYSADDR 497 arch/mips/pmcs-msp71xx/msp_prom.c mdesc[i].size = CPHYSADDR((u32)_text) - mdesc[i].base; CPHYSADDR 503 arch/mips/pmcs-msp71xx/msp_prom.c mdesc[i].base = CPHYSADDR((u32)_text); CPHYSADDR 504 arch/mips/pmcs-msp71xx/msp_prom.c mdesc[i].size = CPHYSADDR(PAGE_ALIGN((u32)_end)) - mdesc[i].base; CPHYSADDR 53 arch/mips/ralink/prom.c if (CPHYSADDR(p) && *p) { CPHYSADDR 414 arch/mips/sgi-ip22/ip28-berr.c CPHYSADDR(hp->addr), hp->ctrl, hp->ndptr, hp->cbp); CPHYSADDR 95 arch/mips/sibyte/common/cfe.c initrd_pstart = CPHYSADDR(initrd_start); CPHYSADDR 96 arch/mips/sibyte/common/cfe.c initrd_pend = CPHYSADDR(initrd_end); CPHYSADDR 213 arch/mips/txx9/rbtx4938/setup.c rbtx4938_fpga_resource.start = CPHYSADDR(RBTX4938_FPGA_REG_ADDR); CPHYSADDR 214 arch/mips/txx9/rbtx4938/setup.c rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff; CPHYSADDR 96 drivers/gpio/gpio-mm-lantiq.c ltq_ebu_w32(CPHYSADDR(chip->mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1); CPHYSADDR 328 drivers/ide/au1xxx-ide.c dev->dev_physaddr = CPHYSADDR(regbase); CPHYSADDR 118 drivers/mtd/maps/pmcmsp-flash.c addr = CPHYSADDR(addr); CPHYSADDR 195 drivers/mtd/nand/raw/xway_nand.c ltq_ebu_w32(CPHYSADDR(data->nandaddr) CPHYSADDR 1108 drivers/net/ethernet/amd/declance.c CPHYSADDR(dev->mem_start) << 3); CPHYSADDR 189 drivers/net/ethernet/korina.c korina_start_dma(lp->rx_dma_regs, CPHYSADDR(rd)); CPHYSADDR 195 drivers/net/ethernet/korina.c korina_chain_dma(lp->rx_dma_regs, CPHYSADDR(rd)); CPHYSADDR 235 drivers/net/ethernet/korina.c td->ca = CPHYSADDR(skb->data); CPHYSADDR 247 drivers/net/ethernet/korina.c writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]), CPHYSADDR 259 drivers/net/ethernet/korina.c lp->td_ring[chain_prev].link = CPHYSADDR(td); CPHYSADDR 263 drivers/net/ethernet/korina.c writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]), CPHYSADDR 283 drivers/net/ethernet/korina.c lp->td_ring[chain_prev].link = CPHYSADDR(td); CPHYSADDR 429 drivers/net/ethernet/korina.c rd->ca = CPHYSADDR(skb_new->data); CPHYSADDR 431 drivers/net/ethernet/korina.c rd->ca = CPHYSADDR(skb->data); CPHYSADDR 454 drivers/net/ethernet/korina.c rd->ca = CPHYSADDR(skb->data); CPHYSADDR 625 drivers/net/ethernet/korina.c writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]), CPHYSADDR 768 drivers/net/ethernet/korina.c lp->rd_ring[i].ca = CPHYSADDR(skb->data); CPHYSADDR 769 drivers/net/ethernet/korina.c lp->rd_ring[i].link = CPHYSADDR(&lp->rd_ring[i+1]); CPHYSADDR 774 drivers/net/ethernet/korina.c lp->rd_ring[i - 1].link = CPHYSADDR(&lp->rd_ring[0]); CPHYSADDR 114 drivers/net/ethernet/lantiq_etop.c CPHYSADDR(ch->skb[ch->dma.desc]->data); CPHYSADDR 476 drivers/net/ethernet/lantiq_etop.c byte_offset = CPHYSADDR(skb->data) % 16; CPHYSADDR 54 drivers/staging/netlogic/platform_net.c res->start = CPHYSADDR(nlm_mmio_base(offset)); CPHYSADDR 82 drivers/staging/netlogic/platform_net.c ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GMAC_4_OFFSET)), CPHYSADDR 110 drivers/staging/netlogic/platform_net.c ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), CPHYSADDR 130 drivers/staging/netlogic/platform_net.c ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GPIO_OFFSET)), CPHYSADDR 192 drivers/staging/netlogic/platform_net.c ioremap(CPHYSADDR(nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), CPHYSADDR 851 drivers/tty/serial/lantiq.c if (mmres->start == CPHYSADDR(LTQ_EARLY_ASC)) CPHYSADDR 14 include/linux/lantiq.h #ifndef CPHYSADDR