mvreg_read 693 drivers/net/ethernet/marvell/mvneta.c dummy = mvreg_read(pp, (MVNETA_MIB_COUNTERS_BASE + i)); mvreg_read 694 drivers/net/ethernet/marvell/mvneta.c dummy = mvreg_read(pp, MVNETA_RX_DISCARD_FRAME_COUNT); mvreg_read 695 drivers/net/ethernet/marvell/mvneta.c dummy = mvreg_read(pp, MVNETA_OVERRUN_FRAME_COUNT); mvreg_read 776 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_RXQ_STATUS_REG(rxq->id)); mvreg_read 832 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_GMAC_CTRL_0); mvreg_read 847 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); mvreg_read 904 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_RXQ_SIZE_REG(rxq->id)); mvreg_read 918 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); mvreg_read 929 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); mvreg_read 940 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); mvreg_read 953 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); mvreg_read 974 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_PORT_POOL_BUFFER_SZ_REG(pool_id)); mvreg_read 986 drivers/net/ethernet/marvell/mvneta.c win_enable = mvreg_read(pp, MVNETA_BASE_ADDR_ENABLE); mvreg_read 1013 drivers/net/ethernet/marvell/mvneta.c win_protect = mvreg_read(pp, MVNETA_ACCESS_PROTECT_ENABLE); mvreg_read 1179 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_RXQ_CMD) & MVNETA_RXQ_ENABLE_MASK; mvreg_read 1197 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_RXQ_CMD); mvreg_read 1203 drivers/net/ethernet/marvell/mvneta.c val = (mvreg_read(pp, MVNETA_TXQ_CMD)) & MVNETA_TXQ_ENABLE_MASK; mvreg_read 1221 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_TXQ_CMD); mvreg_read 1236 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_PORT_STATUS); mvreg_read 1249 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_GMAC_CTRL_0); mvreg_read 1260 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_GMAC_CTRL_0); mvreg_read 1471 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_UNIT_CONTROL); mvreg_read 1499 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_TX_MTU); mvreg_read 1505 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_TX_TOKEN_SIZE); mvreg_read 1515 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_TXQ_TOKEN_SIZE_REG(queue)); mvreg_read 1544 drivers/net/ethernet/marvell/mvneta.c unicast_reg = mvreg_read(pp, (MVNETA_DA_FILT_UCAST_BASE + tbl_offset)); mvreg_read 1608 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_TXQ_SIZE_REG(txq->id)); mvreg_read 1653 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_TXQ_STATUS_REG(txq->id)); mvreg_read 2585 drivers/net/ethernet/marvell/mvneta.c smc_table_reg = mvreg_read(pp, (MVNETA_DA_FILT_SPEC_MCAST mvreg_read 2618 drivers/net/ethernet/marvell/mvneta.c omc_table_reg = mvreg_read(pp, MVNETA_DA_FILT_OTH_MCAST + tbl_offset); mvreg_read 2679 drivers/net/ethernet/marvell/mvneta.c port_cfg_reg = mvreg_read(pp, MVNETA_PORT_CONFIG); mvreg_read 2681 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_TYPE_PRIO); mvreg_read 2761 drivers/net/ethernet/marvell/mvneta.c u32 gmac_stat = mvreg_read(pp, MVNETA_GMAC_STATUS); mvreg_read 2787 drivers/net/ethernet/marvell/mvneta.c cause_rx_tx = mvreg_read(pp, MVNETA_INTR_NEW_CAUSE); mvreg_read 2789 drivers/net/ethernet/marvell/mvneta.c u32 cause_misc = mvreg_read(pp, MVNETA_INTR_MISC_CAUSE); mvreg_read 3344 drivers/net/ethernet/marvell/mvneta.c mac_addr_l = mvreg_read(pp, MVNETA_MAC_ADDR_LOW); mvreg_read 3345 drivers/net/ethernet/marvell/mvneta.c mac_addr_h = mvreg_read(pp, MVNETA_MAC_ADDR_HIGH); mvreg_read 3435 drivers/net/ethernet/marvell/mvneta.c gmac_stat = mvreg_read(pp, MVNETA_GMAC_STATUS); mvreg_read 3463 drivers/net/ethernet/marvell/mvneta.c u32 gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); mvreg_read 3476 drivers/net/ethernet/marvell/mvneta.c u32 new_ctrl0, gmac_ctrl0 = mvreg_read(pp, MVNETA_GMAC_CTRL_0); mvreg_read 3477 drivers/net/ethernet/marvell/mvneta.c u32 new_ctrl2, gmac_ctrl2 = mvreg_read(pp, MVNETA_GMAC_CTRL_2); mvreg_read 3478 drivers/net/ethernet/marvell/mvneta.c u32 new_ctrl4, gmac_ctrl4 = mvreg_read(pp, MVNETA_GMAC_CTRL_4); mvreg_read 3479 drivers/net/ethernet/marvell/mvneta.c u32 new_clk, gmac_clk = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); mvreg_read 3480 drivers/net/ethernet/marvell/mvneta.c u32 new_an, gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); mvreg_read 3586 drivers/net/ethernet/marvell/mvneta.c while ((mvreg_read(pp, MVNETA_GMAC_CTRL_2) & mvreg_read 3596 drivers/net/ethernet/marvell/mvneta.c lpi_ctl1 = mvreg_read(pp, MVNETA_LPI_CTRL_1); mvreg_read 3614 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); mvreg_read 3633 drivers/net/ethernet/marvell/mvneta.c val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); mvreg_read 3713 drivers/net/ethernet/marvell/mvneta.c txq_map = mvreg_read(pp, MVNETA_CPU_MAP(cpu)) & mvreg_read 4301 drivers/net/ethernet/marvell/mvneta.c lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0); mvreg_read 4322 drivers/net/ethernet/marvell/mvneta.c lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0);