mvpp2_prs_sram_bits_set  234 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 			mvpp2_prs_sram_bits_set(pe, MVPP2_PRS_SRAM_RI_OFFS + i,
mvpp2_prs_sram_bits_set  241 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 		mvpp2_prs_sram_bits_set(pe, MVPP2_PRS_SRAM_RI_CTRL_OFFS + i, 1);
mvpp2_prs_sram_bits_set  262 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 			mvpp2_prs_sram_bits_set(pe, MVPP2_PRS_SRAM_AI_OFFS + i,
mvpp2_prs_sram_bits_set  269 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 		mvpp2_prs_sram_bits_set(pe, MVPP2_PRS_SRAM_AI_CTRL_OFFS + i, 1);
mvpp2_prs_sram_bits_set  297 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(pe, sram_next_off, lu);
mvpp2_prs_sram_bits_set  308 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 		mvpp2_prs_sram_bits_set(pe, MVPP2_PRS_SRAM_SHIFT_SIGN_BIT, 1);
mvpp2_prs_sram_bits_set  321 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(pe, MVPP2_PRS_SRAM_OP_SEL_SHIFT_OFFS, op);
mvpp2_prs_sram_bits_set  336 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 		mvpp2_prs_sram_bits_set(pe, MVPP2_PRS_SRAM_UDF_SIGN_BIT, 1);
mvpp2_prs_sram_bits_set  345 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(pe, MVPP2_PRS_SRAM_UDF_OFFS,
mvpp2_prs_sram_bits_set  351 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(pe, MVPP2_PRS_SRAM_UDF_TYPE_OFFS, type);
mvpp2_prs_sram_bits_set  356 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(pe, MVPP2_PRS_SRAM_OP_SEL_UDF_OFFS,
mvpp2_prs_sram_bits_set  426 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 		mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
mvpp2_prs_sram_bits_set  972 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
mvpp2_prs_sram_bits_set 1008 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
mvpp2_prs_sram_bits_set 1110 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 		mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_DONE_BIT, 1);
mvpp2_prs_sram_bits_set 1154 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
mvpp2_prs_sram_bits_set 1326 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
mvpp2_prs_sram_bits_set 1356 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
mvpp2_prs_sram_bits_set 1477 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
mvpp2_prs_sram_bits_set 1677 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
mvpp2_prs_sram_bits_set 1757 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
mvpp2_prs_sram_bits_set 1825 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
mvpp2_prs_sram_bits_set 1846 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
mvpp2_prs_sram_bits_set 1870 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1);
mvpp2_prs_sram_bits_set 2431 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 	mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_DONE_BIT, 1);
mvpp2_prs_sram_bits_set 2469 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 		mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_DONE_BIT, 1);