mul 70 arch/mips/ar7/clock.c u32 mul; mul 99 arch/mips/ar7/clock.c int *postdiv, int *mul) mul 108 arch/mips/ar7/clock.c *mul = i; mul 116 arch/mips/ar7/clock.c int *mul) mul 123 arch/mips/ar7/clock.c *mul = target / tmp_gcd; mul 125 arch/mips/ar7/clock.c if ((*mul < 1) || (*mul >= 16)) mul 131 arch/mips/ar7/clock.c if (base / *prediv * *mul / *postdiv != target) { mul 132 arch/mips/ar7/clock.c approximate(base, target, prediv, postdiv, mul); mul 133 arch/mips/ar7/clock.c tmp_freq = base / *prediv * *mul / *postdiv; mul 140 arch/mips/ar7/clock.c *prediv, *postdiv, *mul); mul 169 arch/mips/ar7/clock.c int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1; mul 190 arch/mips/ar7/clock.c return (base_clock >> (mul / 16 + 1)) / divisor; mul 193 arch/mips/ar7/clock.c product = (mul & 1) ? mul 194 arch/mips/ar7/clock.c (base_clock * mul) >> 1 : mul 195 arch/mips/ar7/clock.c (base_clock * (mul - 1)) >> 2; mul 199 arch/mips/ar7/clock.c if (mul == 16) mul 202 arch/mips/ar7/clock.c return base_clock * mul / divisor; mul 208 arch/mips/ar7/clock.c int prediv, postdiv, mul; mul 226 arch/mips/ar7/clock.c calculate(base_clock, frequency, &prediv, &postdiv, &mul); mul 233 arch/mips/ar7/clock.c writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll); mul 262 arch/mips/ar7/clock.c int prediv, int postdiv, int postdiv2, int mul, u32 frequency) mul 267 arch/mips/ar7/clock.c base, frequency, prediv, postdiv, postdiv2, mul); mul 271 arch/mips/ar7/clock.c writel((mul - 1) & 0xF, &clock->mul); mul 263 arch/mips/include/asm/octeon/cvmx-spxx-defs.h uint64_t mul:1; mul 273 arch/mips/include/asm/octeon/cvmx-spxx-defs.h uint64_t mul:1; mul 961 arch/mips/net/ebpf_jit.c emit_instr(ctx, mul, dst, dst, src); mul 368 arch/mips/ralink/mt7620.c mt7620_calc_rate(u32 ref_rate, u32 mul, u32 div) mul 373 arch/mips/ralink/mt7620.c t *= mul; mul 411 arch/mips/ralink/mt7620.c u32 mul; mul 421 arch/mips/ralink/mt7620.c mul = (reg >> CPLL_CFG0_PLL_MULT_RATIO_SHIFT) & mul 423 arch/mips/ralink/mt7620.c mul += 24; mul 425 arch/mips/ralink/mt7620.c mul *= 2; mul 432 arch/mips/ralink/mt7620.c return mt7620_calc_rate(xtal_rate, mul, mt7620_clk_divider[div]); mul 454 arch/mips/ralink/mt7620.c u32 mul; mul 459 arch/mips/ralink/mt7620.c mul = reg & CPU_SYS_CLKCFG_CPU_FFRAC_MASK; mul 463 arch/mips/ralink/mt7620.c return mt7620_calc_rate(pll_rate, mul, div); mul 225 arch/powerpc/platforms/512x/clock-commonclk.c int mul, int div) mul 231 arch/powerpc/platforms/512x/clock-commonclk.c mul, div); mul 707 arch/powerpc/platforms/512x/clock-commonclk.c int mul, div; mul 778 arch/powerpc/platforms/512x/clock-commonclk.c mul = get_cpmf_mult_x2(); mul 780 arch/powerpc/platforms/512x/clock-commonclk.c clks[MPC512x_CLK_E300] = mpc512x_clk_factor("e300", "csb", mul, div); mul 2901 arch/powerpc/platforms/powernv/pci-ioda.c int mul, total_vfs; mul 2908 arch/powerpc/platforms/powernv/pci-ioda.c mul = phb->ioda.total_pe_num; mul 2938 arch/powerpc/platforms/powernv/pci-ioda.c mul = roundup_pow_of_two(total_vfs); mul 2941 arch/powerpc/platforms/powernv/pci-ioda.c total_vf_bar_sz, gate, mul); mul 2960 arch/powerpc/platforms/powernv/pci-ioda.c res->end = res->start + size * mul - 1; mul 2963 arch/powerpc/platforms/powernv/pci-ioda.c i, res, mul); mul 2965 arch/powerpc/platforms/powernv/pci-ioda.c pdn->vfs_expanded = mul; mul 38 arch/x86/include/asm/asm.h #define _ASM_MUL __ASM_SIZE(mul) mul 77 arch/x86/include/asm/div64.h static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 div) mul 82 arch/x86/include/asm/div64.h : "a" (a), "rm" ((u64)mul), "rm" ((u64)div) mul 1000 arch/x86/kvm/emulate.c FASTOP1SRC2(mul, mul_ex); mul 397 crypto/tgr192.c static void tgr192_round(u64 * ra, u64 * rb, u64 * rc, u64 x, int mul) mul 408 crypto/tgr192.c b *= mul; mul 416 crypto/tgr192.c static void tgr192_pass(u64 * ra, u64 * rb, u64 * rc, u64 * x, int mul) mul 422 crypto/tgr192.c tgr192_round(&a, &b, &c, x[0], mul); mul 423 crypto/tgr192.c tgr192_round(&b, &c, &a, x[1], mul); mul 424 crypto/tgr192.c tgr192_round(&c, &a, &b, x[2], mul); mul 425 crypto/tgr192.c tgr192_round(&a, &b, &c, x[3], mul); mul 426 crypto/tgr192.c tgr192_round(&b, &c, &a, x[4], mul); mul 427 crypto/tgr192.c tgr192_round(&c, &a, &b, x[5], mul); mul 428 crypto/tgr192.c tgr192_round(&a, &b, &c, x[6], mul); mul 429 crypto/tgr192.c tgr192_round(&b, &c, &a, x[7], mul); mul 29 drivers/clk/actions/owl-factor.c unsigned int val, unsigned int *mul, unsigned int *div) mul 35 drivers/clk/actions/owl-factor.c *mul = clkt->mul; mul 52 drivers/clk/actions/owl-factor.c calc_rate = parent_rate * clkt->mul; mul 86 drivers/clk/actions/owl-factor.c try_parent_rate = rate * clkt->div / clkt->mul; mul 90 drivers/clk/actions/owl-factor.c __func__, clkt->val, clkt->mul, clkt->div, mul 103 drivers/clk/actions/owl-factor.c cur_rate = DIV_ROUND_UP(parent_rate, clkt->div) * clkt->mul; mul 126 drivers/clk/actions/owl-factor.c unsigned int val, mul = 0, div = 1; mul 129 drivers/clk/actions/owl-factor.c _get_table_div_mul(clkt, val, &mul, &div); mul 131 drivers/clk/actions/owl-factor.c return *parent_rate * mul / div; mul 150 drivers/clk/actions/owl-factor.c u32 reg, val, mul, div; mul 153 drivers/clk/actions/owl-factor.c mul = 0; mul 160 drivers/clk/actions/owl-factor.c _get_table_div_mul(clkt, val, &mul, &div); mul 168 drivers/clk/actions/owl-factor.c rate = (unsigned long long int)parent_rate * mul; mul 18 drivers/clk/actions/owl-factor.h unsigned int mul; mul 20 drivers/clk/actions/owl-pll.c u32 mul; mul 22 drivers/clk/actions/owl-pll.c mul = DIV_ROUND_CLOSEST(rate, pll_hw->bfreq); mul 23 drivers/clk/actions/owl-pll.c if (mul < pll_hw->min_mul) mul 24 drivers/clk/actions/owl-pll.c mul = pll_hw->min_mul; mul 25 drivers/clk/actions/owl-pll.c else if (mul > pll_hw->max_mul) mul 26 drivers/clk/actions/owl-pll.c mul = pll_hw->max_mul; mul 28 drivers/clk/actions/owl-pll.c return mul &= mul_mask(pll_hw); mul 65 drivers/clk/actions/owl-pll.c u32 mul; mul 76 drivers/clk/actions/owl-pll.c mul = owl_pll_calculate_mul(pll_hw, rate); mul 78 drivers/clk/actions/owl-pll.c return pll_hw->bfreq * mul; mul 40 drivers/clk/at91/clk-pll.c u16 mul; mul 68 drivers/clk/at91/clk-pll.c u16 mul; mul 72 drivers/clk/at91/clk-pll.c mul = PLL_MUL(pllr, layout); mul 76 drivers/clk/at91/clk-pll.c (div == pll->div && mul == pll->mul)) mul 89 drivers/clk/at91/clk-pll.c ((pll->mul & layout->mul_mask) << layout->mul_shift)); mul 117 drivers/clk/at91/clk-pll.c if (!pll->div || !pll->mul) mul 120 drivers/clk/at91/clk-pll.c return (parent_rate / pll->div) * (pll->mul + 1); mul 125 drivers/clk/at91/clk-pll.c u32 *div, u32 *mul, mul 225 drivers/clk/at91/clk-pll.c if (mul) mul 226 drivers/clk/at91/clk-pll.c *mul = bestmul - 1; mul 248 drivers/clk/at91/clk-pll.c u32 mul; mul 252 drivers/clk/at91/clk-pll.c &div, &mul, &index); mul 258 drivers/clk/at91/clk-pll.c pll->mul = mul; mul 305 drivers/clk/at91/clk-pll.c pll->mul = PLL_MUL(pllr, layout); mul 52 drivers/clk/at91/clk-sam9x60-pll.c u16 mul; mul 72 drivers/clk/at91/clk-sam9x60-pll.c u16 mul; mul 82 drivers/clk/at91/clk-sam9x60-pll.c mul = FIELD_GET(PMC_PLL_CTRL1_MUL_MSK, val); mul 85 drivers/clk/at91/clk-sam9x60-pll.c (div == pll->div && mul == pll->mul)) { mul 95 drivers/clk/at91/clk-sam9x60-pll.c FIELD_PREP(PMC_PLL_CTRL1_MUL_MSK, pll->mul)); mul 168 drivers/clk/at91/clk-sam9x60-pll.c return (parent_rate * (pll->mul + 1)) / (pll->div + 1); mul 253 drivers/clk/at91/clk-sam9x60-pll.c pll->mul = bestmul - 1; mul 319 drivers/clk/at91/clk-sam9x60-pll.c pll->mul = FIELD_GET(PMC_PLL_CTRL1_MUL_MSK, pllr); mul 73 drivers/clk/clk-cdce706.c unsigned mul; mul 169 drivers/clk/clk-cdce706.c __func__, hwd->idx, hwd->mux, hwd->mul, hwd->div); mul 172 drivers/clk/clk-cdce706.c if (hwd->div && hwd->mul) { mul 173 drivers/clk/clk-cdce706.c u64 res = (u64)parent_rate * hwd->mul; mul 189 drivers/clk/clk-cdce706.c unsigned long mul, div; mul 198 drivers/clk/clk-cdce706.c &mul, &div); mul 199 drivers/clk/clk-cdce706.c hwd->mul = mul; mul 204 drivers/clk/clk-cdce706.c __func__, hwd->idx, mul, div); mul 206 drivers/clk/clk-cdce706.c res = (u64)*parent_rate * hwd->mul; mul 215 drivers/clk/clk-cdce706.c unsigned long mul = hwd->mul, div = hwd->div; mul 220 drivers/clk/clk-cdce706.c __func__, hwd->idx, mul, div); mul 226 drivers/clk/clk-cdce706.c ((mul >> (8 - CDCE706_PLL_HI_N_SHIFT)) & mul 239 drivers/clk/clk-cdce706.c mul & CDCE706_PLL_LOW_N_MASK); mul 295 drivers/clk/clk-cdce706.c unsigned long mul, div; mul 303 drivers/clk/clk-cdce706.c &mul, &div); mul 304 drivers/clk/clk-cdce706.c if (!mul) mul 538 drivers/clk/clk-cdce706.c cdce->pll[i].mul = n | ((v & CDCE706_PLL_HI_N_MASK) << mul 543 drivers/clk/clk-cdce706.c cdce->pll[i].div, cdce->pll[i].mul, cdce->pll[i].mux); mul 24 drivers/clk/clk-moxart.c unsigned int mul; mul 37 drivers/clk/clk-moxart.c mul = readl(base + 0x30) >> 3 & 0x3f; mul 46 drivers/clk/clk-moxart.c hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, mul, 1); mul 227 drivers/clk/clk-nomadik.c u8 mul; mul 230 drivers/clk/clk-nomadik.c mul = (val >> 8) & 0x3FU; mul 231 drivers/clk/clk-nomadik.c mul += 2; mul 233 drivers/clk/clk-nomadik.c return (parent_rate * mul) >> div; mul 237 drivers/clk/clk-nomadik.c u8 mul; mul 239 drivers/clk/clk-nomadik.c mul = (val >> 24) & 0x3FU; mul 240 drivers/clk/clk-nomadik.c mul += 2; mul 241 drivers/clk/clk-nomadik.c return (parent_rate * mul); mul 438 drivers/clk/clk-stm32h7.c u32 mul; mul 444 drivers/clk/clk-stm32h7.c mul = 2; mul 447 drivers/clk/clk-stm32h7.c mul = 1; mul 450 drivers/clk/clk-stm32h7.c mul = 4; mul 452 drivers/clk/clk-stm32h7.c return parent_rate * mul; mul 975 drivers/clk/clk-stm32mp1.c u32 mul; mul 984 drivers/clk/clk-stm32mp1.c mul = (timpre + 1) * 2; mul 986 drivers/clk/clk-stm32mp1.c return parent_rate * mul; mul 25 drivers/clk/clk-tango4.c u32 val, mul, div; mul 29 drivers/clk/clk-tango4.c mul = extract_pll_n(val) + 1; mul 31 drivers/clk/clk-tango4.c clk_register_fixed_factor(NULL, name, parent, 0, mul, div); mul 39 drivers/clk/clk-tango4.c u32 val, mul, div; mul 43 drivers/clk/clk-tango4.c mul = 1 << 27; mul 45 drivers/clk/clk-tango4.c clk_register_fixed_factor(NULL, name, "pll2", 0, mul, div); mul 455 drivers/clk/clk-vt8500.c u32 mul; mul 464 drivers/clk/clk-vt8500.c for (mul = 0; mul <= 255; mul++) { mul 465 drivers/clk/clk-vt8500.c tclk = parent_rate * (mul + 1) / ((div1 + 1) * (1 << div2)); mul 472 drivers/clk/clk-vt8500.c *multiplier = mul; mul 480 drivers/clk/clk-vt8500.c *multiplier = mul; mul 503 drivers/clk/clk-vt8500.c u32 mul; mul 512 drivers/clk/clk-vt8500.c for (mul = 0; mul <= 127; mul++) { mul 513 drivers/clk/clk-vt8500.c tclk = parent_rate * ((mul + 1) * 2) / mul 520 drivers/clk/clk-vt8500.c *multiplier = mul; mul 528 drivers/clk/clk-vt8500.c *multiplier = mul; mul 550 drivers/clk/clk-vt8500.c u32 filter, mul, div1, div2; mul 559 drivers/clk/clk-vt8500.c ret = vt8500_find_pll_bits(rate, parent_rate, &mul, &div1); mul 561 drivers/clk/clk-vt8500.c pll_val = VT8500_BITS_TO_VAL(mul, div1); mul 564 drivers/clk/clk-vt8500.c ret = wm8650_find_pll_bits(rate, parent_rate, &mul, &div1, &div2); mul 566 drivers/clk/clk-vt8500.c pll_val = WM8650_BITS_TO_VAL(mul, div1, div2); mul 569 drivers/clk/clk-vt8500.c ret = wm8750_find_pll_bits(rate, parent_rate, &filter, &mul, &div1, &div2); mul 571 drivers/clk/clk-vt8500.c pll_val = WM8750_BITS_TO_VAL(filter, mul, div1, div2); mul 574 drivers/clk/clk-vt8500.c ret = wm8850_find_pll_bits(rate, parent_rate, &mul, &div1, &div2); mul 576 drivers/clk/clk-vt8500.c pll_val = WM8850_BITS_TO_VAL(mul, div1, div2); mul 601 drivers/clk/clk-vt8500.c u32 filter, mul, div1, div2; mul 607 drivers/clk/clk-vt8500.c ret = vt8500_find_pll_bits(rate, *prate, &mul, &div1); mul 609 drivers/clk/clk-vt8500.c round_rate = VT8500_BITS_TO_FREQ(*prate, mul, div1); mul 612 drivers/clk/clk-vt8500.c ret = wm8650_find_pll_bits(rate, *prate, &mul, &div1, &div2); mul 614 drivers/clk/clk-vt8500.c round_rate = WM8650_BITS_TO_FREQ(*prate, mul, div1, div2); mul 617 drivers/clk/clk-vt8500.c ret = wm8750_find_pll_bits(rate, *prate, &filter, &mul, &div1, &div2); mul 619 drivers/clk/clk-vt8500.c round_rate = WM8750_BITS_TO_FREQ(*prate, mul, div1, div2); mul 622 drivers/clk/clk-vt8500.c ret = wm8850_find_pll_bits(rate, *prate, &mul, &div1, &div2); mul 624 drivers/clk/clk-vt8500.c round_rate = WM8850_BITS_TO_FREQ(*prate, mul, div1, div2); mul 32 drivers/clk/h8300/clk-h8s2678.c int mul = 1 << (readb(pll_clock->pllcr) & 3); mul 34 drivers/clk/h8300/clk-h8s2678.c return parent_rate * mul; mul 34 drivers/clk/imgtec/clk-boston.c uint mmcmdiv, mul, cpu_div, sys_div; mul 53 drivers/clk/imgtec/clk-boston.c mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL); mul 56 drivers/clk/imgtec/clk-boston.c sys_freq = mult_frac(in_freq, mul, sys_div); mul 59 drivers/clk/imgtec/clk-boston.c cpu_freq = mult_frac(in_freq, mul, cpu_div); mul 601 drivers/clk/microchip/clk-core.c u32 mul, div, best_mul = 1, best_div = 1; mul 608 drivers/clk/microchip/clk-core.c for (mul = 1; mul <= PLL_MULT_MAX; mul++) { mul 611 drivers/clk/microchip/clk-core.c rate64 *= mul; mul 618 drivers/clk/microchip/clk-core.c best_mul = mul; mul 48 drivers/clk/renesas/r9a06g032-clocks.c u16 div, mul; mul 74 drivers/clk/renesas/r9a06g032-clocks.c .div = _div, .mul = _mul } mul 78 drivers/clk/renesas/r9a06g032-clocks.c .div = _div, .mul = 1} mul 935 drivers/clk/renesas/r9a06g032-clocks.c d->mul, d->div); mul 40 drivers/clk/tegra/clk-divider.c int div, mul; mul 46 drivers/clk/tegra/clk-divider.c mul = get_mul(divider); mul 47 drivers/clk/tegra/clk-divider.c div += mul; mul 49 drivers/clk/tegra/clk-divider.c rate *= mul; mul 60 drivers/clk/tegra/clk-divider.c int div, mul; mul 70 drivers/clk/tegra/clk-divider.c mul = get_mul(divider); mul 72 drivers/clk/tegra/clk-divider.c return DIV_ROUND_UP(output_rate * mul, div + mul); mul 57 drivers/clk/tegra/clk-periph-fixed.c rate = (unsigned long long)parent_rate * fixed->mul; mul 74 drivers/clk/tegra/clk-periph-fixed.c unsigned int mul, mul 99 drivers/clk/tegra/clk-periph-fixed.c fixed->mul = mul; mul 16 drivers/clk/tegra/clk-utils.c int mul; mul 21 drivers/clk/tegra/clk-utils.c mul = 1 << frac_width; mul 24 drivers/clk/tegra/clk-utils.c divider_ux1 *= mul; mul 32 drivers/clk/tegra/clk-utils.c divider_ux1 *= mul; mul 34 drivers/clk/tegra/clk-utils.c if (divider_ux1 < mul) mul 37 drivers/clk/tegra/clk-utils.c divider_ux1 -= mul; mul 530 drivers/clk/tegra/clk.h unsigned int mul; mul 539 drivers/clk/tegra/clk.h unsigned int mul, mul 145 drivers/cpufreq/cppc_cpufreq.c u64 mul, div; mul 149 drivers/cpufreq/cppc_cpufreq.c mul = caps->nominal_freq; mul 152 drivers/cpufreq/cppc_cpufreq.c mul = caps->nominal_freq - caps->lowest_freq; mul 158 drivers/cpufreq/cppc_cpufreq.c mul = max_khz; mul 161 drivers/cpufreq/cppc_cpufreq.c return (u64)perf * mul / div; mul 169 drivers/cpufreq/cppc_cpufreq.c u64 mul, div; mul 173 drivers/cpufreq/cppc_cpufreq.c mul = caps->nominal_perf; mul 176 drivers/cpufreq/cppc_cpufreq.c mul = caps->lowest_perf; mul 182 drivers/cpufreq/cppc_cpufreq.c mul = cpu->perf_caps.highest_perf; mul 186 drivers/cpufreq/cppc_cpufreq.c return (u64)freq * mul / div; mul 25 drivers/cpufreq/cpufreq-nforce2.c #define NFORCE2_PLL(mul, div) (0x100000 | (mul << 8) | div) mul 69 drivers/cpufreq/cpufreq-nforce2.c unsigned char mul, div; mul 71 drivers/cpufreq/cpufreq-nforce2.c mul = (pll >> 8) & 0xff; mul 75 drivers/cpufreq/cpufreq-nforce2.c return NFORCE2_XTAL * mul / div; mul 89 drivers/cpufreq/cpufreq-nforce2.c unsigned char mul = 0, div = 0; mul 93 drivers/cpufreq/cpufreq-nforce2.c while (((mul == 0) || (div == 0)) && (tried <= 3)) { mul 98 drivers/cpufreq/cpufreq-nforce2.c mul = xmul; mul 104 drivers/cpufreq/cpufreq-nforce2.c if ((mul == 0) || (div == 0)) mul 107 drivers/cpufreq/cpufreq-nforce2.c return NFORCE2_PLL(mul, div); mul 54 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c unsigned long div, mul; mul 70 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c mul = ((128*freq/1000) + (n-1))/n; mul 72 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c n *= mul; mul 73 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c cts *= mul; mul 467 drivers/gpu/drm/bridge/tc358767.c int mul, best_mul = 1; mul 493 drivers/gpu/drm/bridge/tc358767.c mul = tmp; mul 496 drivers/gpu/drm/bridge/tc358767.c if ((mul < 1) || (mul > 128)) mul 499 drivers/gpu/drm/bridge/tc358767.c clk = (refclk / ext_div[i_pre] / div) * mul; mul 514 drivers/gpu/drm/bridge/tc358767.c best_mul = mul; mul 913 drivers/gpu/drm/i915/display/icl_dsi.c u32 tmp, hs_tx_timeout, lp_rx_timeout, ta_timeout, divisor, mul; mul 923 drivers/gpu/drm/i915/display/icl_dsi.c mul = 8 * 1000000; mul 924 drivers/gpu/drm/i915/display/icl_dsi.c hs_tx_timeout = DIV_ROUND_UP(intel_dsi->hs_tx_timeout * mul, mul 926 drivers/gpu/drm/i915/display/icl_dsi.c lp_rx_timeout = DIV_ROUND_UP(intel_dsi->lp_rx_timeout * mul, divisor); mul 927 drivers/gpu/drm/i915/display/icl_dsi.c ta_timeout = DIV_ROUND_UP(intel_dsi->turn_arnd_val * mul, divisor); mul 1402 drivers/gpu/drm/i915/display/intel_panel.c u32 mul; mul 1405 drivers/gpu/drm/i915/display/intel_panel.c mul = 128; mul 1407 drivers/gpu/drm/i915/display/intel_panel.c mul = 16; mul 1409 drivers/gpu/drm/i915/display/intel_panel.c return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); mul 1421 drivers/gpu/drm/i915/display/intel_panel.c u32 mul, clock; mul 1424 drivers/gpu/drm/i915/display/intel_panel.c mul = 16; mul 1426 drivers/gpu/drm/i915/display/intel_panel.c mul = 128; mul 1433 drivers/gpu/drm/i915/display/intel_panel.c return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); mul 1494 drivers/gpu/drm/i915/display/intel_panel.c int mul, clock; mul 1501 drivers/gpu/drm/i915/display/intel_panel.c mul = 16; mul 1504 drivers/gpu/drm/i915/display/intel_panel.c mul = 128; mul 1507 drivers/gpu/drm/i915/display/intel_panel.c return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); mul 1662 drivers/gpu/drm/i915/display/vlv_dsi.c u32 mul; mul 1702 drivers/gpu/drm/i915/display/vlv_dsi.c mul = IS_GEMINILAKE(dev_priv) ? 8 : 2; mul 1707 drivers/gpu/drm/i915/display/vlv_dsi.c prepare_cnt = DIV_ROUND_UP(ths_prepare_ns * ui_den, ui_num * mul); mul 1717 drivers/gpu/drm/i915/display/vlv_dsi.c ui_num * mul mul 1737 drivers/gpu/drm/i915/display/vlv_dsi.c * ui_den, ui_num * mul); mul 1746 drivers/gpu/drm/i915/display/vlv_dsi.c trail_cnt = DIV_ROUND_UP(tclk_trail_ns * ui_den, ui_num * mul); mul 1772 drivers/gpu/drm/i915/display/vlv_dsi.c lp_to_hs_switch = DIV_ROUND_UP(4 * tlpx_ui + prepare_cnt * mul + mul 1773 drivers/gpu/drm/i915/display/vlv_dsi.c exit_zero_cnt * mul + 10, 8); mul 75 drivers/gpu/drm/i915/i915_fixed.h static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul) mul 79 drivers/gpu/drm/i915/i915_fixed.h tmp = mul_u32_u32(val, mul.val); mul 87 drivers/gpu/drm/i915/i915_fixed.h uint_fixed_16_16_t mul) mul 91 drivers/gpu/drm/i915/i915_fixed.h tmp = mul_u32_u32(val.val, mul.val); mul 118 drivers/gpu/drm/i915/i915_fixed.h static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t mul) mul 122 drivers/gpu/drm/i915/i915_fixed.h tmp = mul_u32_u32(val, mul.val); mul 219 drivers/gpu/drm/i915/i915_pmu.c add_sample_mult(struct i915_pmu_sample *sample, u32 val, u32 mul) mul 221 drivers/gpu/drm/i915/i915_pmu.c sample->cur += mul_u32_u32(val, mul); mul 9984 drivers/gpu/drm/i915/intel_pm.c u32 mul, div; mul 10008 drivers/gpu/drm/i915/intel_pm.c mul = 1000000; mul 10015 drivers/gpu/drm/i915/intel_pm.c mul = 10000; mul 10018 drivers/gpu/drm/i915/intel_pm.c mul = 1280; mul 10048 drivers/gpu/drm/i915/intel_pm.c return mul_u64_u32_div(time_hw, mul, div); mul 552 drivers/gpu/drm/radeon/radeon_audio.c unsigned long div, mul; mul 568 drivers/gpu/drm/radeon/radeon_audio.c mul = ((128*freq/1000) + (n-1))/n; mul 570 drivers/gpu/drm/radeon/radeon_audio.c n *= mul; mul 571 drivers/gpu/drm/radeon/radeon_audio.c cts *= mul; mul 44 drivers/gpu/drm/tegra/dsi.c unsigned int mul; mul 489 drivers/gpu/drm/tegra/dsi.c unsigned int hact, hsw, hbp, hfp, i, mul, div; mul 500 drivers/gpu/drm/tegra/dsi.c mul = state->mul; mul 547 drivers/gpu/drm/tegra/dsi.c hact = mode->hdisplay * mul / div; mul 550 drivers/gpu/drm/tegra/dsi.c hsw = (mode->hsync_end - mode->hsync_start) * mul / div; mul 553 drivers/gpu/drm/tegra/dsi.c hbp = (mode->htotal - mode->hsync_end) * mul / div; mul 559 drivers/gpu/drm/tegra/dsi.c hfp = (mode->hsync_start - mode->hdisplay) * mul / div; mul 572 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 8 * mul / div, DSI_SOL_DELAY); mul 582 drivers/gpu/drm/tegra/dsi.c bytes = 1 + (mode->hdisplay / 2) * mul / div; mul 585 drivers/gpu/drm/tegra/dsi.c bytes = 1 + mode->hdisplay * mul / div; mul 604 drivers/gpu/drm/tegra/dsi.c delay = DIV_ROUND_UP(delay * mul, div * lanes); mul 608 drivers/gpu/drm/tegra/dsi.c bclk = DIV_ROUND_UP(mode->htotal * mul, div * lanes); mul 613 drivers/gpu/drm/tegra/dsi.c value = 8 * mul / div; mul 959 drivers/gpu/drm/tegra/dsi.c err = tegra_dsi_get_muldiv(dsi->format, &state->mul, &state->div); mul 972 drivers/gpu/drm/tegra/dsi.c state->bclk = (state->pclk * state->mul) / (state->div * state->lanes); mul 974 drivers/gpu/drm/tegra/dsi.c DRM_DEBUG_KMS("mul: %u, div: %u, lanes: %u\n", state->mul, state->div, mul 1013 drivers/gpu/drm/tegra/dsi.c scdiv = ((8 * state->mul) / (state->div * state->lanes)) - 2; mul 14 drivers/gpu/drm/tegra/hda.c unsigned int mul, div, bits, channels; mul 26 drivers/gpu/drm/tegra/hda.c mul = (format & AC_FMT_MULT_MASK) >> AC_FMT_MULT_SHIFT; mul 29 drivers/gpu/drm/tegra/hda.c fmt->sample_rate *= (mul + 1) / (div + 1); mul 70 drivers/hwmon/adm9240.c static inline int SCALE(long val, int mul, int div) mul 73 drivers/hwmon/adm9240.c return (val * mul - div / 2) / div; mul 75 drivers/hwmon/adm9240.c return (val * mul + div / 2) / div; mul 47 drivers/hwmon/smsc47m192.c static inline int SCALE(long val, int mul, int div) mul 50 drivers/hwmon/smsc47m192.c return (val * mul - div / 2) / div; mul 52 drivers/hwmon/smsc47m192.c return (val * mul + div / 2) / div; mul 154 drivers/media/i2c/smiapp-pll.c struct smiapp_pll *pll, struct smiapp_pll_branch *op_pll, uint32_t mul, mul 179 drivers/media/i2c/smiapp-pll.c more_mul_max = limits->max_pll_multiplier / mul; mul 187 drivers/media/i2c/smiapp-pll.c / (pll->ext_clk_freq_hz / pll->pre_pll_clk_div * mul)); mul 198 drivers/media/i2c/smiapp-pll.c DIV_ROUND_UP(limits->max_pll_multiplier, mul)); mul 205 drivers/media/i2c/smiapp-pll.c * mul); mul 210 drivers/media/i2c/smiapp-pll.c DIV_ROUND_UP(limits->min_pll_multiplier, mul)); mul 235 drivers/media/i2c/smiapp-pll.c pll->pll_multiplier = mul * i; mul 395 drivers/media/i2c/smiapp-pll.c uint32_t mul, div; mul 449 drivers/media/i2c/smiapp-pll.c mul = div_u64(pll->pll_op_clk_freq_hz, i); mul 451 drivers/media/i2c/smiapp-pll.c dev_dbg(dev, "mul %u / div %u\n", mul, div); mul 456 drivers/media/i2c/smiapp-pll.c DIV_ROUND_UP(mul * pll->ext_clk_freq_hz, mul 465 drivers/media/i2c/smiapp-pll.c op_pll, mul, div, mul 926 drivers/media/radio/si4713/si4713.c s32 *bit, s32 *mask, u16 *property, int *mul, mul 935 drivers/media/radio/si4713/si4713.c *mul = 1; mul 939 drivers/media/radio/si4713/si4713.c *mul = 1; mul 943 drivers/media/radio/si4713/si4713.c *mul = 1; mul 947 drivers/media/radio/si4713/si4713.c *mul = 1; mul 951 drivers/media/radio/si4713/si4713.c *mul = ATTACK_TIME_UNIT; mul 955 drivers/media/radio/si4713/si4713.c *mul = 10; mul 959 drivers/media/radio/si4713/si4713.c *mul = 10; mul 963 drivers/media/radio/si4713/si4713.c *mul = 1; mul 1110 drivers/media/radio/si4713/si4713.c int mul = 0; mul 1184 drivers/media/radio/si4713/si4713.c &mask, &property, &mul, &table, &size); mul 1189 drivers/media/radio/si4713/si4713.c if (mul) { mul 1190 drivers/media/radio/si4713/si4713.c val = val / mul; mul 72 drivers/mtd/nand/raw/atmel/nand-controller.c #define ATMEL_HSMC_NFC_CFG_DTO(cyc, mul) (((cyc) << 16) | ((mul) << 20)) mul 947 drivers/net/ethernet/cisco/enic/vnic_dev.c vdev->intr_coal_timer_info.mul = 2; mul 976 drivers/net/ethernet/cisco/enic/vnic_dev.c vdev->intr_coal_timer_info.mul = (u32) vdev->args[0]; mul 1030 drivers/net/ethernet/cisco/enic/vnic_dev.c return (usec * vdev->intr_coal_timer_info.mul) / mul 1037 drivers/net/ethernet/cisco/enic/vnic_dev.c vdev->intr_coal_timer_info.mul; mul 86 drivers/net/ethernet/cisco/enic/vnic_dev.h u32 mul; mul 39 drivers/net/wireless/ath/ath9k/common.h #define ATH_EP_MUL(x, mul) ((x) * (mul)) mul 47 drivers/net/wireless/ath/ath9k/common.h #define ATH_EP_RND(x, mul) \ mul 48 drivers/net/wireless/ath/ath9k/common.h (((x) + ((mul)/2)) / (mul)) mul 62 drivers/net/wireless/intersil/p54/eeprom.c .mul = 130, mul 566 drivers/net/wireless/intersil/p54/eeprom.c entry[i].mul = (s16) le16_to_cpu(cal[i].mul); mul 584 drivers/net/wireless/intersil/p54/eeprom.c entry[i].mul = (s16) le16_to_cpu(cal[i].mul); mul 95 drivers/net/wireless/intersil/p54/eeprom.h __le16 mul; mul 100 drivers/net/wireless/intersil/p54/eeprom.h __le16 mul; mul 507 drivers/net/wireless/intersil/p54/fwio.c rssi->mul = cpu_to_le16(rssi_data->mul); mul 512 drivers/net/wireless/intersil/p54/fwio.c rssi->mul = cpu_to_le16(rssi_data->longbow_unkn); mul 118 drivers/net/wireless/intersil/p54/p54.h s16 mul; mul 278 drivers/net/wireless/intersil/p54/txrx.c return ((rssi * priv->cur_rssi->mul) / 64 + mul 96 drivers/pwm/pwm-img.c unsigned long mul, output_clk_hz, input_clk_hz; mul 110 drivers/pwm/pwm-img.c mul = DIV_ROUND_UP(input_clk_hz, output_clk_hz); mul 111 drivers/pwm/pwm-img.c if (mul <= max_timebase) { mul 113 drivers/pwm/pwm-img.c timebase = DIV_ROUND_UP(mul, 1); mul 114 drivers/pwm/pwm-img.c } else if (mul <= max_timebase * 8) { mul 116 drivers/pwm/pwm-img.c timebase = DIV_ROUND_UP(mul, 8); mul 117 drivers/pwm/pwm-img.c } else if (mul <= max_timebase * 64) { mul 119 drivers/pwm/pwm-img.c timebase = DIV_ROUND_UP(mul, 64); mul 120 drivers/pwm/pwm-img.c } else if (mul <= max_timebase * 512) { mul 122 drivers/pwm/pwm-img.c timebase = DIV_ROUND_UP(mul, 512); mul 816 drivers/spi/spi-pxa2xx.c u32 mul; mul 821 drivers/spi/spi-pxa2xx.c mul = (1 << 24) >> 1; mul 832 drivers/spi/spi-pxa2xx.c mul >>= scale - 9; mul 842 drivers/spi/spi-pxa2xx.c mul >>= scale; mul 845 drivers/spi/spi-pxa2xx.c r1 = abs(fref1 / (1 << (24 - fls_long(mul))) / q1 - rate); mul 865 drivers/spi/spi-pxa2xx.c mul = (1 << 24) * 2 / 5; mul 886 drivers/spi/spi-pxa2xx.c mul = m; mul 890 drivers/spi/spi-pxa2xx.c *dds = mul; mul 208 drivers/tty/serial/8250/8250_mid.c unsigned long mul, div; mul 225 drivers/tty/serial/8250/8250_mid.c rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div); mul 229 drivers/tty/serial/8250/8250_mid.c writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */ mul 2037 drivers/tty/serial/imx.c unsigned int mul = ubir + 1; mul 2041 drivers/tty/serial/imx.c baud_raw = (uartclk / div) * mul; mul 2042 drivers/tty/serial/imx.c baud_raw += (rem * mul + div / 2) / div; mul 361 drivers/usb/chipidea/udc.c u32 mul = hwreq->req.length / hwep->ep.maxpacket; mul 365 drivers/usb/chipidea/udc.c mul++; mul 366 drivers/usb/chipidea/udc.c node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO)); mul 501 drivers/usb/chipidea/udc.c u32 mul = hwreq->req.length / hwep->ep.maxpacket; mul 505 drivers/usb/chipidea/udc.c mul++; mul 506 drivers/usb/chipidea/udc.c hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT)); mul 295 drivers/usb/core/devices.c int mul; mul 300 drivers/usb/core/devices.c mul = 8; mul 302 drivers/usb/core/devices.c mul = 2; mul 309 drivers/usb/core/devices.c desc->bMaxPower * mul); mul 58 drivers/usb/core/usb.h unsigned mul = (udev->speed >= USB_SPEED_SUPER ? 8 : 2); mul 60 drivers/usb/core/usb.h return c->desc.bMaxPower * mul; mul 139 drivers/usb/gadget/udc/bdc/bdc_cmd.c u32 mps, mbs, mul, si; mul 144 drivers/usb/gadget/udc/bdc/bdc_cmd.c cmd_sc = mul = mbs = param2 = 0; mul 166 drivers/usb/gadget/udc/bdc/bdc_cmd.c mul = comp_desc->bmAttributes; mul 169 drivers/usb/gadget/udc/bdc/bdc_cmd.c param2 |= mul << EPM_SHIFT; mul 248 drivers/video/fbdev/vga16fb.c int mul, int div) mul 262 drivers/video/fbdev/vga16fb.c pixclock = (pixclock * mul) / div; mul 278 drivers/video/fbdev/vga16fb.c pixclock = (best->pixclock * div) / mul; mul 177 include/linux/math64.h static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) mul 179 include/linux/math64.h return (u64)(((unsigned __int128)a * mul) >> shift); mul 184 include/linux/math64.h static inline u64 mul_u64_u64_shr(u64 a, u64 mul, unsigned int shift) mul 186 include/linux/math64.h return (u64)(((unsigned __int128)a * mul) >> shift); mul 193 include/linux/math64.h static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) mul 201 include/linux/math64.h ret = mul_u32_u32(al, mul) >> shift; mul 203 include/linux/math64.h ret += mul_u32_u32(ah, mul) << (32 - shift); mul 256 include/linux/math64.h static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 divisor) mul 270 include/linux/math64.h rl.ll = mul_u32_u32(u.l.low, mul); mul 271 include/linux/math64.h rh.ll = mul_u32_u32(u.l.high, mul) + rl.l.high; mul 245 lib/test_overflow.c check_one_op(t, fmt, mul, "*", p->a, p->b, p->prod, p->p_of); \ mul 246 lib/test_overflow.c check_one_op(t, fmt, mul, "*", p->b, p->a, p->prod, p->p_of); \ mul 653 sound/core/pcm_lib.c c->min = mul(a->min, b->min); mul 655 sound/core/pcm_lib.c c->max = mul(a->max, b->max); mul 909 sound/core/pcm_lib.c num = mul(q, den); mul 941 sound/core/pcm_lib.c num = mul(q, den); mul 131 sound/soc/uniphier/aio-cpu.c int mul[] = { 1, 1, 1, 2, }; mul 139 sound/soc/uniphier/aio-cpu.c for (i = 0; i < ARRAY_SIZE(mul); i++) mul 140 sound/soc/uniphier/aio-cpu.c if (pll->freq * mul[i] / div[i] == freq) mul 104 tools/bpf/bpf_exp.y | mul mul 365 tools/bpf/bpf_exp.y mul mul 515 tools/perf/bench/numa.c int mul; mul 553 tools/perf/bench/numa.c mul = 1; mul 556 tools/perf/bench/numa.c mul = atol(tok_mul + 1); mul 557 tools/perf/bench/numa.c BUG_ON(mul <= 0); mul 560 tools/perf/bench/numa.c dprintf("CPUs: %d_%d-%d#%dx%d\n", bind_cpu_0, bind_len, bind_cpu_1, step, mul); mul 573 tools/perf/bench/numa.c for (i = 0; i < mul; i++) { mul 651 tools/perf/bench/numa.c int mul; mul 677 tools/perf/bench/numa.c mul = 1; mul 680 tools/perf/bench/numa.c mul = atol(tok_mul + 1); mul 681 tools/perf/bench/numa.c BUG_ON(mul <= 0); mul 697 tools/perf/bench/numa.c for (i = 0; i < mul; i++) {