mtk_dpi_mask      126 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_RET, reset ? RST : 0, RST);
mtk_dpi_mask      131 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_EN, EN, EN);
mtk_dpi_mask      136 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_EN, 0, EN);
mtk_dpi_mask      142 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH,
mtk_dpi_mask      144 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_TGEN_HPORCH,
mtk_dpi_mask      146 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP,
mtk_dpi_mask      154 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, width_addr,
mtk_dpi_mask      157 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, width_addr,
mtk_dpi_mask      160 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, porch_addr,
mtk_dpi_mask      163 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, porch_addr,
mtk_dpi_mask      204 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol,
mtk_dpi_mask      210 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_CON, en_3d ? TDFP_EN : 0, TDFP_EN);
mtk_dpi_mask      215 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_CON, inter ? INTL_EN : 0, INTL_EN);
mtk_dpi_mask      220 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE, HSIZE_MASK);
mtk_dpi_mask      221 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK);
mtk_dpi_mask      227 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT,
mtk_dpi_mask      229 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP,
mtk_dpi_mask      231 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_bottom << C_LIMIT_BOT,
mtk_dpi_mask      233 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_top << C_LIMIT_TOP,
mtk_dpi_mask      259 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << OUT_BIT,
mtk_dpi_mask      289 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << YC_MAP, YC_MAP_MASK);
mtk_dpi_mask      321 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << CH_SWAP, CH_SWAP_MASK);
mtk_dpi_mask      326 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_CON, enable ? YUV422_EN : 0, YUV422_EN);
mtk_dpi_mask      331 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, CSC_ENABLE);
mtk_dpi_mask      336 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_CON, enable ? IN_RB_SWAP : 0, IN_RB_SWAP);
mtk_dpi_mask      341 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, H_FRE_2N, H_FRE_2N);
mtk_dpi_mask      347 drivers/gpu/drm/mediatek/mtk_dpi.c 		mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, EDGE_SEL_EN);