mtdcri 172 arch/powerpc/platforms/4xx/msi.c mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start)); /*HIGH addr */ mtdcri 173 arch/powerpc/platforms/4xx/msi.c mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start)); /* Low addr */ mtdcri 743 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_440SPE_RCSSET, 0x01010000); mtdcri 744 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_440SPE_RCSSET, 0x01010000); mtdcri 745 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_440SPE_RCSSET, 0x01010000); mtdcri 857 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_DLPSET, val); mtdcri 858 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET1, 0x20222222); mtdcri 860 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET2, 0x11000000); mtdcri 861 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL0SET1, 0x35000000); mtdcri 862 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL1SET1, 0x35000000); mtdcri 863 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL2SET1, 0x35000000); mtdcri 864 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL3SET1, 0x35000000); mtdcri 866 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL4SET1, mtdcri 868 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL5SET1, mtdcri 870 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL6SET1, mtdcri 872 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_440SPE_HSSL7SET1, mtdcri 965 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_DLPSET, val); mtdcri 966 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET1, utlset1); mtdcri 967 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET2, 0x01210000); mtdcri 971 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460EX_L0CDRCTL, 0x00003230); mtdcri 972 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130); mtdcri 973 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006); mtdcri 975 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST,0x10000000); mtdcri 979 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_L0CDRCTL, 0x00003230); mtdcri 980 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_L1CDRCTL, 0x00003230); mtdcri 981 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_L2CDRCTL, 0x00003230); mtdcri 982 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_L3CDRCTL, 0x00003230); mtdcri 983 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000130); mtdcri 984 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000130); mtdcri 985 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000130); mtdcri 986 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000130); mtdcri 987 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_L0CLK, 0x00000006); mtdcri 988 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_L1CLK, 0x00000006); mtdcri 989 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_L2CLK, 0x00000006); mtdcri 990 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_L3CLK, 0x00000006); mtdcri 992 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460EX_PHY_CTL_RST,0x10000000); mtdcri 996 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, mtdcri 1013 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, mtdcri 1070 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0); mtdcri 1080 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_DLPSET, val); mtdcri 1081 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET1, 0x00000000); mtdcri 1082 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET2, 0x01010000); mtdcri 1084 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460EX_L0CDRCTL, 0x00003230); mtdcri 1085 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130); mtdcri 1086 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006); mtdcri 1088 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000); mtdcri 1090 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000); mtdcri 1092 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, mtdcri 1102 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, mtdcri 1123 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL0DAMP, 0xB9843211); mtdcri 1124 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL1DAMP, 0xB9843211); mtdcri 1125 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL2DAMP, 0xB9843211); mtdcri 1126 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL3DAMP, 0xB9843211); mtdcri 1127 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL4DAMP, 0xB9843211); mtdcri 1128 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL5DAMP, 0xB9843211); mtdcri 1129 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL6DAMP, 0xB9843211); mtdcri 1130 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL7DAMP, 0xB9843211); mtdcri 1132 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460SX_HSSL0DAMP, 0xB9843211); mtdcri 1133 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460SX_HSSL1DAMP, 0xB9843211); mtdcri 1134 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460SX_HSSL2DAMP, 0xB9843211); mtdcri 1135 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460SX_HSSL3DAMP, 0xB9843211); mtdcri 1137 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_460SX_HSSL0DAMP, 0xB9843211); mtdcri 1138 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_460SX_HSSL1DAMP, 0xB9843211); mtdcri 1139 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_460SX_HSSL2DAMP, 0xB9843211); mtdcri 1140 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_460SX_HSSL3DAMP, 0xB9843211); mtdcri 1143 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL0COEFA, 0xDCB98987); mtdcri 1144 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL1COEFA, 0xDCB98987); mtdcri 1145 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL2COEFA, 0xDCB98987); mtdcri 1146 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL3COEFA, 0xDCB98987); mtdcri 1147 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL4COEFA, 0xDCB98987); mtdcri 1148 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL5COEFA, 0xDCB98987); mtdcri 1149 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL6COEFA, 0xDCB98987); mtdcri 1150 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL7COEFA, 0xDCB98987); mtdcri 1152 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460SX_HSSL0COEFA, 0xDCB98987); mtdcri 1153 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460SX_HSSL1COEFA, 0xDCB98987); mtdcri 1154 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460SX_HSSL2COEFA, 0xDCB98987); mtdcri 1155 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460SX_HSSL3COEFA, 0xDCB98987); mtdcri 1157 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_460SX_HSSL0COEFA, 0xDCB98987); mtdcri 1158 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_460SX_HSSL1COEFA, 0xDCB98987); mtdcri 1159 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_460SX_HSSL2COEFA, 0xDCB98987); mtdcri 1160 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_460SX_HSSL3COEFA, 0xDCB98987); mtdcri 1163 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSL1CALDRV, 0x22222222); mtdcri 1164 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460SX_HSSL1CALDRV, 0x22220000); mtdcri 1165 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_460SX_HSSL1CALDRV, 0x22220000); mtdcri 1168 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSSLEW, 0xFFFFFFFF); mtdcri 1169 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460SX_HSSSLEW, 0xFFFF0000); mtdcri 1170 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_460SX_HSSSLEW, 0xFFFF0000); mtdcri 1173 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_HSSCTLSET, 0x00001130); mtdcri 1174 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_460SX_HSSCTLSET, 0x00001130); mtdcri 1182 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR0_460SX_RCSSET, mtdcri 1184 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR1_460SX_RCSSET, mtdcri 1186 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, PESDR2_460SX_RCSSET, mtdcri 1281 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, 0x01010000); mtdcri 1286 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, 0x01111000); mtdcri 1288 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, 0x01101000); mtdcri 1296 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, 0x00101000); mtdcri 1308 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_DLPSET, mtdcri 1311 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET1, 0x00000000); mtdcri 1312 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_UTLSET2, 0x01010000); mtdcri 1313 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_405EX_PHYSET1, 0x720F0000); mtdcri 1314 arch/powerpc/platforms/4xx/pci.c mtdcri(SDR0, port->sdr_base + PESDRn_405EX_PHYSET2, 0x70600003); mtdcri 1388 drivers/crypto/amcc/crypto4xx_core.c mtdcri(SDR0, PPC460EX_SDR0_SRST, mtdcri 1390 drivers/crypto/amcc/crypto4xx_core.c mtdcri(SDR0, PPC460EX_SDR0_SRST, mtdcri 1394 drivers/crypto/amcc/crypto4xx_core.c mtdcri(SDR0, PPC405EX_SDR0_SRST, mtdcri 1396 drivers/crypto/amcc/crypto4xx_core.c mtdcri(SDR0, PPC405EX_SDR0_SRST, mtdcri 1401 drivers/crypto/amcc/crypto4xx_core.c mtdcri(SDR0, PPC460SX_SDR0_SRST, mtdcri 1403 drivers/crypto/amcc/crypto4xx_core.c mtdcri(SDR0, PPC460SX_SDR0_SRST, mtdcri 4469 drivers/dma/ppc4xx/adma.c mtdcri(SDR0, DCRN_SDR0_SRST, DCRN_SDR0_SRST_I2ODMA); mtdcri 4470 drivers/dma/ppc4xx/adma.c mtdcri(SDR0, DCRN_SDR0_SRST, 0); mtdcri 283 drivers/net/ethernet/ibm/emac/mal.c mtdcri(SDR0, DCRN_SDR_ICINTSTAT, mtdcri 303 drivers/net/ethernet/ibm/emac/mal.c mtdcri(SDR0, DCRN_SDR_ICINTSTAT,