msr 102 arch/arm/include/asm/assembler.h msr cpsr_c, #PSR_I_BIT | SVC_MODE msr 106 arch/arm/include/asm/assembler.h msr cpsr_c, #SVC_MODE msr 175 arch/arm/include/asm/assembler.h msr primask, \oldcpsr msr 177 arch/arm/include/asm/assembler.h msr cpsr_c, \oldcpsr msr 328 arch/arm/include/asm/assembler.h msr cpsr_c, \reg msr 332 arch/arm/include/asm/assembler.h msr cpsr_c, #\mode msr 354 arch/arm/include/asm/assembler.h msr spsr_cxsf, \reg msr 357 arch/arm/include/asm/assembler.h 1: msr cpsr_c, \reg msr 19 arch/arm64/include/asm/asm-uaccess.h msr ttbr0_el1, \tmp1 // set reserved TTBR0_EL1 msr 22 arch/arm64/include/asm/asm-uaccess.h msr ttbr1_el1, \tmp1 // set reserved ASID msr 32 arch/arm64/include/asm/asm-uaccess.h msr ttbr1_el1, \tmp2 // set the active ASID msr 34 arch/arm64/include/asm/asm-uaccess.h msr ttbr0_el1, \tmp1 // set the non-PAN TTBR0_EL1 msr 28 arch/arm64/include/asm/assembler.h msr daifset, #0xf msr 32 arch/arm64/include/asm/assembler.h msr daifset, #0xf msr 36 arch/arm64/include/asm/assembler.h msr daifclr, #0xf msr 40 arch/arm64/include/asm/assembler.h msr daif, \flags msr 46 arch/arm64/include/asm/assembler.h msr daif, \tmp msr 51 arch/arm64/include/asm/assembler.h msr daifclr, #(8 | 4 | 1) msr 59 arch/arm64/include/asm/assembler.h msr daifset, #2 msr 63 arch/arm64/include/asm/assembler.h msr daif, \flags msr 67 arch/arm64/include/asm/assembler.h msr daifclr, #8 msr 74 arch/arm64/include/asm/assembler.h msr mdscr_el1, \tmp msr 84 arch/arm64/include/asm/assembler.h msr mdscr_el1, \tmp msr 442 arch/arm64/include/asm/assembler.h msr pmuserenr_el0, xzr // Disable PMU access from EL0 msr 40 arch/arm64/include/asm/fpsimdmacros.h msr fpcr, \state msr 63 arch/arm64/include/asm/fpsimdmacros.h msr fpsr, x\tmpnr msr 213 arch/arm64/include/asm/fpsimdmacros.h msr fpsr, x\nxtmp msr 215 arch/arm64/include/asm/fpsimdmacros.h msr fpcr, x\nxtmp msr 172 arch/m68k/bvme6000/config.c unsigned char msr; msr 175 arch/m68k/bvme6000/config.c msr = rtc->msr & 0xc0; msr 176 arch/m68k/bvme6000/config.c rtc->msr = msr | 0x20; /* Ack the interrupt */ msr 197 arch/m68k/bvme6000/config.c unsigned char msr = rtc->msr & 0xc0; msr 199 arch/m68k/bvme6000/config.c rtc->msr = 0; /* Ensure timer registers accessible */ msr 209 arch/m68k/bvme6000/config.c rtc->msr = 0x40; /* Access int.cntrl, etc */ msr 214 arch/m68k/bvme6000/config.c rtc->msr = 0; /* Access timer 1 control */ msr 217 arch/m68k/bvme6000/config.c rtc->msr = msr; msr 239 arch/m68k/bvme6000/config.c unsigned char msr, msb; msr 245 arch/m68k/bvme6000/config.c msr = rtc->msr & 0xc0; msr 246 arch/m68k/bvme6000/config.c rtc->msr = 0; /* Ensure timer registers accessible */ msr 250 arch/m68k/bvme6000/config.c t1int = rtc->msr & 0x20; msr 255 arch/m68k/bvme6000/config.c } while (t1int != (rtc->msr & 0x20) || msr 265 arch/m68k/bvme6000/config.c rtc->msr = msr; msr 292 arch/m68k/bvme6000/config.c unsigned char msr = rtc->msr & 0xc0; msr 294 arch/m68k/bvme6000/config.c rtc->msr = 0x40; /* Ensure clock and real-time-mode-register msr 325 arch/m68k/bvme6000/config.c rtc->msr = msr; msr 42 arch/m68k/bvme6000/rtc.c unsigned char msr; msr 52 arch/m68k/bvme6000/rtc.c msr = rtc->msr & 0xc0; msr 53 arch/m68k/bvme6000/rtc.c rtc->msr = 0x40; msr 66 arch/m68k/bvme6000/rtc.c rtc->msr = msr; msr 108 arch/m68k/bvme6000/rtc.c msr = rtc->msr & 0xc0; msr 109 arch/m68k/bvme6000/rtc.c rtc->msr = 0x40; msr 123 arch/m68k/bvme6000/rtc.c rtc->msr = msr; msr 51 arch/m68k/include/asm/bvme6000hw.h pad_a[3], msr, msr 29 arch/microblaze/include/asm/setup.h unsigned int fdt, unsigned int msr, unsigned int tlb0, msr 56 arch/microblaze/include/asm/thread_info.h __u32 msr; msr 51 arch/microblaze/include/uapi/asm/ptrace.h microblaze_reg_t msr; msr 25 arch/microblaze/kernel/asm-offsets.c DEFINE(PT_MSR, offsetof(struct pt_regs, msr)); msr 121 arch/microblaze/kernel/asm-offsets.c DEFINE(CC_MSR, offsetof(struct cpu_context, msr)); msr 47 arch/microblaze/kernel/process.c regs->msr, regs->ear, regs->esr, regs->fsr); msr 72 arch/microblaze/kernel/process.c local_save_flags(childregs->msr); msr 74 arch/microblaze/kernel/process.c ti->cpu_context.msr = childregs->msr & ~MSR_IE; msr 86 arch/microblaze/kernel/process.c ti->cpu_context.msr = (unsigned long)childregs->msr; msr 88 arch/microblaze/kernel/process.c childregs->msr |= MSR_UMS; msr 100 arch/microblaze/kernel/process.c childregs->msr &= ~MSR_EIP; msr 101 arch/microblaze/kernel/process.c childregs->msr |= MSR_IE; msr 102 arch/microblaze/kernel/process.c childregs->msr &= ~MSR_VM; msr 103 arch/microblaze/kernel/process.c childregs->msr |= MSR_VMS; msr 104 arch/microblaze/kernel/process.c childregs->msr |= MSR_EE; /* exceptions will be enabled*/ msr 106 arch/microblaze/kernel/process.c ti->cpu_context.msr = (childregs->msr|MSR_VM); msr 107 arch/microblaze/kernel/process.c ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */ msr 108 arch/microblaze/kernel/process.c ti->cpu_context.msr &= ~MSR_IE; msr 135 arch/microblaze/kernel/process.c regs->msr |= MSR_UMS; msr 136 arch/microblaze/kernel/process.c regs->msr &= ~MSR_VM; msr 95 arch/microblaze/kernel/setup.c unsigned int fdt, unsigned int msr, unsigned int tlb0, msr 156 arch/microblaze/kernel/setup.c if (msr) { msr 158 arch/microblaze/kernel/setup.c pr_cont("CPU don't have it %x\n", msr); msr 161 arch/microblaze/kernel/setup.c if (!msr) { msr 163 arch/microblaze/kernel/setup.c pr_cont("CPU have it %x\n", msr); msr 118 arch/microblaze/mm/fault.c regs->r15, regs->msr); msr 14 arch/mips/include/asm/mach-loongson64/cs5536/cs5536.h extern void _rdmsr(u32 msr, u32 *hi, u32 *lo); msr 15 arch/mips/include/asm/mach-loongson64/cs5536/cs5536.h extern void _wrmsr(u32 msr, u32 hi, u32 lo); msr 182 arch/mips/pci/ops-loongson2.c void _rdmsr(u32 msr, u32 *hi, u32 *lo) msr 191 arch/mips/pci/ops-loongson2.c loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); msr 198 arch/mips/pci/ops-loongson2.c void _wrmsr(u32 msr, u32 hi, u32 lo) msr 207 arch/mips/pci/ops-loongson2.c loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); msr 51 arch/powerpc/include/asm/asm-prototypes.h int64_t opcode, uint64_t msr); msr 163 arch/powerpc/include/asm/asm-prototypes.h void kvmppc_save_tm_hv(struct kvm_vcpu *vcpu, u64 msr, bool preserve_nv); msr 164 arch/powerpc/include/asm/asm-prototypes.h void kvmppc_restore_tm_hv(struct kvm_vcpu *vcpu, u64 msr, bool preserve_nv); msr 166 arch/powerpc/include/asm/asm-prototypes.h static inline void kvmppc_save_tm_hv(struct kvm_vcpu *vcpu, u64 msr, msr 168 arch/powerpc/include/asm/asm-prototypes.h static inline void kvmppc_restore_tm_hv(struct kvm_vcpu *vcpu, u64 msr, msr 330 arch/powerpc/include/asm/hw_irq.h unsigned long msr = mfmsr(); msr 331 arch/powerpc/include/asm/hw_irq.h SET_MSR_EE(msr | MSR_EE); msr 349 arch/powerpc/include/asm/hw_irq.h return !(regs->msr & MSR_EE); msr 236 arch/powerpc/include/asm/kvm_book3s.h extern void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr); msr 580 arch/powerpc/include/asm/kvm_book3s_64.h static inline u64 sanitize_msr(u64 msr) msr 582 arch/powerpc/include/asm/kvm_book3s_64.h msr &= ~MSR_HV; msr 583 arch/powerpc/include/asm/kvm_book3s_64.h msr |= MSR_ME; msr 584 arch/powerpc/include/asm/kvm_book3s_64.h return msr; msr 274 arch/powerpc/include/asm/kvm_ppc.h void (*set_msr)(struct kvm_vcpu *vcpu, u64 msr); msr 318 arch/powerpc/include/asm/kvm_ppc.h void (*giveup_ext)(struct kvm_vcpu *vcpu, ulong msr); msr 973 arch/powerpc/include/asm/kvm_ppc.h SHARED_WRAPPER_GET(msr, 64) msr 977 arch/powerpc/include/asm/kvm_ppc.h vcpu->arch.shared->msr = cpu_to_be64(val); msr 979 arch/powerpc/include/asm/kvm_ppc.h vcpu->arch.shared->msr = cpu_to_le64(val); msr 32 arch/powerpc/include/asm/opal.h int64_t opal_npu_init_context(uint64_t phb_id, int pasid, uint64_t msr, msr 127 arch/powerpc/include/asm/pci.h unsigned long msr); msr 36 arch/powerpc/include/asm/perf_event.h asm volatile("mfmsr %0" : "=r" ((regs)->msr)); \ msr 37 arch/powerpc/include/asm/probes.h regs->msr |= MSR_SINGLESTEP; msr 44 arch/powerpc/include/asm/probes.h regs->msr &= ~MSR_CE; msr 33 arch/powerpc/include/asm/ptrace.h unsigned long msr; msr 161 arch/powerpc/include/asm/ptrace.h #define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1) msr 163 arch/powerpc/include/asm/ptrace.h #define user_mode(regs) (((regs)->msr & MSR_PR) != 0) msr 22 arch/powerpc/include/asm/runlatch.h unsigned long msr = mfmsr(); \ msr 25 arch/powerpc/include/asm/runlatch.h if (msr & MSR_EE) \ msr 34 arch/powerpc/include/asm/runlatch.h unsigned long msr = mfmsr(); \ msr 37 arch/powerpc/include/asm/runlatch.h if (msr & MSR_EE) \ msr 42 arch/powerpc/include/uapi/asm/kvm.h __u64 msr; msr 48 arch/powerpc/include/uapi/asm/kvm_para.h __u64 msr; msr 40 arch/powerpc/include/uapi/asm/ptrace.h unsigned long msr; msr 308 arch/powerpc/kernel/align.c if ((regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE)) { msr 311 arch/powerpc/kernel/asm-offsets.c STACK_PT_REGS_OFFSET(_MSR, msr); msr 452 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_MSR, kvm_vcpu, arch.shregs.msr); msr 481 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_SHARED_MSR, kvm_vcpu_arch_shared, msr); msr 726 arch/powerpc/kernel/asm-offsets.c OFFSET(KVM_MAGIC_MSR, kvm_vcpu_arch_shared, msr); msr 174 arch/powerpc/kernel/head_32.h #define EXC_XFER_TEMPLATE(hdlr, trap, msr, tfer, ret) \ msr 177 arch/powerpc/kernel/head_32.h LOAD_REG_IMMEDIATE(r10, msr); \ msr 328 arch/powerpc/kernel/head_booke.h #define EXC_XFER_TEMPLATE(hdlr, trap, msr, tfer, ret) \ msr 331 arch/powerpc/kernel/head_booke.h lis r10,msr@h; \ msr 332 arch/powerpc/kernel/head_booke.h ori r10,r10,msr@l; \ msr 193 arch/powerpc/kernel/hw_breakpoint.c regs->msr &= ~MSR_SE; msr 228 arch/powerpc/kernel/hw_breakpoint.c regs->msr |= MSR_SE; msr 226 arch/powerpc/kernel/kgdb.c PACK64(ptr, regs->msr); msr 314 arch/powerpc/kernel/kgdb.c { "msr", GDB_SIZEOF_REG, offsetof(struct pt_regs, msr) }, msr 404 arch/powerpc/kernel/kgdb.c linux_regs->msr |= MSR_DE; msr 406 arch/powerpc/kernel/kgdb.c linux_regs->msr |= MSR_SE; msr 191 arch/powerpc/kernel/kprobes.c kcb->kprobe_saved_msr = regs->msr; msr 267 arch/powerpc/kernel/kprobes.c if (!(regs->msr & MSR_IR) || !(regs->msr & MSR_DR)) msr 285 arch/powerpc/kernel/kprobes.c regs->msr &= ~MSR_SINGLESTEP; msr 286 arch/powerpc/kernel/kprobes.c regs->msr |= kcb->kprobe_saved_msr; msr 499 arch/powerpc/kernel/kprobes.c regs->msr |= kcb->kprobe_saved_msr; msr 515 arch/powerpc/kernel/kprobes.c if (regs->msr & MSR_SINGLESTEP) msr 539 arch/powerpc/kernel/kprobes.c regs->msr &= ~MSR_SINGLESTEP; /* Turn off 'trace' bits */ msr 540 arch/powerpc/kernel/kprobes.c regs->msr |= kcb->kprobe_saved_msr; msr 427 arch/powerpc/kernel/kvm.c kvm_patch_ins_ld(inst, magic_var(msr), inst_rt); msr 104 arch/powerpc/kernel/mce.c mce->srr1 = regs->msr; msr 110 arch/powerpc/kernel/mce.c if (handled && (regs->msr & MSR_RI)) msr 399 arch/powerpc/kernel/mce_power.c uint64_t srr1 = regs->msr; msr 611 arch/powerpc/kernel/mce_power.c uint64_t srr1 = regs->msr; msr 654 arch/powerpc/kernel/mce_power.c if (SRR1_MC_LOADSTORE(regs->msr) && regs->dsisr == 0x02000000) msr 89 arch/powerpc/kernel/optprobes.c regs.msr = MSR_KERNEL; msr 18 arch/powerpc/kernel/ppc32.h unsigned int msr; msr 97 arch/powerpc/kernel/process.c MSR_TM_ACTIVE(tsk->thread.regs->msr) && msr 99 arch/powerpc/kernel/process.c tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; msr 161 arch/powerpc/kernel/process.c unsigned long msr; msr 164 arch/powerpc/kernel/process.c msr = tsk->thread.regs->msr; msr 165 arch/powerpc/kernel/process.c msr &= ~(MSR_FP|MSR_FE0|MSR_FE1); msr 168 arch/powerpc/kernel/process.c msr &= ~MSR_VSX; msr 170 arch/powerpc/kernel/process.c tsk->thread.regs->msr = msr; msr 199 arch/powerpc/kernel/process.c if (tsk->thread.regs->msr & MSR_FP) { msr 223 arch/powerpc/kernel/process.c if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) { msr 233 arch/powerpc/kernel/process.c MSR_TM_ACTIVE(current->thread.regs->msr)) msr 258 arch/powerpc/kernel/process.c unsigned long msr; msr 261 arch/powerpc/kernel/process.c msr = tsk->thread.regs->msr; msr 262 arch/powerpc/kernel/process.c msr &= ~MSR_VEC; msr 265 arch/powerpc/kernel/process.c msr &= ~MSR_VSX; msr 267 arch/powerpc/kernel/process.c tsk->thread.regs->msr = msr; msr 288 arch/powerpc/kernel/process.c if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) { msr 298 arch/powerpc/kernel/process.c MSR_TM_ACTIVE(current->thread.regs->msr)) msr 313 arch/powerpc/kernel/process.c if (tsk->thread.regs->msr & MSR_VEC) { msr 341 arch/powerpc/kernel/process.c unsigned long msr = tsk->thread.regs->msr; msr 347 arch/powerpc/kernel/process.c WARN_ON((msr & MSR_VSX) && !((msr & MSR_FP) && (msr & MSR_VEC))); msr 350 arch/powerpc/kernel/process.c if (msr & MSR_FP) msr 352 arch/powerpc/kernel/process.c if (msr & MSR_VEC) msr 374 arch/powerpc/kernel/process.c (current->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP))) { msr 384 arch/powerpc/kernel/process.c MSR_TM_ACTIVE(current->thread.regs->msr)) msr 395 arch/powerpc/kernel/process.c if (tsk->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP)) { msr 434 arch/powerpc/kernel/process.c if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) { msr 445 arch/powerpc/kernel/process.c if (tsk->thread.regs->msr & MSR_SPE) { msr 488 arch/powerpc/kernel/process.c usermsr = tsk->thread.regs->msr; msr 526 arch/powerpc/kernel/process.c unsigned long msr; msr 528 arch/powerpc/kernel/process.c if (!MSR_TM_ACTIVE(regs->msr) && msr 532 arch/powerpc/kernel/process.c msr = regs->msr; msr 539 arch/powerpc/kernel/process.c if ((!(msr & MSR_FP)) && restore_fp(current)) msr 540 arch/powerpc/kernel/process.c msr |= MSR_FP | current->thread.fpexc_mode; msr 542 arch/powerpc/kernel/process.c if ((!(msr & MSR_VEC)) && restore_altivec(current)) msr 543 arch/powerpc/kernel/process.c msr |= MSR_VEC; msr 545 arch/powerpc/kernel/process.c if ((msr & (MSR_FP | MSR_VEC)) == (MSR_FP | MSR_VEC) && msr 547 arch/powerpc/kernel/process.c msr |= MSR_VSX; msr 552 arch/powerpc/kernel/process.c regs->msr = msr; msr 562 arch/powerpc/kernel/process.c usermsr = tsk->thread.regs->msr; msr 590 arch/powerpc/kernel/process.c if (tsk->thread.regs->msr & MSR_SPE) msr 826 arch/powerpc/kernel/process.c return tsk && tsk->thread.regs && (tsk->thread.regs->msr & MSR_TM); msr 865 arch/powerpc/kernel/process.c if ((thr->ckpt_regs.msr & MSR_FP) == 0) msr 868 arch/powerpc/kernel/process.c if ((thr->ckpt_regs.msr & MSR_VEC) == 0) msr 896 arch/powerpc/kernel/process.c if (!MSR_TM_ACTIVE(thr->regs->msr)) msr 904 arch/powerpc/kernel/process.c thr->regs->ccr, thr->regs->msr, msr 927 arch/powerpc/kernel/process.c if (!(thread->regs->msr & MSR_TM)) msr 963 arch/powerpc/kernel/process.c if (!MSR_TM_ACTIVE(new->thread.regs->msr)){ msr 969 arch/powerpc/kernel/process.c new->pid, new->thread.regs->msr); msr 978 arch/powerpc/kernel/process.c new->thread.regs->msr &= ~(MSR_FP | MSR_VEC | MSR_VSX); msr 995 arch/powerpc/kernel/process.c if (!MSR_TM_ACTIVE(prev->thread.regs->msr) && prev->thread.load_tm == 0) msr 996 arch/powerpc/kernel/process.c prev->thread.regs->msr &= ~MSR_TM; msr 1028 arch/powerpc/kernel/process.c if (!MSR_TM_ACTIVE(regs->msr)) msr 1031 arch/powerpc/kernel/process.c msr_diff = current->thread.ckpt_regs.msr & ~regs->msr; msr 1043 arch/powerpc/kernel/process.c regs->msr |= msr_diff; msr 1235 arch/powerpc/kernel/process.c if (!(regs->msr & MSR_IR)) msr 1398 arch/powerpc/kernel/process.c printk("MSR: "REG" ", regs->msr); msr 1399 arch/powerpc/kernel/process.c print_msr_bits(regs->msr); msr 1414 arch/powerpc/kernel/process.c if (MSR_TM_ACTIVE(regs->msr)) msr 1641 arch/powerpc/kernel/process.c childregs->msr &= ~(MSR_FP|MSR_VEC|MSR_VSX); msr 1737 arch/powerpc/kernel/process.c regs->msr = MSR_USER; msr 1779 arch/powerpc/kernel/process.c regs->msr = MSR_USER64; msr 1783 arch/powerpc/kernel/process.c regs->msr = MSR_USER32; msr 1864 arch/powerpc/kernel/process.c if (regs != NULL && (regs->msr & MSR_FP) != 0) msr 1865 arch/powerpc/kernel/process.c regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) msr 1913 arch/powerpc/kernel/process.c regs->msr &= ~MSR_LE; msr 1915 arch/powerpc/kernel/process.c regs->msr |= MSR_LE; msr 1934 arch/powerpc/kernel/process.c if (regs->msr & MSR_LE) { msr 111 arch/powerpc/kernel/ptrace.c REG_OFFSET_NAME(msr), msr 209 arch/powerpc/kernel/ptrace.c return task->thread.regs->msr | task->thread.fpexc_mode; msr 212 arch/powerpc/kernel/ptrace.c static int set_user_msr(struct task_struct *task, unsigned long msr) msr 214 arch/powerpc/kernel/ptrace.c task->thread.regs->msr &= ~MSR_DEBUGCHANGE; msr 215 arch/powerpc/kernel/ptrace.c task->thread.regs->msr |= msr & MSR_DEBUGCHANGE; msr 222 arch/powerpc/kernel/ptrace.c return task->thread.ckpt_regs.msr | task->thread.fpexc_mode; msr 225 arch/powerpc/kernel/ptrace.c static int set_user_ckpt_msr(struct task_struct *task, unsigned long msr) msr 227 arch/powerpc/kernel/ptrace.c task->thread.ckpt_regs.msr &= ~MSR_DEBUGCHANGE; msr 228 arch/powerpc/kernel/ptrace.c task->thread.ckpt_regs.msr |= msr & MSR_DEBUGCHANGE; msr 354 arch/powerpc/kernel/ptrace.c 0, offsetof(struct pt_regs, msr)); msr 356 arch/powerpc/kernel/ptrace.c unsigned long msr = get_user_msr(target); msr 357 arch/powerpc/kernel/ptrace.c ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr, msr 358 arch/powerpc/kernel/ptrace.c offsetof(struct pt_regs, msr), msr 359 arch/powerpc/kernel/ptrace.c offsetof(struct pt_regs, msr) + msr 360 arch/powerpc/kernel/ptrace.c sizeof(msr)); msr 364 arch/powerpc/kernel/ptrace.c offsetof(struct pt_regs, msr) + sizeof(long)); msr 403 arch/powerpc/kernel/ptrace.c offsetof(struct pt_regs, msr) + sizeof(long)); msr 807 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 843 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 852 arch/powerpc/kernel/ptrace.c 0, offsetof(struct pt_regs, msr)); msr 854 arch/powerpc/kernel/ptrace.c unsigned long msr = get_user_ckpt_msr(target); msr 856 arch/powerpc/kernel/ptrace.c ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr, msr 857 arch/powerpc/kernel/ptrace.c offsetof(struct pt_regs, msr), msr 858 arch/powerpc/kernel/ptrace.c offsetof(struct pt_regs, msr) + msr 859 arch/powerpc/kernel/ptrace.c sizeof(msr)); msr 863 arch/powerpc/kernel/ptrace.c offsetof(struct pt_regs, msr) + sizeof(long)); msr 908 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 928 arch/powerpc/kernel/ptrace.c offsetof(struct pt_regs, msr) + sizeof(long)); msr 972 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1010 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1056 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1091 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1131 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1193 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1236 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1274 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1322 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1478 arch/powerpc/kernel/ptrace.c if (MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1494 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1512 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1526 arch/powerpc/kernel/ptrace.c if (MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1543 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1561 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1575 arch/powerpc/kernel/ptrace.c if (MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1591 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 1609 arch/powerpc/kernel/ptrace.c if (!MSR_TM_ACTIVE(target->thread.regs->msr)) msr 2310 arch/powerpc/kernel/ptrace.c regs->msr |= MSR_DE; msr 2312 arch/powerpc/kernel/ptrace.c regs->msr &= ~MSR_BE; msr 2313 arch/powerpc/kernel/ptrace.c regs->msr |= MSR_SE; msr 2327 arch/powerpc/kernel/ptrace.c regs->msr |= MSR_DE; msr 2329 arch/powerpc/kernel/ptrace.c regs->msr &= ~MSR_SE; msr 2330 arch/powerpc/kernel/ptrace.c regs->msr |= MSR_BE; msr 2358 arch/powerpc/kernel/ptrace.c regs->msr &= ~MSR_DE; msr 2361 arch/powerpc/kernel/ptrace.c regs->msr &= ~(MSR_SE | MSR_BE); msr 2488 arch/powerpc/kernel/ptrace.c task->thread.regs->msr &= ~MSR_DE; msr 2510 arch/powerpc/kernel/ptrace.c task->thread.regs->msr |= MSR_DE; msr 2610 arch/powerpc/kernel/ptrace.c child->thread.regs->msr |= MSR_DE; msr 2725 arch/powerpc/kernel/ptrace.c child->thread.regs->msr |= MSR_DE; msr 2819 arch/powerpc/kernel/ptrace.c child->thread.regs->msr |= MSR_DE; msr 2955 arch/powerpc/kernel/ptrace.c child->thread.regs->msr &= ~MSR_DE; msr 3370 arch/powerpc/kernel/ptrace.c BUILD_BUG_ON(offsetof(struct pt_regs, msr) != msr 3371 arch/powerpc/kernel/ptrace.c offsetof(struct user_pt_regs, msr)); msr 3372 arch/powerpc/kernel/ptrace.c BUILD_BUG_ON(offsetof(struct pt_regs, msr) != msr 3373 arch/powerpc/kernel/ptrace.c offsetof(struct user_pt_regs, msr)); msr 208 arch/powerpc/kernel/signal.c if (MSR_TM_ACTIVE(tsk->thread.regs->msr)) { msr 211 arch/powerpc/kernel/signal.c if (MSR_TM_TRANSACTIONAL(tsk->thread.regs->msr)) msr 221 arch/powerpc/kernel/signal.c tsk->thread.regs->msr &= ~MSR_TS_MASK; msr 387 arch/powerpc/kernel/signal_32.c unsigned long msr = regs->msr; msr 405 arch/powerpc/kernel/signal_32.c msr |= MSR_VEC; msr 427 arch/powerpc/kernel/signal_32.c msr &= ~MSR_VSX; msr 439 arch/powerpc/kernel/signal_32.c msr |= MSR_VSX; msr 451 arch/powerpc/kernel/signal_32.c msr |= MSR_SPE; msr 460 arch/powerpc/kernel/signal_32.c if (__put_user(msr, &frame->mc_gregs[PT_MSR])) msr 493 arch/powerpc/kernel/signal_32.c unsigned long msr) msr 508 arch/powerpc/kernel/signal_32.c if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR])) msr 517 arch/powerpc/kernel/signal_32.c if (msr & MSR_VEC) { msr 532 arch/powerpc/kernel/signal_32.c msr |= MSR_VEC; msr 545 arch/powerpc/kernel/signal_32.c if (msr & MSR_VEC) { msr 558 arch/powerpc/kernel/signal_32.c if (msr & MSR_FP) { msr 576 arch/powerpc/kernel/signal_32.c if (msr & MSR_VSX) { msr 585 arch/powerpc/kernel/signal_32.c msr |= MSR_VSX; msr 599 arch/powerpc/kernel/signal_32.c msr |= MSR_SPE; msr 607 arch/powerpc/kernel/signal_32.c if (__put_user(msr, &frame->mc_gregs[PT_MSR])) msr 631 arch/powerpc/kernel/signal_32.c unsigned long msr; msr 644 arch/powerpc/kernel/signal_32.c err |= __get_user(msr, &sr->mc_gregs[PT_MSR]); msr 652 arch/powerpc/kernel/signal_32.c regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); msr 659 arch/powerpc/kernel/signal_32.c regs->msr &= ~MSR_VEC; msr 660 arch/powerpc/kernel/signal_32.c if (msr & MSR_VEC) { msr 684 arch/powerpc/kernel/signal_32.c regs->msr &= ~MSR_VSX; msr 685 arch/powerpc/kernel/signal_32.c if (msr & MSR_VSX) { msr 701 arch/powerpc/kernel/signal_32.c regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); msr 706 arch/powerpc/kernel/signal_32.c regs->msr &= ~MSR_SPE; msr 707 arch/powerpc/kernel/signal_32.c if (msr & MSR_SPE) { msr 735 arch/powerpc/kernel/signal_32.c unsigned long msr, msr_hi; msr 754 arch/powerpc/kernel/signal_32.c err |= __get_user(msr, &sr->mc_gregs[PT_MSR]); msr 759 arch/powerpc/kernel/signal_32.c regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); msr 762 arch/powerpc/kernel/signal_32.c regs->msr &= ~MSR_VEC; msr 763 arch/powerpc/kernel/signal_32.c if (msr & MSR_VEC) { msr 789 arch/powerpc/kernel/signal_32.c regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); msr 796 arch/powerpc/kernel/signal_32.c regs->msr &= ~MSR_VSX; msr 797 arch/powerpc/kernel/signal_32.c if (msr & MSR_VSX) { msr 817 arch/powerpc/kernel/signal_32.c regs->msr &= ~MSR_SPE; msr 818 arch/powerpc/kernel/signal_32.c if (msr & MSR_SPE) { msr 856 arch/powerpc/kernel/signal_32.c regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK); msr 868 arch/powerpc/kernel/signal_32.c msr_check_and_set(msr & (MSR_FP | MSR_VEC)); msr 869 arch/powerpc/kernel/signal_32.c if (msr & MSR_FP) { msr 871 arch/powerpc/kernel/signal_32.c regs->msr |= (MSR_FP | current->thread.fpexc_mode); msr 874 arch/powerpc/kernel/signal_32.c if (msr & MSR_VEC) { msr 876 arch/powerpc/kernel/signal_32.c regs->msr |= MSR_VEC; msr 909 arch/powerpc/kernel/signal_32.c unsigned long msr = regs->msr; msr 943 arch/powerpc/kernel/signal_32.c if (MSR_TM_ACTIVE(msr)) { msr 949 arch/powerpc/kernel/signal_32.c if (save_tm_user_regs(regs, frame, tm_frame, sigret, msr)) msr 978 arch/powerpc/kernel/signal_32.c regs->msr &= ~MSR_LE; msr 979 arch/powerpc/kernel/signal_32.c regs->msr |= (MSR_KERNEL & MSR_LE); msr 1214 arch/powerpc/kernel/signal_32.c regs->msr &= ~MSR_TS_MASK; msr 1258 arch/powerpc/kernel/signal_32.c unsigned long new_msr = regs->msr; msr 1308 arch/powerpc/kernel/signal_32.c regs->msr = new_msr; msr 1370 arch/powerpc/kernel/signal_32.c unsigned long msr = regs->msr; msr 1405 arch/powerpc/kernel/signal_32.c if (MSR_TM_ACTIVE(msr)) { msr 1407 arch/powerpc/kernel/signal_32.c sigret, msr)) msr 1431 arch/powerpc/kernel/signal_32.c regs->msr &= ~MSR_LE; msr 108 arch/powerpc/kernel/signal_64.c unsigned long msr = regs->msr; msr 127 arch/powerpc/kernel/signal_64.c msr |= MSR_VEC; msr 150 arch/powerpc/kernel/signal_64.c msr &= ~MSR_VSX; msr 164 arch/powerpc/kernel/signal_64.c msr |= MSR_VSX; msr 170 arch/powerpc/kernel/signal_64.c err |= __put_user(msr, &sc->gp_regs[PT_MSR]); msr 196 arch/powerpc/kernel/signal_64.c unsigned long msr) msr 215 arch/powerpc/kernel/signal_64.c BUG_ON(!MSR_TM_ACTIVE(msr)); msr 223 arch/powerpc/kernel/signal_64.c msr |= tsk->thread.ckpt_regs.msr & (MSR_FP | MSR_VEC | MSR_VSX); msr 237 arch/powerpc/kernel/signal_64.c if (msr & MSR_VEC) msr 249 arch/powerpc/kernel/signal_64.c msr |= MSR_VEC; msr 257 arch/powerpc/kernel/signal_64.c if (msr & MSR_VEC) msr 271 arch/powerpc/kernel/signal_64.c if (msr & MSR_FP) msr 288 arch/powerpc/kernel/signal_64.c if (msr & MSR_VSX) msr 296 arch/powerpc/kernel/signal_64.c msr |= MSR_VSX; msr 306 arch/powerpc/kernel/signal_64.c err |= __put_user(msr, &tm_sc->gp_regs[PT_MSR]); msr 307 arch/powerpc/kernel/signal_64.c err |= __put_user(msr, &sc->gp_regs[PT_MSR]); msr 329 arch/powerpc/kernel/signal_64.c unsigned long msr; msr 345 arch/powerpc/kernel/signal_64.c err |= __get_user(msr, &sc->gp_regs[PT_MSR]); msr 347 arch/powerpc/kernel/signal_64.c regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); msr 369 arch/powerpc/kernel/signal_64.c regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX); msr 378 arch/powerpc/kernel/signal_64.c if (v_regs != NULL && (msr & MSR_VEC) != 0) { msr 402 arch/powerpc/kernel/signal_64.c if ((msr & MSR_VSX) != 0) { msr 426 arch/powerpc/kernel/signal_64.c unsigned long msr; msr 454 arch/powerpc/kernel/signal_64.c err |= __get_user(msr, &sc->gp_regs[PT_MSR]); msr 456 arch/powerpc/kernel/signal_64.c if (MSR_TM_RESV(msr)) msr 460 arch/powerpc/kernel/signal_64.c regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); msr 489 arch/powerpc/kernel/signal_64.c regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX); msr 501 arch/powerpc/kernel/signal_64.c if (v_regs != NULL && tm_v_regs != NULL && (msr & MSR_VEC) != 0) { msr 535 arch/powerpc/kernel/signal_64.c if (v_regs && ((msr & MSR_VSX) != 0)) { msr 559 arch/powerpc/kernel/signal_64.c regs->msr |= msr & MSR_TS_MASK; msr 577 arch/powerpc/kernel/signal_64.c regs->msr |= MSR_TM; msr 582 arch/powerpc/kernel/signal_64.c msr_check_and_set(msr & (MSR_FP | MSR_VEC)); msr 583 arch/powerpc/kernel/signal_64.c if (msr & MSR_FP) { msr 585 arch/powerpc/kernel/signal_64.c regs->msr |= (MSR_FP | tsk->thread.fpexc_mode); msr 587 arch/powerpc/kernel/signal_64.c if (msr & MSR_VEC) { msr 589 arch/powerpc/kernel/signal_64.c regs->msr |= MSR_VEC; msr 712 arch/powerpc/kernel/signal_64.c unsigned long msr; msr 762 arch/powerpc/kernel/signal_64.c regs->msr &= ~MSR_TS_MASK; msr 764 arch/powerpc/kernel/signal_64.c if (__get_user(msr, &uc->uc_mcontext.gp_regs[PT_MSR])) msr 766 arch/powerpc/kernel/signal_64.c if (MSR_TM_ACTIVE(msr)) { msr 794 arch/powerpc/kernel/signal_64.c current->thread.regs->msr &= ~MSR_TS_MASK; msr 807 arch/powerpc/kernel/signal_64.c printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32, msr 824 arch/powerpc/kernel/signal_64.c unsigned long msr = regs->msr; msr 843 arch/powerpc/kernel/signal_64.c if (MSR_TM_ACTIVE(msr)) { msr 852 arch/powerpc/kernel/signal_64.c msr); msr 900 arch/powerpc/kernel/signal_64.c regs->msr &= ~MSR_LE; msr 901 arch/powerpc/kernel/signal_64.c regs->msr |= (MSR_KERNEL & MSR_LE); msr 919 arch/powerpc/kernel/signal_64.c printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32, msr 125 arch/powerpc/kernel/syscalls.c current->thread.regs->msr ^= MSR_LE; msr 403 arch/powerpc/kernel/traps.c if (!(regs->msr & MSR_RI)) msr 405 arch/powerpc/kernel/traps.c if (!(regs->msr & MSR_HV)) msr 407 arch/powerpc/kernel/traps.c if (regs->msr & MSR_PR) msr 437 arch/powerpc/kernel/traps.c regs->msr &= ~MSR_RI; msr 516 arch/powerpc/kernel/traps.c if (!(regs->msr & MSR_RI)) msr 543 arch/powerpc/kernel/traps.c unsigned long msr = regs->msr; msr 547 arch/powerpc/kernel/traps.c if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000))) msr 569 arch/powerpc/kernel/traps.c regs->msr |= MSR_RI; msr 594 arch/powerpc/kernel/traps.c #define get_reason(regs) ((regs)->msr) msr 601 arch/powerpc/kernel/traps.c #define single_stepping(regs) ((regs)->msr & MSR_SE) msr 602 arch/powerpc/kernel/traps.c #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE) msr 603 arch/powerpc/kernel/traps.c #define clear_br_trace(regs) ((regs)->msr &= ~MSR_BE) msr 788 arch/powerpc/kernel/traps.c unsigned long reason = regs->msr; msr 860 arch/powerpc/kernel/traps.c if (!(regs->msr & MSR_RI)) msr 881 arch/powerpc/kernel/traps.c unsigned long ea, msr, msr_mask; msr 902 arch/powerpc/kernel/traps.c msr = regs->msr; /* Grab msr before we flush the bits */ msr 910 arch/powerpc/kernel/traps.c swap = (msr & MSR_LE) != (MSR_KERNEL & MSR_LE); msr 969 arch/powerpc/kernel/traps.c if (!(msr & msr_mask)) { msr 973 arch/powerpc/kernel/traps.c regs->nip, instr, msr); msr 1090 arch/powerpc/kernel/traps.c regs->nip, regs->msr, regs->trap); msr 1237 arch/powerpc/kernel/traps.c if ((regs->msr & MSR_64BIT) == 0) msr 1315 arch/powerpc/kernel/traps.c if (MSR_TM_TRANSACTIONAL(regs->msr)) { msr 1492 arch/powerpc/kernel/traps.c if (!is_kernel_addr(bugaddr) && !(regs->msr & MSR_IR)) msr 1495 arch/powerpc/kernel/traps.c if (!(regs->msr & MSR_PR) && /* not user-mode */ msr 1526 arch/powerpc/kernel/traps.c regs->nip, regs->msr, get_paca()->tm_scratch); msr 1587 arch/powerpc/kernel/traps.c regs->msr |= REASON_ILLEGAL; msr 1690 arch/powerpc/kernel/traps.c regs->msr |= MSR_TM; msr 1811 arch/powerpc/kernel/traps.c hv ? "Hypervisor " : "", facility, status, regs->nip, regs->msr); msr 1825 arch/powerpc/kernel/traps.c regs->nip, regs->msr); msr 1861 arch/powerpc/kernel/traps.c regs->nip, regs->msr); msr 1879 arch/powerpc/kernel/traps.c regs->nip, regs->msr); msr 1951 arch/powerpc/kernel/traps.c regs->msr |= MSR_DE; msr 1970 arch/powerpc/kernel/traps.c regs->msr &= ~MSR_DE; msr 1981 arch/powerpc/kernel/traps.c regs->msr |= MSR_DE; msr 1995 arch/powerpc/kernel/traps.c regs->msr &= ~MSR_DE; msr 2017 arch/powerpc/kernel/traps.c regs->msr |= MSR_DE; msr 2034 arch/powerpc/kernel/traps.c regs->nip, regs->msr, regs->trap, print_tainted()); msr 2149 arch/powerpc/kernel/traps.c if (regs->msr & MSR_SPE) msr 2184 arch/powerpc/kernel/traps.c regs->trap, regs->nip, regs->msr); msr 546 arch/powerpc/kvm/book3s.c regs->msr = kvmppc_get_msr(vcpu); msr 574 arch/powerpc/kvm/book3s.c kvmppc_set_msr(vcpu, regs->msr); msr 785 arch/powerpc/kvm/book3s.c void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) msr 787 arch/powerpc/kvm/book3s.c vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr); msr 359 arch/powerpc/kvm/book3s_32_mmu.c u64 msr = kvmppc_get_msr(vcpu); msr 361 arch/powerpc/kvm/book3s_32_mmu.c if (msr & (MSR_DR|MSR_IR)) { msr 370 arch/powerpc/kvm/book3s_32_mmu.c switch (msr & (MSR_DR|MSR_IR)) { msr 390 arch/powerpc/kvm/book3s_32_mmu.c if (msr & MSR_PR) msr 29 arch/powerpc/kvm/book3s_64_mmu.c unsigned long msr = vcpu->arch.intr_msr; msr 34 arch/powerpc/kvm/book3s_64_mmu.c msr |= MSR_TS_S; msr 36 arch/powerpc/kvm/book3s_64_mmu.c msr |= cur_msr & MSR_TS_MASK; msr 38 arch/powerpc/kvm/book3s_64_mmu.c kvmppc_set_msr(vcpu, msr); msr 595 arch/powerpc/kvm/book3s_64_mmu.c u64 msr = kvmppc_get_msr(vcpu); msr 597 arch/powerpc/kvm/book3s_64_mmu.c if (msr & (MSR_DR|MSR_IR)) { msr 610 arch/powerpc/kvm/book3s_64_mmu.c switch (msr & (MSR_DR|MSR_IR)) { msr 280 arch/powerpc/kvm/book3s_64_mmu_hv.c unsigned long msr = vcpu->arch.intr_msr; msr 283 arch/powerpc/kvm/book3s_64_mmu_hv.c if (MSR_TM_TRANSACTIONAL(vcpu->arch.shregs.msr)) msr 284 arch/powerpc/kvm/book3s_64_mmu_hv.c msr |= MSR_TS_S; msr 286 arch/powerpc/kvm/book3s_64_mmu_hv.c msr |= vcpu->arch.shregs.msr & MSR_TS_MASK; msr 287 arch/powerpc/kvm/book3s_64_mmu_hv.c kvmppc_set_msr(vcpu, msr); msr 350 arch/powerpc/kvm/book3s_64_mmu_hv.c int virtmode = vcpu->arch.shregs.msr & (data ? MSR_DR : MSR_IR); msr 388 arch/powerpc/kvm/book3s_64_mmu_hv.c key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS; msr 341 arch/powerpc/kvm/book3s_hv.c static void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr) msr 347 arch/powerpc/kvm/book3s_hv.c if ((msr & MSR_TS_MASK) == MSR_TS_MASK) msr 348 arch/powerpc/kvm/book3s_hv.c msr &= ~MSR_TS_MASK; msr 349 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.msr = msr; msr 420 arch/powerpc/kvm/book3s_hv.c vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); msr 726 arch/powerpc/kvm/book3s_hv.c dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); msr 1097 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.msr |= MSR_EE; msr 1265 arch/powerpc/kvm/book3s_hv.c if (vcpu->arch.shregs.msr & MSR_HV) { msr 1269 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.msr); msr 1306 arch/powerpc/kvm/book3s_hv.c ulong flags = vcpu->arch.shregs.msr & 0x083c0000; msr 1334 arch/powerpc/kvm/book3s_hv.c flags = vcpu->arch.shregs.msr & 0x1f0000ull; msr 1368 arch/powerpc/kvm/book3s_hv.c vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr & msr 1370 arch/powerpc/kvm/book3s_hv.c if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) msr 1430 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.msr); msr 1454 arch/powerpc/kvm/book3s_hv.c if (vcpu->arch.shregs.msr & MSR_HV) { msr 1458 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.msr); msr 1504 arch/powerpc/kvm/book3s_hv.c if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) msr 3557 arch/powerpc/kvm/book3s_hv.c kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true); msr 3603 arch/powerpc/kvm/book3s_hv.c vcpu->arch.regs.msr = vcpu->arch.shregs.msr; msr 3616 arch/powerpc/kvm/book3s_hv.c vcpu->arch.shregs.msr = vcpu->arch.regs.msr; msr 3676 arch/powerpc/kvm/book3s_hv.c kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true); msr 4237 arch/powerpc/kvm/book3s_hv.c (current->thread.regs->msr & MSR_TM)) { msr 4238 arch/powerpc/kvm/book3s_hv.c if (MSR_TM_ACTIVE(current->thread.regs->msr)) { msr 4248 arch/powerpc/kvm/book3s_hv.c current->thread.regs->msr &= ~MSR_TM; msr 4306 arch/powerpc/kvm/book3s_hv.c !(vcpu->arch.shregs.msr & MSR_PR)) { msr 775 arch/powerpc/kvm/book3s_hv_builtin.c if (vcpu->arch.shregs.msr & MSR_EE) { msr 787 arch/powerpc/kvm/book3s_hv_builtin.c unsigned long msr, old_msr = vcpu->arch.shregs.msr; msr 792 arch/powerpc/kvm/book3s_hv_builtin.c msr = vcpu->arch.intr_msr; msr 794 arch/powerpc/kvm/book3s_hv_builtin.c msr |= MSR_TS_S; msr 795 arch/powerpc/kvm/book3s_hv_builtin.c vcpu->arch.shregs.msr = msr; msr 266 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.regs.msr = vcpu->arch.shregs.msr; msr 278 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.msr = vcpu->arch.regs.msr; msr 299 arch/powerpc/kvm/book3s_hv_nested.c l2_regs.msr = vcpu->arch.shregs.msr; msr 309 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.msr = saved_l1_regs.msr & ~MSR_TS_MASK; msr 311 arch/powerpc/kvm/book3s_hv_nested.c if (l2_regs.msr & MSR_TS_MASK) msr 312 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.msr |= MSR_TS_S; msr 1189 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.msr &= ~0x783f0000ul; msr 1190 arch/powerpc/kvm/book3s_hv_nested.c vcpu->arch.shregs.msr |= flags; msr 70 arch/powerpc/kvm/book3s_hv_ras.c unsigned long srr1 = vcpu->arch.shregs.msr; msr 1259 arch/powerpc/kvm/book3s_hv_rm_mmu.c key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS; msr 1276 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (data && (vcpu->arch.shregs.msr & MSR_DR)) { msr 1312 arch/powerpc/kvm/book3s_hv_rm_mmu.c if (data && (vcpu->arch.shregs.msr & MSR_IR)) msr 17 arch/powerpc/kvm/book3s_hv_tm.c u64 msr = vcpu->arch.shregs.msr; msr 21 arch/powerpc/kvm/book3s_hv_tm.c if (MSR_TM_SUSPENDED(vcpu->arch.shregs.msr)) msr 23 arch/powerpc/kvm/book3s_hv_tm.c if (msr & MSR_PR) { msr 43 arch/powerpc/kvm/book3s_hv_tm.c u64 msr = vcpu->arch.shregs.msr; msr 52 arch/powerpc/kvm/book3s_hv_tm.c WARN_ON_ONCE(!(MSR_TM_SUSPENDED(msr) && msr 56 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.shregs.msr = newmsr; msr 62 arch/powerpc/kvm/book3s_hv_tm.c if ((msr & MSR_PR) && (vcpu->arch.vcore->pcr & PCR_ARCH_206)) { msr 73 arch/powerpc/kvm/book3s_hv_tm.c if ((msr & MSR_PR) && !(vcpu->arch.fscr & FSCR_EBB)) { msr 82 arch/powerpc/kvm/book3s_hv_tm.c WARN_ON_ONCE(!(MSR_TM_SUSPENDED(msr) && msr 88 arch/powerpc/kvm/book3s_hv_tm.c msr = (msr & ~MSR_TS_MASK) | MSR_TS_T; msr 89 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.shregs.msr = msr; msr 99 arch/powerpc/kvm/book3s_hv_tm.c WARN_ON_ONCE(!(MSR_TM_SUSPENDED(msr) && msr 103 arch/powerpc/kvm/book3s_hv_tm.c newmsr = (newmsr & ~MSR_LE) | (msr & MSR_LE); msr 105 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.shregs.msr = newmsr; msr 110 arch/powerpc/kvm/book3s_hv_tm.c if ((msr & MSR_PR) && (vcpu->arch.vcore->pcr & PCR_ARCH_206)) { msr 121 arch/powerpc/kvm/book3s_hv_tm.c if (!(msr & MSR_TM)) { msr 131 arch/powerpc/kvm/book3s_hv_tm.c (((msr & MSR_TS_MASK) >> MSR_TS_S_LG) << 29); msr 134 arch/powerpc/kvm/book3s_hv_tm.c if (MSR_TM_SUSPENDED(msr)) msr 135 arch/powerpc/kvm/book3s_hv_tm.c msr = (msr & ~MSR_TS_MASK) | MSR_TS_T; msr 137 arch/powerpc/kvm/book3s_hv_tm.c if (MSR_TM_TRANSACTIONAL(msr)) msr 138 arch/powerpc/kvm/book3s_hv_tm.c msr = (msr & ~MSR_TS_MASK) | MSR_TS_S; msr 140 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.shregs.msr = msr; msr 150 arch/powerpc/kvm/book3s_hv_tm.c if (!(msr & MSR_TM)) { msr 159 arch/powerpc/kvm/book3s_hv_tm.c if (!MSR_TM_ACTIVE(msr)) { msr 175 arch/powerpc/kvm/book3s_hv_tm.c (((msr & MSR_TS_MASK) >> MSR_TS_S_LG) << 29); msr 176 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.shregs.msr &= ~MSR_TS_MASK; msr 187 arch/powerpc/kvm/book3s_hv_tm.c if (!(msr & MSR_TM)) { msr 196 arch/powerpc/kvm/book3s_hv_tm.c if (MSR_TM_ACTIVE(msr) || !(vcpu->arch.texasr & TEXASR_FS)) { msr 205 arch/powerpc/kvm/book3s_hv_tm.c (((msr & MSR_TS_MASK) >> MSR_TS_S_LG) << 29); msr 206 arch/powerpc/kvm/book3s_hv_tm.c vcpu->arch.shregs.msr = msr | MSR_TS_S; msr 23 arch/powerpc/kvm/book3s_hv_tm_builtin.c u64 newmsr, msr, bescr; msr 34 arch/powerpc/kvm/book3s_hv_tm_builtin.c vcpu->arch.shregs.msr = newmsr; msr 41 arch/powerpc/kvm/book3s_hv_tm_builtin.c msr = vcpu->arch.shregs.msr; msr 42 arch/powerpc/kvm/book3s_hv_tm_builtin.c if ((msr & MSR_PR) && (vcpu->arch.vcore->pcr & PCR_ARCH_206)) msr 46 arch/powerpc/kvm/book3s_hv_tm_builtin.c ((msr & MSR_PR) && !(mfspr(SPRN_FSCR) & FSCR_EBB))) msr 56 arch/powerpc/kvm/book3s_hv_tm_builtin.c msr = (msr & ~MSR_TS_MASK) | MSR_TS_T; msr 57 arch/powerpc/kvm/book3s_hv_tm_builtin.c vcpu->arch.shregs.msr = msr; msr 66 arch/powerpc/kvm/book3s_hv_tm_builtin.c msr = vcpu->arch.shregs.msr; msr 71 arch/powerpc/kvm/book3s_hv_tm_builtin.c newmsr = (newmsr & ~MSR_LE) | (msr & MSR_LE); msr 73 arch/powerpc/kvm/book3s_hv_tm_builtin.c vcpu->arch.shregs.msr = newmsr; msr 78 arch/powerpc/kvm/book3s_hv_tm_builtin.c msr = vcpu->arch.shregs.msr; msr 80 arch/powerpc/kvm/book3s_hv_tm_builtin.c if ((msr & MSR_PR) && (vcpu->arch.vcore->pcr & PCR_ARCH_206)) msr 83 arch/powerpc/kvm/book3s_hv_tm_builtin.c if (!(vcpu->arch.hfscr & HFSCR_TM) || !(msr & MSR_TM)) msr 87 arch/powerpc/kvm/book3s_hv_tm_builtin.c vcpu->arch.shregs.msr = (msr & ~MSR_TS_MASK) | MSR_TS_T; msr 103 arch/powerpc/kvm/book3s_hv_tm_builtin.c vcpu->arch.shregs.msr &= ~MSR_TS_MASK; /* go to N state */ msr 158 arch/powerpc/kvm/book3s_paired_singles.c u64 msr = kvmppc_get_msr(vcpu); msr 160 arch/powerpc/kvm/book3s_paired_singles.c msr = kvmppc_set_field(msr, 33, 36, 0); msr 161 arch/powerpc/kvm/book3s_paired_singles.c msr = kvmppc_set_field(msr, 42, 47, 0); msr 162 arch/powerpc/kvm/book3s_paired_singles.c kvmppc_set_msr(vcpu, msr); msr 53 arch/powerpc/kvm/book3s_pr.c ulong msr); msr 68 arch/powerpc/kvm/book3s_pr.c ulong msr = kvmppc_get_msr(vcpu); msr 69 arch/powerpc/kvm/book3s_pr.c return (msr & (MSR_IR|MSR_DR)) == MSR_DR; msr 74 arch/powerpc/kvm/book3s_pr.c ulong msr = kvmppc_get_msr(vcpu); msr 78 arch/powerpc/kvm/book3s_pr.c if ((msr & (MSR_IR|MSR_DR)) != MSR_DR) msr 451 arch/powerpc/kvm/book3s_pr.c static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr) msr 457 arch/powerpc/kvm/book3s_pr.c msr = (msr & ~MSR_HV) | MSR_ME; msr 460 arch/powerpc/kvm/book3s_pr.c printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr); msr 468 arch/powerpc/kvm/book3s_pr.c if (!(msr & MSR_PR) && MSR_TM_TRANSACTIONAL(msr)) msr 474 arch/powerpc/kvm/book3s_pr.c msr &= to_book3s(vcpu)->msr_mask; msr 475 arch/powerpc/kvm/book3s_pr.c kvmppc_set_msr_fast(vcpu, msr); msr 478 arch/powerpc/kvm/book3s_pr.c if (msr & MSR_POW) { msr 485 arch/powerpc/kvm/book3s_pr.c msr &= ~MSR_POW; msr 486 arch/powerpc/kvm/book3s_pr.c kvmppc_set_msr_fast(vcpu, msr); msr 501 arch/powerpc/kvm/book3s_pr.c if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) { msr 504 arch/powerpc/kvm/book3s_pr.c if (msr & MSR_DR) msr 520 arch/powerpc/kvm/book3s_pr.c !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) { msr 784 arch/powerpc/kvm/book3s_pr.c void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr) msr 792 arch/powerpc/kvm/book3s_pr.c if (msr & MSR_VSX) msr 793 arch/powerpc/kvm/book3s_pr.c msr |= MSR_FP | MSR_VEC; msr 795 arch/powerpc/kvm/book3s_pr.c msr &= vcpu->arch.guest_owned_ext; msr 796 arch/powerpc/kvm/book3s_pr.c if (!msr) msr 800 arch/powerpc/kvm/book3s_pr.c printk(KERN_INFO "Giving up ext 0x%lx\n", msr); msr 803 arch/powerpc/kvm/book3s_pr.c if (msr & MSR_FP) { msr 809 arch/powerpc/kvm/book3s_pr.c if (t->regs->msr & MSR_FP) msr 815 arch/powerpc/kvm/book3s_pr.c if (msr & MSR_VEC) { msr 816 arch/powerpc/kvm/book3s_pr.c if (current->thread.regs->msr & MSR_VEC) msr 822 arch/powerpc/kvm/book3s_pr.c vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX); msr 847 arch/powerpc/kvm/book3s_pr.c ulong msr) msr 855 arch/powerpc/kvm/book3s_pr.c if (!(kvmppc_get_msr(vcpu) & msr)) { msr 860 arch/powerpc/kvm/book3s_pr.c if (msr == MSR_VSX) { msr 874 arch/powerpc/kvm/book3s_pr.c msr = MSR_FP | MSR_VEC | MSR_VSX; msr 878 arch/powerpc/kvm/book3s_pr.c msr &= ~vcpu->arch.guest_owned_ext; msr 879 arch/powerpc/kvm/book3s_pr.c if (!msr) msr 883 arch/powerpc/kvm/book3s_pr.c printk(KERN_INFO "Loading up ext 0x%lx\n", msr); msr 886 arch/powerpc/kvm/book3s_pr.c if (msr & MSR_FP) { msr 895 arch/powerpc/kvm/book3s_pr.c if (msr & MSR_VEC) { msr 906 arch/powerpc/kvm/book3s_pr.c t->regs->msr |= msr; msr 907 arch/powerpc/kvm/book3s_pr.c vcpu->arch.guest_owned_ext |= msr; msr 921 arch/powerpc/kvm/book3s_pr.c lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr; msr 941 arch/powerpc/kvm/book3s_pr.c current->thread.regs->msr |= lost_ext; msr 1041 arch/powerpc/kvm/book3s_pr.c u64 msr = kvmppc_get_msr(vcpu); msr 1043 arch/powerpc/kvm/book3s_pr.c kvmppc_set_msr(vcpu, msr | MSR_SE); msr 1050 arch/powerpc/kvm/book3s_pr.c u64 msr = kvmppc_get_msr(vcpu); msr 1052 arch/powerpc/kvm/book3s_pr.c kvmppc_set_msr(vcpu, msr & ~MSR_SE); msr 70 arch/powerpc/kvm/booke.c vcpu->arch.shared->msr); msr 110 arch/powerpc/kvm/booke.c if (vcpu->arch.shared->msr & MSR_SPE) { msr 135 arch/powerpc/kvm/booke.c if (!(current->thread.regs->msr & MSR_FP)) { msr 140 arch/powerpc/kvm/booke.c current->thread.regs->msr |= MSR_FP; msr 152 arch/powerpc/kvm/booke.c if (current->thread.regs->msr & MSR_FP) msr 164 arch/powerpc/kvm/booke.c vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP; msr 177 arch/powerpc/kvm/booke.c if (!(current->thread.regs->msr & MSR_VEC)) { msr 182 arch/powerpc/kvm/booke.c current->thread.regs->msr |= MSR_VEC; msr 196 arch/powerpc/kvm/booke.c if (current->thread.regs->msr & MSR_VEC) msr 208 arch/powerpc/kvm/booke.c vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE; msr 218 arch/powerpc/kvm/booke.c vcpu->arch.shared->msr |= MSR_DE; msr 221 arch/powerpc/kvm/booke.c vcpu->arch.shared->msr &= ~MSR_DE; msr 232 arch/powerpc/kvm/booke.c u32 old_msr = vcpu->arch.shared->msr; msr 238 arch/powerpc/kvm/booke.c vcpu->arch.shared->msr = new_msr; msr 398 arch/powerpc/kvm/booke.c ulong new_msr = vcpu->arch.shared->msr; msr 401 arch/powerpc/kvm/booke.c if (!(vcpu->arch.shared->msr & MSR_SF)) { msr 409 arch/powerpc/kvm/booke.c crit = crit && !(vcpu->arch.shared->msr & MSR_PR); msr 449 arch/powerpc/kvm/booke.c allowed = vcpu->arch.shared->msr & MSR_CE; msr 455 arch/powerpc/kvm/booke.c allowed = vcpu->arch.shared->msr & MSR_ME; msr 465 arch/powerpc/kvm/booke.c allowed = vcpu->arch.shared->msr & MSR_EE; msr 471 arch/powerpc/kvm/booke.c allowed = vcpu->arch.shared->msr & MSR_DE; msr 486 arch/powerpc/kvm/booke.c vcpu->arch.shared->msr); msr 490 arch/powerpc/kvm/booke.c vcpu->arch.shared->msr); msr 494 arch/powerpc/kvm/booke.c vcpu->arch.shared->msr); msr 498 arch/powerpc/kvm/booke.c vcpu->arch.shared->msr); msr 694 arch/powerpc/kvm/booke.c if (vcpu->arch.shared->msr & MSR_WE) { msr 853 arch/powerpc/kvm/booke.c if (dbsr && (vcpu->arch.shared->msr & MSR_DE) && msr 858 arch/powerpc/kvm/booke.c if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE)) msr 890 arch/powerpc/kvm/booke.c ulong r1, ip, msr, lr; msr 894 arch/powerpc/kvm/booke.c asm("mfmsr %0" : "=r"(msr)); msr 900 arch/powerpc/kvm/booke.c regs->msr = msr; msr 1103 arch/powerpc/kvm/booke.c if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { msr 1129 arch/powerpc/kvm/booke.c if (vcpu->arch.shared->msr & MSR_SPE) msr 1207 arch/powerpc/kvm/booke.c if (!(vcpu->arch.shared->msr & MSR_PR)) { msr 1221 arch/powerpc/kvm/booke.c if (!(vcpu->arch.shared->msr & MSR_PR) && msr 1242 arch/powerpc/kvm/booke.c if (!(vcpu->arch.shared->msr & MSR_PR) && msr 1394 arch/powerpc/kvm/booke.c vcpu->arch.shared->msr = 0; msr 1440 arch/powerpc/kvm/booke.c regs->msr = vcpu->arch.shared->msr; msr 1471 arch/powerpc/kvm/booke.c kvmppc_set_msr(vcpu, regs->msr); msr 1970 arch/powerpc/kvm/booke.c if (!(vcpu->arch.shared->msr & MSR_PR) && msr 80 arch/powerpc/kvm/booke_emulate.c kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->msr); msr 90 arch/powerpc/kvm/booke_emulate.c vcpu->arch.shared->msr = (vcpu->arch.shared->msr & ~MSR_EE) msr 96 arch/powerpc/kvm/booke_emulate.c vcpu->arch.shared->msr = (vcpu->arch.shared->msr & ~MSR_EE) msr 215 arch/powerpc/kvm/e500.h return !!(vcpu->arch.shared->msr & (MSR_IS | MSR_DS)); msr 220 arch/powerpc/kvm/e500.h return !!(vcpu->arch.shared->msr & MSR_PR); msr 263 arch/powerpc/kvm/e500.h if (get_tlb_ts(tlbe) != !!(vcpu->arch.shared->msr & MSR_IS)) msr 412 arch/powerpc/kvm/e500_mmu.c if (!(vcpu->arch.shared->msr & MSR_CM)) msr 497 arch/powerpc/kvm/e500_mmu.c unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS); msr 504 arch/powerpc/kvm/e500_mmu.c unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS); msr 511 arch/powerpc/kvm/e500_mmu.c unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS); msr 518 arch/powerpc/kvm/e500_mmu.c unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS); msr 311 arch/powerpc/kvm/e500_mmu_host.c u32 pr = vcpu->arch.shared->msr & MSR_PR; msr 642 arch/powerpc/kvm/e500_mmu_host.c addr_space = (vcpu->arch.shared->msr & MSR_IS) >> MSR_IR_LG; msr 672 arch/powerpc/kvm/e500_mmu_host.c pr = vcpu->arch.shared->msr & MSR_PR; msr 97 arch/powerpc/kvm/emulate_loadstore.c vcpu->arch.regs.msr = vcpu->arch.shared->msr; msr 152 arch/powerpc/kvm/powerpc.c shared->msr = swab64(shared->msr); msr 45 arch/powerpc/kvm/trace_booke.h __field( unsigned long, msr ) msr 54 arch/powerpc/kvm/trace_booke.h __entry->msr = vcpu->arch.shared->msr; msr 66 arch/powerpc/kvm/trace_booke.h __entry->msr, msr 253 arch/powerpc/kvm/trace_hv.h __field(unsigned long, msr) msr 262 arch/powerpc/kvm/trace_hv.h __entry->msr = vcpu->arch.shregs.msr; msr 268 arch/powerpc/kvm/trace_hv.h __entry->pc, __entry->msr, __entry->ceded msr 224 arch/powerpc/kvm/trace_pr.h __field( unsigned long, msr ) msr 234 arch/powerpc/kvm/trace_pr.h __entry->msr = kvmppc_get_msr(vcpu); msr 248 arch/powerpc/kvm/trace_pr.h __entry->msr, msr 69 arch/powerpc/lib/sstep.c static nokprobe_inline unsigned long truncate_if_32bit(unsigned long msr, msr 73 arch/powerpc/lib/sstep.c if ((msr & MSR_64BIT) == 0) msr 492 arch/powerpc/lib/sstep.c if (regs->msr & MSR_FP) msr 499 arch/powerpc/lib/sstep.c if (regs->msr & MSR_FP) msr 526 arch/powerpc/lib/sstep.c if (regs->msr & MSR_FP) msr 538 arch/powerpc/lib/sstep.c if (regs->msr & MSR_FP) msr 576 arch/powerpc/lib/sstep.c if (regs->msr & MSR_VEC) msr 599 arch/powerpc/lib/sstep.c if (regs->msr & MSR_VEC) msr 832 arch/powerpc/lib/sstep.c if (regs->msr & MSR_FP) { msr 839 arch/powerpc/lib/sstep.c if (regs->msr & MSR_VEC) msr 863 arch/powerpc/lib/sstep.c if (regs->msr & MSR_FP) { msr 870 arch/powerpc/lib/sstep.c if (regs->msr & MSR_VEC) msr 888 arch/powerpc/lib/sstep.c if (!(regs->msr & MSR_64BIT)) msr 952 arch/powerpc/lib/sstep.c if (!(regs->msr & MSR_64BIT)) msr 986 arch/powerpc/lib/sstep.c if (!(regs->msr & MSR_64BIT)) { msr 1183 arch/powerpc/lib/sstep.c op->val = truncate_if_32bit(regs->msr, imm); msr 1204 arch/powerpc/lib/sstep.c op->val = truncate_if_32bit(regs->msr, imm); msr 1224 arch/powerpc/lib/sstep.c op->val = truncate_if_32bit(regs->msr, imm); msr 1232 arch/powerpc/lib/sstep.c if (regs->msr & MSR_PR) msr 1519 arch/powerpc/lib/sstep.c if (regs->msr & MSR_PR) msr 1525 arch/powerpc/lib/sstep.c if (regs->msr & MSR_PR) msr 1533 arch/powerpc/lib/sstep.c if (regs->msr & MSR_PR) msr 2759 arch/powerpc/lib/sstep.c next_pc = truncate_if_32bit(regs->msr, regs->nip + 4); msr 2859 arch/powerpc/lib/sstep.c cross_endian = (regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE); msr 2860 arch/powerpc/lib/sstep.c ea = truncate_if_32bit(regs->msr, op->ea); msr 2963 arch/powerpc/lib/sstep.c if (!(regs->msr & MSR_PR) && !(regs->msr & MSR_FP)) msr 2970 arch/powerpc/lib/sstep.c if (!(regs->msr & MSR_PR) && !(regs->msr & MSR_VEC)) msr 2985 arch/powerpc/lib/sstep.c if (!(regs->msr & MSR_PR) && !(regs->msr & msrbit)) msr 3022 arch/powerpc/lib/sstep.c !(regs->msr & MSR_PR) && msr 3034 arch/powerpc/lib/sstep.c if (!(regs->msr & MSR_PR) && !(regs->msr & MSR_FP)) msr 3041 arch/powerpc/lib/sstep.c if (!(regs->msr & MSR_PR) && !(regs->msr & MSR_VEC)) msr 3056 arch/powerpc/lib/sstep.c if (!(regs->msr & MSR_PR) && !(regs->msr & msrbit)) msr 3131 arch/powerpc/lib/sstep.c ea = truncate_if_32bit(regs->msr, op.ea); msr 3163 arch/powerpc/lib/sstep.c regs->gpr[op.reg] = regs->msr & MSR_MASK; msr 3172 arch/powerpc/lib/sstep.c regs->msr = (regs->msr & ~op.val) | (val & op.val); msr 3184 arch/powerpc/lib/sstep.c regs->msr ^= MSR_LE; msr 3190 arch/powerpc/lib/sstep.c regs->gpr[12] = regs->msr & MSR_MASK; msr 3193 arch/powerpc/lib/sstep.c regs->msr = MSR_KERNEL; msr 3203 arch/powerpc/lib/sstep.c regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4); msr 65 arch/powerpc/lib/test_emulate_step.c static unsigned long msr; msr 71 arch/powerpc/lib/test_emulate_step.c regs->msr = msr; msr 75 arch/powerpc/lib/test_emulate_step.c asm volatile("mfmsr %0" : "=r"(regs->msr)); msr 77 arch/powerpc/lib/test_emulate_step.c regs->msr |= MSR_FP; msr 78 arch/powerpc/lib/test_emulate_step.c regs->msr |= MSR_VEC; msr 79 arch/powerpc/lib/test_emulate_step.c regs->msr |= MSR_VSX; msr 81 arch/powerpc/lib/test_emulate_step.c msr = regs->msr; msr 914 arch/powerpc/lib/test_emulate_step.c exp.msr = MSR_KERNEL; msr 915 arch/powerpc/lib/test_emulate_step.c got.msr = MSR_KERNEL; msr 1464 arch/powerpc/mm/book3s64/hash_utils.c unsigned long msr) msr 1488 arch/powerpc/mm/book3s64/hash_utils.c if ((msr & MSR_PR) || (region_id == USER_REGION_ID)) msr 1689 arch/powerpc/mm/book3s64/hash_utils.c MSR_TM_ACTIVE(current->thread.regs->msr)) { msr 771 arch/powerpc/mm/book3s64/slb.c if (unlikely(!(regs->msr & MSR_RI))) msr 437 arch/powerpc/mm/mem.c unsigned long msr, msr0; msr 441 arch/powerpc/mm/mem.c msr = msr0 & ~MSR_DR; msr 462 arch/powerpc/mm/mem.c : "r" (nb), "r" (msr), "i" (bytes), "r" (msr0) msr 240 arch/powerpc/perf/core-book3s.c if (regs->msr & MSR_PR) msr 242 arch/powerpc/perf/core-book3s.c if ((regs->msr & MSR_HV) && freeze_events_kernel != MMCR0_FCHV) msr 54 arch/powerpc/perf/perf_regs.c PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr), msr 199 arch/powerpc/platforms/4xx/uic.c u32 msr; msr 210 arch/powerpc/platforms/4xx/uic.c msr = mfdcr(uic->dcrbase + UIC_MSR); msr 211 arch/powerpc/platforms/4xx/uic.c if (!msr) /* spurious interrupt */ msr 214 arch/powerpc/platforms/4xx/uic.c src = 32 - ffs(msr); msr 322 arch/powerpc/platforms/4xx/uic.c u32 msr; msr 327 arch/powerpc/platforms/4xx/uic.c msr = mfdcr(primary_uic->dcrbase + UIC_MSR); msr 328 arch/powerpc/platforms/4xx/uic.c src = 32 - ffs(msr); msr 116 arch/powerpc/platforms/52xx/mpc52xx_pm.c u32 msr, hid0; msr 147 arch/powerpc/platforms/52xx/mpc52xx_pm.c msr = mfmsr(); msr 148 arch/powerpc/platforms/52xx/mpc52xx_pm.c mtmsr(msr & ~MSR_POW); msr 167 arch/powerpc/platforms/52xx/mpc52xx_pm.c mtmsr(msr & ~MSR_POW); msr 169 arch/powerpc/platforms/52xx/mpc52xx_pm.c mtmsr(msr); msr 155 arch/powerpc/platforms/83xx/misc.c if (!(regs->msr & SRR1_MCE_MCP) || !(ipic_get_mcp_status() & mask)) msr 13 arch/powerpc/platforms/8xx/machine_check.c unsigned long reason = regs->msr; msr 77 arch/powerpc/platforms/cell/pervasive.c switch (regs->msr & SRR1_WAKEMASK) { msr 251 arch/powerpc/platforms/embedded6xx/holly.c regs->msr |= MSR_RI; msr 172 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c regs->msr |= MSR_RI; msr 39 arch/powerpc/platforms/pasemi/idle.c if (regs->msr & SRR1_WAKEMASK) msr 42 arch/powerpc/platforms/pasemi/idle.c switch (regs->msr & SRR1_WAKEMASK) { msr 61 arch/powerpc/platforms/pasemi/idle.c regs->msr |= MSR_RI; msr 325 arch/powerpc/platforms/pasemi/setup.c srr1 = regs->msr; msr 552 arch/powerpc/platforms/powernv/npu-dma.c unsigned long msr) msr 579 arch/powerpc/platforms/powernv/npu-dma.c nphb->opal_id, msr); msr 580 arch/powerpc/platforms/powernv/npu-dma.c ret = opal_npu_init_context(nphb->opal_id, 0/*__unused*/, msr, msr 591 arch/powerpc/platforms/powernv/npu-dma.c void pnv_npu2_map_lpar(struct pnv_ioda_pe *gpe, unsigned long msr) msr 596 arch/powerpc/platforms/powernv/npu-dma.c pnv_npu2_map_lpar_dev(gpdev, 0, msr); msr 70 arch/powerpc/platforms/powernv/opal-call.c unsigned long opcode, unsigned long msr) msr 75 arch/powerpc/platforms/powernv/opal-call.c ret = __opal_call(a0, a1, a2, a3, a4, a5, a6, a7, opcode, msr); msr 87 arch/powerpc/platforms/powernv/opal-call.c unsigned long opcode, unsigned long msr) msr 99 arch/powerpc/platforms/powernv/opal-call.c unsigned long msr = mfmsr(); msr 100 arch/powerpc/platforms/powernv/opal-call.c bool mmu = (msr & (MSR_IR|MSR_DR)); msr 103 arch/powerpc/platforms/powernv/opal-call.c msr &= ~MSR_EE; msr 106 arch/powerpc/platforms/powernv/opal-call.c return __opal_call(a0, a1, a2, a3, a4, a5, a6, a7, opcode, msr); msr 112 arch/powerpc/platforms/powernv/opal-call.c ret = __opal_call_trace(a0, a1, a2, a3, a4, a5, a6, a7, opcode, msr); msr 114 arch/powerpc/platforms/powernv/opal-call.c ret = __opal_call(a0, a1, a2, a3, a4, a5, a6, a7, opcode, msr); msr 116 arch/powerpc/platforms/powernv/opal-fadump.h regs->msr = reg_val; msr 509 arch/powerpc/platforms/powernv/opal.c if (!(regs->msr & MSR_RI)) { msr 188 arch/powerpc/platforms/powernv/pci.h extern void pnv_npu2_map_lpar(struct pnv_ioda_pe *gpe, unsigned long msr); msr 475 arch/powerpc/platforms/pseries/ras.c if ((be64_to_cpu(regs->msr) & msr 479 arch/powerpc/platforms/pseries/ras.c regs->msr = 0; msr 727 arch/powerpc/platforms/pseries/ras.c if (!(regs->msr & MSR_RI)) { msr 260 arch/powerpc/platforms/pseries/rtas-fadump.c regs->msr = (unsigned long)reg_val; msr 1058 arch/powerpc/sysdev/fsl_pci.c if (regs->msr & MSR_GS) msr 111 arch/powerpc/sysdev/fsl_rio.c regs->msr |= MSR_RI; msr 483 arch/powerpc/xmon/xmon.c return ((regs->msr & MSR_RI) == 0); msr 551 arch/powerpc/xmon/xmon.c if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) msr 697 arch/powerpc/xmon/xmon.c if (regs->msr & MSR_DE) { msr 705 arch/powerpc/xmon/xmon.c if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { msr 758 arch/powerpc/xmon/xmon.c if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) msr 789 arch/powerpc/xmon/xmon.c if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) msr 799 arch/powerpc/xmon/xmon.c if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) msr 824 arch/powerpc/xmon/xmon.c if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { msr 1159 arch/powerpc/xmon/xmon.c regs->msr |= MSR_DE; msr 1175 arch/powerpc/xmon/xmon.c if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) { msr 1192 arch/powerpc/xmon/xmon.c regs->msr |= MSR_SE; msr 1663 arch/powerpc/xmon/xmon.c if (regs->msr & MSR_PR) msr 1700 arch/powerpc/xmon/xmon.c printf(" msr: %lx\n", fp->msr); msr 1775 arch/powerpc/xmon/xmon.c printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr); msr 1894 arch/powerpc/xmon/xmon.c unsigned long msr; msr 1905 arch/powerpc/xmon/xmon.c msr = mfmsr(); msr 1906 arch/powerpc/xmon/xmon.c if (msr & MSR_TM) { msr 1926 arch/powerpc/xmon/xmon.c if (!(msr & MSR_HV)) msr 78 arch/sh/include/asm/smc37c93x.h volatile __u16 msr; msr 84 arch/x86/events/amd/ibs.c unsigned int msr; msr 310 arch/x86/events/amd/ibs.c hwc->config_base = perf_ibs->msr; msr 531 arch/x86/events/amd/ibs.c .msr = MSR_AMD64_IBSFETCHCTL, msr 555 arch/x86/events/amd/ibs.c .msr = MSR_AMD64_IBSOPCTL, msr 579 arch/x86/events/amd/ibs.c unsigned int msr; msr 600 arch/x86/events/amd/ibs.c msr = hwc->config_base; msr 602 arch/x86/events/amd/ibs.c rdmsrl(msr, *buf); msr 623 arch/x86/events/amd/ibs.c rdmsrl(msr + offset, *buf++); msr 124 arch/x86/events/core.c for (er = x86_pmu.extra_regs; er->msr; er++) { msr 135 arch/x86/events/core.c reg->reg = er->msr; msr 3340 arch/x86/events/intel/core.c arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL; msr 3358 arch/x86/events/intel/core.c arr[1].msr = MSR_IA32_PEBS_ENABLE; msr 3376 arch/x86/events/intel/core.c arr[idx].msr = x86_pmu_config_addr(idx); msr 4059 arch/x86/events/intel/core.c static bool is_lbr_from(unsigned long msr) msr 4063 arch/x86/events/intel/core.c return x86_pmu.lbr_from <= msr && msr < lbr_from_nr; msr 4070 arch/x86/events/intel/core.c static bool check_msr(unsigned long msr, u64 mask) msr 4086 arch/x86/events/intel/core.c if (rdmsrl_safe(msr, &val_old)) msr 4094 arch/x86/events/intel/core.c if (is_lbr_from(msr)) msr 4097 arch/x86/events/intel/core.c if (wrmsrl_safe(msr, val_tmp) || msr 4098 arch/x86/events/intel/core.c rdmsrl_safe(msr, &val_new)) msr 4108 arch/x86/events/intel/core.c if (is_lbr_from(msr)) msr 4114 arch/x86/events/intel/core.c wrmsrl(msr, val_old); msr 5151 arch/x86/events/intel/core.c for (er = x86_pmu.extra_regs; er->msr; er++) { msr 5152 arch/x86/events/intel/core.c er->extra_msr_access = check_msr(er->msr, 0x11UL); msr 136 arch/x86/events/intel/cstate.c u64 msr; msr 325 arch/x86/events/intel/cstate.c event->hw.event_base = core_msr[cfg].msr; msr 334 arch/x86/events/intel/cstate.c event->hw.event_base = pkg_msr[cfg].msr; msr 662 arch/x86/events/intel/cstate.c pkg_msr[PERF_CSTATE_PKG_C6_RES].msr = MSR_PKG_C7_RESIDENCY; msr 666 arch/x86/events/intel/cstate.c pkg_msr[PERF_CSTATE_CORE_C6_RES].msr = MSR_KNL_CORE_C6_RESIDENCY; msr 1126 arch/x86/events/intel/p4.c #define P4_ESCR_MSR_IDX(msr) (msr - P4_ESCR_MSR_BASE) msr 1127 arch/x86/events/intel/p4.c #define P4_ESCR_MSR_TABLE_ENTRY(msr) [P4_ESCR_MSR_IDX(msr)] = msr msr 369 arch/x86/events/intel/rapl.c event->hw.event_base = rapl_msrs[bit].msr; msr 212 arch/x86/events/intel/uncore_nhmex.c unsigned msr = uncore_msr_box_ctl(box); msr 215 arch/x86/events/intel/uncore_nhmex.c if (msr) { msr 216 arch/x86/events/intel/uncore_nhmex.c rdmsrl(msr, config); msr 221 arch/x86/events/intel/uncore_nhmex.c wrmsrl(msr, config); msr 227 arch/x86/events/intel/uncore_nhmex.c unsigned msr = uncore_msr_box_ctl(box); msr 230 arch/x86/events/intel/uncore_nhmex.c if (msr) { msr 231 arch/x86/events/intel/uncore_nhmex.c rdmsrl(msr, config); msr 236 arch/x86/events/intel/uncore_nhmex.c wrmsrl(msr, config); msr 771 arch/x86/events/intel/uncore_nhmex.c unsigned msr; msr 778 arch/x86/events/intel/uncore_nhmex.c for (er = nhmex_uncore_mbox_extra_regs; er->msr; er++) { msr 784 arch/x86/events/intel/uncore_nhmex.c msr = er->msr + type->msr_offset * box->pmu->pmu_idx; msr 785 arch/x86/events/intel/uncore_nhmex.c if (WARN_ON_ONCE(msr >= 0xffff || er->idx >= 0xff)) msr 797 arch/x86/events/intel/uncore_nhmex.c reg1->reg |= msr << (reg_idx * 16); msr 103 arch/x86/events/intel/uncore_snbep.c .msr = SNBEP_C0_MSR_PMON_BOX_FILTER, \ msr 526 arch/x86/events/intel/uncore_snbep.c unsigned msr; msr 528 arch/x86/events/intel/uncore_snbep.c msr = uncore_msr_box_ctl(box); msr 529 arch/x86/events/intel/uncore_snbep.c if (msr) { msr 530 arch/x86/events/intel/uncore_snbep.c rdmsrl(msr, config); msr 532 arch/x86/events/intel/uncore_snbep.c wrmsrl(msr, config); msr 539 arch/x86/events/intel/uncore_snbep.c unsigned msr; msr 541 arch/x86/events/intel/uncore_snbep.c msr = uncore_msr_box_ctl(box); msr 542 arch/x86/events/intel/uncore_snbep.c if (msr) { msr 543 arch/x86/events/intel/uncore_snbep.c rdmsrl(msr, config); msr 545 arch/x86/events/intel/uncore_snbep.c wrmsrl(msr, config); msr 570 arch/x86/events/intel/uncore_snbep.c unsigned msr = uncore_msr_box_ctl(box); msr 572 arch/x86/events/intel/uncore_snbep.c if (msr) msr 573 arch/x86/events/intel/uncore_snbep.c wrmsrl(msr, SNBEP_PMON_BOX_CTL_INT); msr 932 arch/x86/events/intel/uncore_snbep.c for (er = snbep_uncore_cbox_extra_regs; er->msr; er++) { msr 1385 arch/x86/events/intel/uncore_snbep.c unsigned msr = uncore_msr_box_ctl(box); msr 1386 arch/x86/events/intel/uncore_snbep.c if (msr) msr 1387 arch/x86/events/intel/uncore_snbep.c wrmsrl(msr, IVBEP_PMON_BOX_CTL_INT); msr 1616 arch/x86/events/intel/uncore_snbep.c for (er = ivbep_uncore_cbox_extra_regs; er->msr; er++) { msr 2044 arch/x86/events/intel/uncore_snbep.c for (er = knl_uncore_cha_extra_regs; er->msr; er++) { msr 2599 arch/x86/events/intel/uncore_snbep.c for (er = hswep_uncore_cbox_extra_regs; er->msr; er++) { msr 2662 arch/x86/events/intel/uncore_snbep.c unsigned msr = uncore_msr_box_ctl(box); msr 2664 arch/x86/events/intel/uncore_snbep.c if (msr) { msr 2671 arch/x86/events/intel/uncore_snbep.c wrmsrl(msr, flags); msr 3492 arch/x86/events/intel/uncore_snbep.c for (er = skx_uncore_cha_extra_regs; er->msr; er++) { msr 141 arch/x86/events/msr.c static struct perf_msr msr[] = { msr 209 arch/x86/events/msr.c event->hw.event_base = msr[cfg].msr; msr 298 arch/x86/events/msr.c msr_mask = perf_msr_probe(msr, PERF_MSR_EVENT_MAX, true, NULL); msr 478 arch/x86/events/perf_event.h unsigned int msr; msr 487 arch/x86/events/perf_event.h .msr = (ms), \ msr 494 arch/x86/events/perf_event.h #define INTEL_EVENT_EXTRA_REG(event, msr, vm, idx) \ msr 495 arch/x86/events/perf_event.h EVENT_EXTRA_REG(event, msr, ARCH_PERFMON_EVENTSEL_EVENT, vm, idx) msr 497 arch/x86/events/perf_event.h #define INTEL_UEVENT_EXTRA_REG(event, msr, vm, idx) \ msr 498 arch/x86/events/perf_event.h EVENT_EXTRA_REG(event, msr, ARCH_PERFMON_EVENTSEL_EVENT | \ msr 14 arch/x86/events/probe.c perf_msr_probe(struct perf_msr *msr, int cnt, bool zero, void *data) msr 24 arch/x86/events/probe.c if (!msr[bit].no_check) { msr 25 arch/x86/events/probe.c struct attribute_group *grp = msr[bit].grp; msr 29 arch/x86/events/probe.c if (msr[bit].test && !msr[bit].test(bit, data)) msr 32 arch/x86/events/probe.c if (rdmsrl_safe(msr[bit].msr, &val)) msr 7 arch/x86/events/probe.h u64 msr; msr 14 arch/x86/events/probe.h perf_msr_probe(struct perf_msr *msr, int cnt, bool no_zero, void *data); msr 124 arch/x86/include/asm/apic.h u64 msr; msr 126 arch/x86/include/asm/apic.h if (rdmsrl_safe(MSR_IA32_APICBASE, &msr)) msr 128 arch/x86/include/asm/apic.h return msr & X2APIC_ENABLE; msr 226 arch/x86/include/asm/apic.h u64 msr; msr 231 arch/x86/include/asm/apic.h rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); msr 232 arch/x86/include/asm/apic.h return (u32)msr; msr 1035 arch/x86/include/asm/kvm_host.h int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); msr 1036 arch/x86/include/asm/kvm_host.h int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); msr 1393 arch/x86/include/asm/kvm_host.h int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); msr 1394 arch/x86/include/asm/kvm_host.h int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); msr 1490 arch/x86/include/asm/kvm_host.h static inline unsigned long read_msr(unsigned long msr) msr 1494 arch/x86/include/asm/kvm_host.h rdmsrl(msr, value); msr 1571 arch/x86/include/asm/kvm_host.h void kvm_define_shared_msr(unsigned index, u32 msr); msr 3 arch/x86/include/asm/msr-trace.h #define TRACE_SYSTEM msr msr 6 arch/x86/include/asm/msr-trace.h #define TRACE_INCLUDE_FILE msr-trace msr 22 arch/x86/include/asm/msr-trace.h TP_PROTO(unsigned msr, u64 val, int failed), msr 23 arch/x86/include/asm/msr-trace.h TP_ARGS(msr, val, failed), msr 25 arch/x86/include/asm/msr-trace.h __field( unsigned, msr ) msr 30 arch/x86/include/asm/msr-trace.h __entry->msr = msr; msr 35 arch/x86/include/asm/msr-trace.h __entry->msr, msr 41 arch/x86/include/asm/msr-trace.h TP_PROTO(unsigned msr, u64 val, int failed), msr 42 arch/x86/include/asm/msr-trace.h TP_ARGS(msr, val, failed) msr 46 arch/x86/include/asm/msr-trace.h TP_PROTO(unsigned msr, u64 val, int failed), msr 47 arch/x86/include/asm/msr-trace.h TP_ARGS(msr, val, failed) msr 51 arch/x86/include/asm/msr-trace.h TP_PROTO(unsigned msr, u64 val, int failed), msr 52 arch/x86/include/asm/msr-trace.h TP_ARGS(msr, val, failed) msr 26 arch/x86/include/asm/msr.h struct msr reg; msr 27 arch/x86/include/asm/msr.h struct msr *msrs; msr 74 arch/x86/include/asm/msr.h extern void do_trace_write_msr(unsigned int msr, u64 val, int failed); msr 75 arch/x86/include/asm/msr.h extern void do_trace_read_msr(unsigned int msr, u64 val, int failed); msr 76 arch/x86/include/asm/msr.h extern void do_trace_rdpmc(unsigned int msr, u64 val, int failed); msr 79 arch/x86/include/asm/msr.h static inline void do_trace_write_msr(unsigned int msr, u64 val, int failed) {} msr 80 arch/x86/include/asm/msr.h static inline void do_trace_read_msr(unsigned int msr, u64 val, int failed) {} msr 81 arch/x86/include/asm/msr.h static inline void do_trace_rdpmc(unsigned int msr, u64 val, int failed) {} msr 91 arch/x86/include/asm/msr.h static inline unsigned long long notrace __rdmsr(unsigned int msr) msr 98 arch/x86/include/asm/msr.h : EAX_EDX_RET(val, low, high) : "c" (msr)); msr 103 arch/x86/include/asm/msr.h static inline void notrace __wrmsr(unsigned int msr, u32 low, u32 high) msr 108 arch/x86/include/asm/msr.h : : "c" (msr), "a"(low), "d" (high) : "memory"); msr 111 arch/x86/include/asm/msr.h #define native_rdmsr(msr, val1, val2) \ msr 113 arch/x86/include/asm/msr.h u64 __val = __rdmsr((msr)); \ msr 118 arch/x86/include/asm/msr.h #define native_wrmsr(msr, low, high) \ msr 119 arch/x86/include/asm/msr.h __wrmsr(msr, low, high) msr 121 arch/x86/include/asm/msr.h #define native_wrmsrl(msr, val) \ msr 122 arch/x86/include/asm/msr.h __wrmsr((msr), (u32)((u64)(val)), \ msr 125 arch/x86/include/asm/msr.h static inline unsigned long long native_read_msr(unsigned int msr) msr 129 arch/x86/include/asm/msr.h val = __rdmsr(msr); msr 132 arch/x86/include/asm/msr.h do_trace_read_msr(msr, val, 0); msr 137 arch/x86/include/asm/msr.h static inline unsigned long long native_read_msr_safe(unsigned int msr, msr 152 arch/x86/include/asm/msr.h : "c" (msr), [fault] "i" (-EIO)); msr 154 arch/x86/include/asm/msr.h do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), *err); msr 160 arch/x86/include/asm/msr.h native_write_msr(unsigned int msr, u32 low, u32 high) msr 162 arch/x86/include/asm/msr.h __wrmsr(msr, low, high); msr 165 arch/x86/include/asm/msr.h do_trace_write_msr(msr, ((u64)high << 32 | low), 0); msr 170 arch/x86/include/asm/msr.h native_write_msr_safe(unsigned int msr, u32 low, u32 high) msr 181 arch/x86/include/asm/msr.h : "c" (msr), "0" (low), "d" (high), msr 185 arch/x86/include/asm/msr.h do_trace_write_msr(msr, ((u64)high << 32 | low), err); msr 266 arch/x86/include/asm/msr.h #define rdmsr(msr, low, high) \ msr 268 arch/x86/include/asm/msr.h u64 __val = native_read_msr((msr)); \ msr 273 arch/x86/include/asm/msr.h static inline void wrmsr(unsigned int msr, u32 low, u32 high) msr 275 arch/x86/include/asm/msr.h native_write_msr(msr, low, high); msr 278 arch/x86/include/asm/msr.h #define rdmsrl(msr, val) \ msr 279 arch/x86/include/asm/msr.h ((val) = native_read_msr((msr))) msr 281 arch/x86/include/asm/msr.h static inline void wrmsrl(unsigned int msr, u64 val) msr 283 arch/x86/include/asm/msr.h native_write_msr(msr, (u32)(val & 0xffffffffULL), (u32)(val >> 32)); msr 287 arch/x86/include/asm/msr.h static inline int wrmsr_safe(unsigned int msr, u32 low, u32 high) msr 289 arch/x86/include/asm/msr.h return native_write_msr_safe(msr, low, high); msr 293 arch/x86/include/asm/msr.h #define rdmsr_safe(msr, low, high) \ msr 296 arch/x86/include/asm/msr.h u64 __val = native_read_msr_safe((msr), &__err); \ msr 302 arch/x86/include/asm/msr.h static inline int rdmsrl_safe(unsigned int msr, unsigned long long *p) msr 306 arch/x86/include/asm/msr.h *p = native_read_msr_safe(msr, &err); msr 324 arch/x86/include/asm/msr.h static inline int wrmsrl_safe(u32 msr, u64 val) msr 326 arch/x86/include/asm/msr.h return wrmsr_safe(msr, (u32)val, (u32)(val >> 32)); msr 333 arch/x86/include/asm/msr.h struct msr *msrs_alloc(void); msr 334 arch/x86/include/asm/msr.h void msrs_free(struct msr *msrs); msr 335 arch/x86/include/asm/msr.h int msr_set_bit(u32 msr, u8 bit); msr 336 arch/x86/include/asm/msr.h int msr_clear_bit(u32 msr, u8 bit); msr 343 arch/x86/include/asm/msr.h void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs); msr 344 arch/x86/include/asm/msr.h void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs); msr 373 arch/x86/include/asm/msr.h struct msr *msrs) msr 378 arch/x86/include/asm/msr.h struct msr *msrs) msr 263 arch/x86/include/asm/nospec-branch.h void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature) msr 266 arch/x86/include/asm/nospec-branch.h : : "c" (msr), msr 159 arch/x86/include/asm/paravirt.h static inline u64 paravirt_read_msr(unsigned msr) msr 161 arch/x86/include/asm/paravirt.h return PVOP_CALL1(u64, cpu.read_msr, msr); msr 164 arch/x86/include/asm/paravirt.h static inline void paravirt_write_msr(unsigned msr, msr 167 arch/x86/include/asm/paravirt.h PVOP_VCALL3(cpu.write_msr, msr, low, high); msr 170 arch/x86/include/asm/paravirt.h static inline u64 paravirt_read_msr_safe(unsigned msr, int *err) msr 172 arch/x86/include/asm/paravirt.h return PVOP_CALL2(u64, cpu.read_msr_safe, msr, err); msr 175 arch/x86/include/asm/paravirt.h static inline int paravirt_write_msr_safe(unsigned msr, msr 178 arch/x86/include/asm/paravirt.h return PVOP_CALL3(int, cpu.write_msr_safe, msr, low, high); msr 181 arch/x86/include/asm/paravirt.h #define rdmsr(msr, val1, val2) \ msr 183 arch/x86/include/asm/paravirt.h u64 _l = paravirt_read_msr(msr); \ msr 188 arch/x86/include/asm/paravirt.h #define wrmsr(msr, val1, val2) \ msr 190 arch/x86/include/asm/paravirt.h paravirt_write_msr(msr, val1, val2); \ msr 193 arch/x86/include/asm/paravirt.h #define rdmsrl(msr, val) \ msr 195 arch/x86/include/asm/paravirt.h val = paravirt_read_msr(msr); \ msr 198 arch/x86/include/asm/paravirt.h static inline void wrmsrl(unsigned msr, u64 val) msr 200 arch/x86/include/asm/paravirt.h wrmsr(msr, (u32)val, (u32)(val>>32)); msr 203 arch/x86/include/asm/paravirt.h #define wrmsr_safe(msr, a, b) paravirt_write_msr_safe(msr, a, b) msr 206 arch/x86/include/asm/paravirt.h #define rdmsr_safe(msr, a, b) \ msr 209 arch/x86/include/asm/paravirt.h u64 _l = paravirt_read_msr_safe(msr, &_err); \ msr 215 arch/x86/include/asm/paravirt.h static inline int rdmsrl_safe(unsigned msr, unsigned long long *p) msr 219 arch/x86/include/asm/paravirt.h *p = paravirt_read_msr_safe(msr, &err); msr 152 arch/x86/include/asm/paravirt_types.h u64 (*read_msr)(unsigned int msr); msr 153 arch/x86/include/asm/paravirt_types.h void (*write_msr)(unsigned int msr, unsigned low, unsigned high); msr 159 arch/x86/include/asm/paravirt_types.h u64 (*read_msr_safe)(unsigned int msr, int *err); msr 160 arch/x86/include/asm/paravirt_types.h int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high); msr 321 arch/x86/include/asm/perf_event.h unsigned msr; msr 350 arch/x86/kernel/amd_nb.c u64 base, msr; msr 362 arch/x86/kernel/amd_nb.c rdmsrl(address, msr); msr 365 arch/x86/kernel/amd_nb.c if (!(msr & FAM10H_MMIO_CONF_ENABLE)) msr 368 arch/x86/kernel/amd_nb.c base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT); msr 370 arch/x86/kernel/amd_nb.c segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) & msr 1796 arch/x86/kernel/apic/apic.c u64 msr; msr 1801 arch/x86/kernel/apic/apic.c rdmsrl(MSR_IA32_APICBASE, msr); msr 1802 arch/x86/kernel/apic/apic.c if (!(msr & X2APIC_ENABLE)) msr 1805 arch/x86/kernel/apic/apic.c wrmsrl(MSR_IA32_APICBASE, msr & ~(X2APIC_ENABLE | XAPIC_ENABLE)); msr 1806 arch/x86/kernel/apic/apic.c wrmsrl(MSR_IA32_APICBASE, msr & ~X2APIC_ENABLE); msr 1812 arch/x86/kernel/apic/apic.c u64 msr; msr 1814 arch/x86/kernel/apic/apic.c rdmsrl(MSR_IA32_APICBASE, msr); msr 1815 arch/x86/kernel/apic/apic.c if (msr & X2APIC_ENABLE) msr 1817 arch/x86/kernel/apic/apic.c wrmsrl(MSR_IA32_APICBASE, msr | X2APIC_ENABLE); msr 41 arch/x86/kernel/cpu/amd.c static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) msr 49 arch/x86/kernel/cpu/amd.c gprs[1] = msr; msr 59 arch/x86/kernel/cpu/amd.c static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val) msr 67 arch/x86/kernel/cpu/amd.c gprs[1] = msr; msr 582 arch/x86/kernel/cpu/amd.c u64 msr; msr 598 arch/x86/kernel/cpu/amd.c rdmsrl(MSR_K8_SYSCFG, msr); msr 599 arch/x86/kernel/cpu/amd.c if (!(msr & MSR_K8_SYSCFG_MEM_ENCRYPT)) msr 612 arch/x86/kernel/cpu/amd.c rdmsrl(MSR_K7_HWCR, msr); msr 613 arch/x86/kernel/cpu/amd.c if (!(msr & MSR_K7_HWCR_SMMLOCK)) msr 629 arch/x86/kernel/cpu/intel.c u64 msr; msr 631 arch/x86/kernel/cpu/intel.c if (!rdmsrl_safe(MSR_PLATFORM_INFO, &msr)) { msr 632 arch/x86/kernel/cpu/intel.c if (msr & MSR_PLATFORM_INFO_CPUID_FAULT) msr 639 arch/x86/kernel/cpu/intel.c u64 msr; msr 641 arch/x86/kernel/cpu/intel.c if (rdmsrl_safe(MSR_MISC_FEATURES_ENABLES, &msr)) msr 651 arch/x86/kernel/cpu/intel.c msr = this_cpu_read(msr_misc_features_shadow); msr 652 arch/x86/kernel/cpu/intel.c wrmsrl(MSR_MISC_FEATURES_ENABLES, msr); msr 349 arch/x86/kernel/cpu/mce/amd.c int msr = (hi & MASK_LVTOFF_HI) >> 20; msr 358 arch/x86/kernel/cpu/mce/amd.c if (apic != msr) { msr 374 arch/x86/kernel/cpu/mce/core.c static int msr_to_offset(u32 msr) msr 378 arch/x86/kernel/cpu/mce/core.c if (msr == mca_cfg.rip_msr) msr 380 arch/x86/kernel/cpu/mce/core.c if (msr == msr_ops.status(bank)) msr 382 arch/x86/kernel/cpu/mce/core.c if (msr == msr_ops.addr(bank)) msr 384 arch/x86/kernel/cpu/mce/core.c if (msr == msr_ops.misc(bank)) msr 386 arch/x86/kernel/cpu/mce/core.c if (msr == MSR_IA32_MCG_STATUS) msr 392 arch/x86/kernel/cpu/mce/core.c static u64 mce_rdmsrl(u32 msr) msr 397 arch/x86/kernel/cpu/mce/core.c int offset = msr_to_offset(msr); msr 404 arch/x86/kernel/cpu/mce/core.c if (rdmsrl_safe(msr, &v)) { msr 405 arch/x86/kernel/cpu/mce/core.c WARN_ONCE(1, "mce: Unable to read MSR 0x%x!\n", msr); msr 417 arch/x86/kernel/cpu/mce/core.c static void mce_wrmsrl(u32 msr, u64 v) msr 420 arch/x86/kernel/cpu/mce/core.c int offset = msr_to_offset(msr); msr 426 arch/x86/kernel/cpu/mce/core.c wrmsrl(msr, v); msr 524 arch/x86/kernel/cpu/mtrr/generic.c void mtrr_wrmsr(unsigned msr, unsigned a, unsigned b) msr 526 arch/x86/kernel/cpu/mtrr/generic.c if (wrmsr_safe(msr, a, b) < 0) { msr 528 arch/x86/kernel/cpu/mtrr/generic.c smp_processor_id(), msr, a, b); msr 539 arch/x86/kernel/cpu/mtrr/generic.c static void set_fixed_range(int msr, bool *changed, unsigned int *msrwords) msr 543 arch/x86/kernel/cpu/mtrr/generic.c rdmsr(msr, lo, hi); msr 546 arch/x86/kernel/cpu/mtrr/generic.c mtrr_wrmsr(msr, msrwords[0], msrwords[1]); msr 45 arch/x86/kernel/cpu/perfctr-watchdog.c static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr) msr 51 arch/x86/kernel/cpu/perfctr-watchdog.c if (msr >= MSR_F15H_PERF_CTR) msr 52 arch/x86/kernel/cpu/perfctr-watchdog.c return (msr - MSR_F15H_PERF_CTR) >> 1; msr 53 arch/x86/kernel/cpu/perfctr-watchdog.c return msr - MSR_K7_PERFCTR0; msr 56 arch/x86/kernel/cpu/perfctr-watchdog.c return msr - MSR_ARCH_PERFMON_PERFCTR0; msr 60 arch/x86/kernel/cpu/perfctr-watchdog.c return msr - MSR_P6_PERFCTR0; msr 62 arch/x86/kernel/cpu/perfctr-watchdog.c return msr - MSR_KNC_PERFCTR0; msr 64 arch/x86/kernel/cpu/perfctr-watchdog.c return msr - MSR_P4_BPU_PERFCTR0; msr 74 arch/x86/kernel/cpu/perfctr-watchdog.c static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr) msr 80 arch/x86/kernel/cpu/perfctr-watchdog.c if (msr >= MSR_F15H_PERF_CTL) msr 81 arch/x86/kernel/cpu/perfctr-watchdog.c return (msr - MSR_F15H_PERF_CTL) >> 1; msr 82 arch/x86/kernel/cpu/perfctr-watchdog.c return msr - MSR_K7_EVNTSEL0; msr 85 arch/x86/kernel/cpu/perfctr-watchdog.c return msr - MSR_ARCH_PERFMON_EVENTSEL0; msr 89 arch/x86/kernel/cpu/perfctr-watchdog.c return msr - MSR_P6_EVNTSEL0; msr 91 arch/x86/kernel/cpu/perfctr-watchdog.c return msr - MSR_KNC_EVNTSEL0; msr 93 arch/x86/kernel/cpu/perfctr-watchdog.c return msr - MSR_P4_BSU_ESCR0; msr 109 arch/x86/kernel/cpu/perfctr-watchdog.c int reserve_perfctr_nmi(unsigned int msr) msr 113 arch/x86/kernel/cpu/perfctr-watchdog.c counter = nmi_perfctr_msr_to_bit(msr); msr 124 arch/x86/kernel/cpu/perfctr-watchdog.c void release_perfctr_nmi(unsigned int msr) msr 128 arch/x86/kernel/cpu/perfctr-watchdog.c counter = nmi_perfctr_msr_to_bit(msr); msr 137 arch/x86/kernel/cpu/perfctr-watchdog.c int reserve_evntsel_nmi(unsigned int msr) msr 141 arch/x86/kernel/cpu/perfctr-watchdog.c counter = nmi_evntsel_msr_to_bit(msr); msr 152 arch/x86/kernel/cpu/perfctr-watchdog.c void release_evntsel_nmi(unsigned int msr) msr 156 arch/x86/kernel/cpu/perfctr-watchdog.c counter = nmi_evntsel_msr_to_bit(msr); msr 363 arch/x86/kernel/process.c u64 msr = x86_amd_ls_cfg_base; msr 366 arch/x86/kernel/process.c msr |= ssbd_tif_to_amd_ls_cfg(tifn); msr 367 arch/x86/kernel/process.c wrmsrl(MSR_AMD64_LS_CFG, msr); msr 379 arch/x86/kernel/process.c msr |= x86_amd_ls_cfg_ssbd_mask; msr 384 arch/x86/kernel/process.c wrmsrl(MSR_AMD64_LS_CFG, msr); msr 394 arch/x86/kernel/process.c wrmsrl(MSR_AMD64_LS_CFG, msr); msr 401 arch/x86/kernel/process.c u64 msr = x86_amd_ls_cfg_base | ssbd_tif_to_amd_ls_cfg(tifn); msr 403 arch/x86/kernel/process.c wrmsrl(MSR_AMD64_LS_CFG, msr); msr 426 arch/x86/kernel/process.c u64 msr = x86_spec_ctrl_base; msr 441 arch/x86/kernel/process.c msr |= ssbd_tif_to_spec_ctrl(tifn); msr 448 arch/x86/kernel/process.c msr |= stibp_tif_to_spec_ctrl(tifn); msr 452 arch/x86/kernel/process.c wrmsrl(MSR_IA32_SPEC_CTRL, msr); msr 3994 arch/x86/kvm/emulate.c u64 msr = 0; msr 3996 arch/x86/kvm/emulate.c ctxt->ops->get_msr(ctxt, MSR_MISC_FEATURES_ENABLES, &msr); msr 3997 arch/x86/kvm/emulate.c if (msr & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT && msr 188 arch/x86/kvm/hyperv.c static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr) msr 194 arch/x86/kvm/hyperv.c hv_vcpu->exit.u.synic.msr = msr; msr 203 arch/x86/kvm/hyperv.c u32 msr, u64 data, bool host) msr 211 arch/x86/kvm/hyperv.c trace_kvm_hv_synic_set_msr(vcpu->vcpu_id, msr, data, host); msr 214 arch/x86/kvm/hyperv.c switch (msr) { msr 218 arch/x86/kvm/hyperv.c synic_exit(synic, msr); msr 237 arch/x86/kvm/hyperv.c synic_exit(synic, msr); msr 249 arch/x86/kvm/hyperv.c synic_exit(synic, msr); msr 259 arch/x86/kvm/hyperv.c ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data, host); msr 268 arch/x86/kvm/hyperv.c static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata, msr 277 arch/x86/kvm/hyperv.c switch (msr) { msr 294 arch/x86/kvm/hyperv.c *pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]); msr 786 arch/x86/kvm/hyperv.c static bool kvm_hv_msr_partition_wide(u32 msr) msr 790 arch/x86/kvm/hyperv.c switch (msr) { msr 994 arch/x86/kvm/hyperv.c static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data, msr 1000 arch/x86/kvm/hyperv.c switch (msr) { msr 1038 arch/x86/kvm/hyperv.c msr - HV_X64_MSR_CRASH_P0, msr 1064 arch/x86/kvm/hyperv.c msr, data); msr 1080 arch/x86/kvm/hyperv.c static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host) msr 1084 arch/x86/kvm/hyperv.c switch (msr) { msr 1157 arch/x86/kvm/hyperv.c return synic_set_msr(vcpu_to_synic(vcpu), msr, data, host); msr 1162 arch/x86/kvm/hyperv.c int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2; msr 1171 arch/x86/kvm/hyperv.c int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2; msr 1184 arch/x86/kvm/hyperv.c msr, data); msr 1191 arch/x86/kvm/hyperv.c static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) msr 1197 arch/x86/kvm/hyperv.c switch (msr) { msr 1212 arch/x86/kvm/hyperv.c msr - HV_X64_MSR_CRASH_P0, msr 1229 arch/x86/kvm/hyperv.c vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr); msr 1237 arch/x86/kvm/hyperv.c static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, msr 1243 arch/x86/kvm/hyperv.c switch (msr) { msr 1265 arch/x86/kvm/hyperv.c return synic_get_msr(vcpu_to_synic(vcpu), msr, pdata, host); msr 1270 arch/x86/kvm/hyperv.c int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2; msr 1279 arch/x86/kvm/hyperv.c int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2; msr 1291 arch/x86/kvm/hyperv.c vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr); msr 1298 arch/x86/kvm/hyperv.c int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host) msr 1300 arch/x86/kvm/hyperv.c if (kvm_hv_msr_partition_wide(msr)) { msr 1304 arch/x86/kvm/hyperv.c r = kvm_hv_set_msr_pw(vcpu, msr, data, host); msr 1308 arch/x86/kvm/hyperv.c return kvm_hv_set_msr(vcpu, msr, data, host); msr 1311 arch/x86/kvm/hyperv.c int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host) msr 1313 arch/x86/kvm/hyperv.c if (kvm_hv_msr_partition_wide(msr)) { msr 1317 arch/x86/kvm/hyperv.c r = kvm_hv_get_msr_pw(vcpu, msr, pdata); msr 1321 arch/x86/kvm/hyperv.c return kvm_hv_get_msr(vcpu, msr, pdata, host); msr 49 arch/x86/kvm/hyperv.h int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host); msr 50 arch/x86/kvm/hyperv.h int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host); msr 2609 arch/x86/kvm/lapic.c int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data) msr 2612 arch/x86/kvm/lapic.c u32 reg = (msr - APIC_BASE_MSR) << 4; msr 2626 arch/x86/kvm/lapic.c int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data) msr 2629 arch/x86/kvm/lapic.c u32 reg = (msr - APIC_BASE_MSR) << 4, low, high = 0; msr 114 arch/x86/kvm/lapic.h int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data); msr 115 arch/x86/kvm/lapic.h int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data); msr 117 arch/x86/kvm/lapic.h int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data); msr 118 arch/x86/kvm/lapic.h int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data); msr 27 arch/x86/kvm/mtrr.c static bool msr_mtrr_valid(unsigned msr) msr 29 arch/x86/kvm/mtrr.c switch (msr) { msr 54 arch/x86/kvm/mtrr.c bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data) msr 59 arch/x86/kvm/mtrr.c if (!msr_mtrr_valid(msr)) msr 62 arch/x86/kvm/mtrr.c if (msr == MSR_IA32_CR_PAT) { msr 64 arch/x86/kvm/mtrr.c } else if (msr == MSR_MTRRdefType) { msr 68 arch/x86/kvm/mtrr.c } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) { msr 76 arch/x86/kvm/mtrr.c WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR)); msr 79 arch/x86/kvm/mtrr.c if ((msr & 1) == 0) { msr 186 arch/x86/kvm/mtrr.c static bool fixed_msr_to_seg_unit(u32 msr, int *seg, int *unit) msr 188 arch/x86/kvm/mtrr.c switch (msr) { msr 196 arch/x86/kvm/mtrr.c msr - MSR_MTRRfix16K_80000, msr 202 arch/x86/kvm/mtrr.c msr - MSR_MTRRfix4K_C0000, msr 242 arch/x86/kvm/mtrr.c static bool fixed_msr_to_range(u32 msr, u64 *start, u64 *end) msr 246 arch/x86/kvm/mtrr.c if (!fixed_msr_to_seg_unit(msr, &seg, &unit)) msr 253 arch/x86/kvm/mtrr.c static int fixed_msr_to_range_index(u32 msr) msr 257 arch/x86/kvm/mtrr.c if (!fixed_msr_to_seg_unit(msr, &seg, &unit)) msr 310 arch/x86/kvm/mtrr.c static void update_mtrr(struct kvm_vcpu *vcpu, u32 msr) msr 316 arch/x86/kvm/mtrr.c if (msr == MSR_IA32_CR_PAT || !tdp_enabled || msr 320 arch/x86/kvm/mtrr.c if (!mtrr_is_enabled(mtrr_state) && msr != MSR_MTRRdefType) msr 324 arch/x86/kvm/mtrr.c if (fixed_msr_to_range(msr, &start, &end)) { msr 327 arch/x86/kvm/mtrr.c } else if (msr == MSR_MTRRdefType) { msr 332 arch/x86/kvm/mtrr.c index = (msr - 0x200) / 2; msr 344 arch/x86/kvm/mtrr.c static void set_var_mtrr_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data) msr 350 arch/x86/kvm/mtrr.c index = (msr - 0x200) / 2; msr 351 arch/x86/kvm/mtrr.c is_mtrr_mask = msr - 0x200 - 2 * index; msr 376 arch/x86/kvm/mtrr.c int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data) msr 380 arch/x86/kvm/mtrr.c if (!kvm_mtrr_valid(vcpu, msr, data)) msr 383 arch/x86/kvm/mtrr.c index = fixed_msr_to_range_index(msr); msr 386 arch/x86/kvm/mtrr.c else if (msr == MSR_MTRRdefType) msr 388 arch/x86/kvm/mtrr.c else if (msr == MSR_IA32_CR_PAT) msr 391 arch/x86/kvm/mtrr.c set_var_mtrr_msr(vcpu, msr, data); msr 393 arch/x86/kvm/mtrr.c update_mtrr(vcpu, msr); msr 397 arch/x86/kvm/mtrr.c int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) msr 402 arch/x86/kvm/mtrr.c if (msr == MSR_MTRRcap) { msr 413 arch/x86/kvm/mtrr.c if (!msr_mtrr_valid(msr)) msr 416 arch/x86/kvm/mtrr.c index = fixed_msr_to_range_index(msr); msr 419 arch/x86/kvm/mtrr.c else if (msr == MSR_MTRRdefType) msr 421 arch/x86/kvm/mtrr.c else if (msr == MSR_IA32_CR_PAT) msr 426 arch/x86/kvm/mtrr.c index = (msr - 0x200) / 2; msr 427 arch/x86/kvm/mtrr.c is_mtrr_mask = msr - 0x200 - 2 * index; msr 340 arch/x86/kvm/pmu.c bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr) msr 342 arch/x86/kvm/pmu.c return kvm_x86_ops->pmu_ops->is_valid_msr(vcpu, msr); msr 345 arch/x86/kvm/pmu.c int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data) msr 347 arch/x86/kvm/pmu.c return kvm_x86_ops->pmu_ops->get_msr(vcpu, msr, data); msr 33 arch/x86/kvm/pmu.h bool (*is_valid_msr)(struct kvm_vcpu *vcpu, u32 msr); msr 34 arch/x86/kvm/pmu.h int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr, u64 *data); msr 88 arch/x86/kvm/pmu.h static inline struct kvm_pmc *get_gp_pmc(struct kvm_pmu *pmu, u32 msr, msr 91 arch/x86/kvm/pmu.h if (msr >= base && msr < base + pmu->nr_arch_gp_counters) { msr 92 arch/x86/kvm/pmu.h u32 index = array_index_nospec(msr - base, msr 102 arch/x86/kvm/pmu.h static inline struct kvm_pmc *get_fixed_pmc(struct kvm_pmu *pmu, u32 msr) msr 106 arch/x86/kvm/pmu.h if (msr >= base && msr < base + pmu->nr_arch_fixed_counters) { msr 107 arch/x86/kvm/pmu.h u32 index = array_index_nospec(msr - base, msr 124 arch/x86/kvm/pmu.h bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr); msr 125 arch/x86/kvm/pmu.h int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data); msr 64 arch/x86/kvm/pmu_amd.c static enum index msr_to_index(u32 msr) msr 66 arch/x86/kvm/pmu_amd.c switch (msr) { msr 98 arch/x86/kvm/pmu_amd.c static inline struct kvm_pmc *get_gp_pmc_amd(struct kvm_pmu *pmu, u32 msr, msr 101 arch/x86/kvm/pmu_amd.c switch (msr) { msr 126 arch/x86/kvm/pmu_amd.c return &pmu->gp_counters[msr_to_index(msr)]; msr 200 arch/x86/kvm/pmu_amd.c static bool amd_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr) msr 205 arch/x86/kvm/pmu_amd.c ret = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER) || msr 206 arch/x86/kvm/pmu_amd.c get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL); msr 211 arch/x86/kvm/pmu_amd.c static int amd_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data) msr 217 arch/x86/kvm/pmu_amd.c pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER); msr 223 arch/x86/kvm/pmu_amd.c pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL); msr 236 arch/x86/kvm/pmu_amd.c u32 msr = msr_info->index; msr 240 arch/x86/kvm/pmu_amd.c pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER); msr 246 arch/x86/kvm/pmu_amd.c pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL); msr 687 arch/x86/kvm/svm.c static u32 svm_msrpm_offset(u32 msr) msr 693 arch/x86/kvm/svm.c if (msr < msrpm_ranges[i] || msr 694 arch/x86/kvm/svm.c msr >= msrpm_ranges[i] + MSRS_IN_RANGE) msr 697 arch/x86/kvm/svm.c offset = (msr - msrpm_ranges[i]) / 4; /* 4 msrs per u8 */ msr 1041 arch/x86/kvm/svm.c static bool msr_write_intercepted(struct kvm_vcpu *vcpu, unsigned msr) msr 1051 arch/x86/kvm/svm.c offset = svm_msrpm_offset(msr); msr 1052 arch/x86/kvm/svm.c bit_write = 2 * (msr & 0x0f) + 1; msr 1060 arch/x86/kvm/svm.c static void set_msr_interception(u32 *msrpm, unsigned msr, msr 1071 arch/x86/kvm/svm.c WARN_ON(!valid_msr_intercept(msr)); msr 1073 arch/x86/kvm/svm.c offset = svm_msrpm_offset(msr); msr 1074 arch/x86/kvm/svm.c bit_read = 2 * (msr & 0x0f); msr 1075 arch/x86/kvm/svm.c bit_write = 2 * (msr & 0x0f) + 1; msr 1309 arch/x86/kvm/svm.c u64 msr, mask; msr 1316 arch/x86/kvm/svm.c rdmsrl(MSR_K8_SYSCFG, msr); msr 1317 arch/x86/kvm/svm.c if (!(msr & MSR_K8_SYSCFG_MEM_ENCRYPT)) msr 3177 arch/x86/kvm/svm.c u32 offset, msr, value; msr 3183 arch/x86/kvm/svm.c msr = svm->vcpu.arch.regs[VCPU_REGS_RCX]; msr 3184 arch/x86/kvm/svm.c offset = svm_msrpm_offset(msr); msr 3186 arch/x86/kvm/svm.c mask = 1 << ((2 * (msr & 0xf)) + write); msr 4153 arch/x86/kvm/svm.c static int svm_get_msr_feature(struct kvm_msr_entry *msr) msr 4155 arch/x86/kvm/svm.c msr->data = 0; msr 4157 arch/x86/kvm/svm.c switch (msr->index) { msr 4160 arch/x86/kvm/svm.c msr->data |= MSR_F10H_DECFG_LFENCE_SERIALIZE; msr 4302 arch/x86/kvm/svm.c static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) msr 4306 arch/x86/kvm/svm.c u32 ecx = msr->index; msr 4307 arch/x86/kvm/svm.c u64 data = msr->data; msr 4317 arch/x86/kvm/svm.c if (!msr->host_initiated && msr 4345 arch/x86/kvm/svm.c if (!msr->host_initiated && msr 4361 arch/x86/kvm/svm.c if (!msr->host_initiated && msr 4437 arch/x86/kvm/svm.c msr_entry.index = msr->index; msr 4446 arch/x86/kvm/svm.c if (!msr->host_initiated && (data ^ msr_entry.data)) msr 4457 arch/x86/kvm/svm.c return kvm_set_msr_common(vcpu, msr); msr 1101 arch/x86/kvm/trace.h TP_PROTO(int vcpu_id, u32 msr, u64 data, bool host), msr 1102 arch/x86/kvm/trace.h TP_ARGS(vcpu_id, msr, data, host), msr 1106 arch/x86/kvm/trace.h __field(u32, msr) msr 1113 arch/x86/kvm/trace.h __entry->msr = msr; msr 1119 arch/x86/kvm/trace.h __entry->vcpu_id, __entry->msr, __entry->data, __entry->host) msr 485 arch/x86/kvm/vmx/nested.c static bool msr_write_intercepted_l01(struct kvm_vcpu *vcpu, u32 msr) msr 495 arch/x86/kvm/vmx/nested.c if (msr <= 0x1fff) { msr 496 arch/x86/kvm/vmx/nested.c return !!test_bit(msr, msr_bitmap + 0x800 / f); msr 497 arch/x86/kvm/vmx/nested.c } else if ((msr >= 0xc0000000) && (msr <= 0xc0001fff)) { msr 498 arch/x86/kvm/vmx/nested.c msr &= 0x1fff; msr 499 arch/x86/kvm/vmx/nested.c return !!test_bit(msr, msr_bitmap + 0xc00 / f); msr 511 arch/x86/kvm/vmx/nested.c u32 msr, int type) msr 520 arch/x86/kvm/vmx/nested.c if (msr <= 0x1fff) { msr 522 arch/x86/kvm/vmx/nested.c !test_bit(msr, msr_bitmap_l1 + 0x000 / f)) msr 524 arch/x86/kvm/vmx/nested.c __clear_bit(msr, msr_bitmap_nested + 0x000 / f); msr 527 arch/x86/kvm/vmx/nested.c !test_bit(msr, msr_bitmap_l1 + 0x800 / f)) msr 529 arch/x86/kvm/vmx/nested.c __clear_bit(msr, msr_bitmap_nested + 0x800 / f); msr 531 arch/x86/kvm/vmx/nested.c } else if ((msr >= 0xc0000000) && (msr <= 0xc0001fff)) { msr 532 arch/x86/kvm/vmx/nested.c msr &= 0x1fff; msr 534 arch/x86/kvm/vmx/nested.c !test_bit(msr, msr_bitmap_l1 + 0x400 / f)) msr 536 arch/x86/kvm/vmx/nested.c __clear_bit(msr, msr_bitmap_nested + 0x400 / f); msr 539 arch/x86/kvm/vmx/nested.c !test_bit(msr, msr_bitmap_l1 + 0xc00 / f)) msr 541 arch/x86/kvm/vmx/nested.c __clear_bit(msr, msr_bitmap_nested + 0xc00 / f); msr 547 arch/x86/kvm/vmx/nested.c int msr; msr 549 arch/x86/kvm/vmx/nested.c for (msr = 0x800; msr <= 0x8ff; msr += BITS_PER_LONG) { msr 550 arch/x86/kvm/vmx/nested.c unsigned word = msr / BITS_PER_LONG; msr 564 arch/x86/kvm/vmx/nested.c int msr; msr 594 arch/x86/kvm/vmx/nested.c for (msr = 0x800; msr <= 0x8ff; msr += BITS_PER_LONG) { msr 595 arch/x86/kvm/vmx/nested.c unsigned word = msr / BITS_PER_LONG; msr 1187 arch/x86/kvm/vmx/nested.c u64 *msr; msr 1191 arch/x86/kvm/vmx/nested.c msr = &vmx->nested.msrs.cr0_fixed0; msr 1194 arch/x86/kvm/vmx/nested.c msr = &vmx->nested.msrs.cr4_fixed0; msr 1204 arch/x86/kvm/vmx/nested.c if (!is_bitwise_subset(data, *msr, -1ULL)) msr 1207 arch/x86/kvm/vmx/nested.c *msr = data; msr 151 arch/x86/kvm/vmx/pmu_intel.c static bool intel_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr) msr 156 arch/x86/kvm/vmx/pmu_intel.c switch (msr) { msr 164 arch/x86/kvm/vmx/pmu_intel.c ret = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0) || msr 165 arch/x86/kvm/vmx/pmu_intel.c get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0) || msr 166 arch/x86/kvm/vmx/pmu_intel.c get_fixed_pmc(pmu, msr); msr 173 arch/x86/kvm/vmx/pmu_intel.c static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data) msr 178 arch/x86/kvm/vmx/pmu_intel.c switch (msr) { msr 192 arch/x86/kvm/vmx/pmu_intel.c if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0))) { msr 196 arch/x86/kvm/vmx/pmu_intel.c } else if ((pmc = get_fixed_pmc(pmu, msr))) { msr 200 arch/x86/kvm/vmx/pmu_intel.c } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) { msr 213 arch/x86/kvm/vmx/pmu_intel.c u32 msr = msr_info->index; msr 216 arch/x86/kvm/vmx/pmu_intel.c switch (msr) { msr 248 arch/x86/kvm/vmx/pmu_intel.c if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0))) { msr 254 arch/x86/kvm/vmx/pmu_intel.c } else if ((pmc = get_fixed_pmc(pmu, msr))) { msr 257 arch/x86/kvm/vmx/pmu_intel.c } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) { msr 223 arch/x86/kvm/vmx/vmx.c u64 msr; msr 225 arch/x86/kvm/vmx/vmx.c rdmsrl(MSR_IA32_ARCH_CAPABILITIES, msr); msr 226 arch/x86/kvm/vmx/vmx.c if (msr & ARCH_CAP_SKIP_VMENTRY_L1DFLUSH) { msr 347 arch/x86/kvm/vmx/vmx.c u32 msr, int type); msr 621 arch/x86/kvm/vmx/vmx.c static inline int __find_msr_index(struct vcpu_vmx *vmx, u32 msr) msr 626 arch/x86/kvm/vmx/vmx.c if (vmx_msr_index[vmx->guest_msrs[i].index] == msr) msr 631 arch/x86/kvm/vmx/vmx.c struct shared_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr) msr 635 arch/x86/kvm/vmx/vmx.c i = __find_msr_index(vmx, msr); msr 788 arch/x86/kvm/vmx/vmx.c static bool msr_write_intercepted(struct kvm_vcpu *vcpu, u32 msr) msr 798 arch/x86/kvm/vmx/vmx.c if (msr <= 0x1fff) { msr 799 arch/x86/kvm/vmx/vmx.c return !!test_bit(msr, msr_bitmap + 0x800 / f); msr 800 arch/x86/kvm/vmx/vmx.c } else if ((msr >= 0xc0000000) && (msr <= 0xc0001fff)) { msr 801 arch/x86/kvm/vmx/vmx.c msr &= 0x1fff; msr 802 arch/x86/kvm/vmx/vmx.c return !!test_bit(msr, msr_bitmap + 0xc00 / f); msr 815 arch/x86/kvm/vmx/vmx.c static int find_msr(struct vmx_msrs *m, unsigned int msr) msr 820 arch/x86/kvm/vmx/vmx.c if (m->val[i].index == msr) msr 826 arch/x86/kvm/vmx/vmx.c static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr) msr 831 arch/x86/kvm/vmx/vmx.c switch (msr) { msr 849 arch/x86/kvm/vmx/vmx.c i = find_msr(&m->guest, msr); msr 857 arch/x86/kvm/vmx/vmx.c i = find_msr(&m->host, msr); msr 878 arch/x86/kvm/vmx/vmx.c static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr, msr 884 arch/x86/kvm/vmx/vmx.c switch (msr) { msr 916 arch/x86/kvm/vmx/vmx.c i = find_msr(&m->guest, msr); msr 918 arch/x86/kvm/vmx/vmx.c j = find_msr(&m->host, msr); msr 923 arch/x86/kvm/vmx/vmx.c "Can't add msr %x\n", msr); msr 930 arch/x86/kvm/vmx/vmx.c m->guest.val[i].index = msr; msr 940 arch/x86/kvm/vmx/vmx.c m->host.val[j].index = msr; msr 1731 arch/x86/kvm/vmx/vmx.c static int vmx_get_msr_feature(struct kvm_msr_entry *msr) msr 1733 arch/x86/kvm/vmx/vmx.c switch (msr->index) { msr 1737 arch/x86/kvm/vmx/vmx.c return vmx_get_vmx_msr(&vmcs_config.nested, msr->index, &msr->data); msr 1753 arch/x86/kvm/vmx/vmx.c struct shared_msr_entry *msr; msr 1874 arch/x86/kvm/vmx/vmx.c msr = find_msr_entry(vmx, msr_info->index); msr 1875 arch/x86/kvm/vmx/vmx.c if (msr) { msr 1876 arch/x86/kvm/vmx/vmx.c msr_info->data = msr->data; msr 1893 arch/x86/kvm/vmx/vmx.c struct shared_msr_entry *msr; msr 2144 arch/x86/kvm/vmx/vmx.c msr = find_msr_entry(vmx, msr_index); msr 2145 arch/x86/kvm/vmx/vmx.c if (msr) { msr 2146 arch/x86/kvm/vmx/vmx.c u64 old_msr_data = msr->data; msr 2147 arch/x86/kvm/vmx/vmx.c msr->data = data; msr 2148 arch/x86/kvm/vmx/vmx.c if (msr - vmx->guest_msrs < vmx->save_nmsrs) { msr 2150 arch/x86/kvm/vmx/vmx.c ret = kvm_set_shared_msr(msr->index, msr->data, msr 2151 arch/x86/kvm/vmx/vmx.c msr->mask); msr 2154 arch/x86/kvm/vmx/vmx.c msr->data = old_msr_data; msr 2190 arch/x86/kvm/vmx/vmx.c u64 msr; msr 2192 arch/x86/kvm/vmx/vmx.c rdmsrl(MSR_IA32_FEATURE_CONTROL, msr); msr 2193 arch/x86/kvm/vmx/vmx.c if (msr & FEATURE_CONTROL_LOCKED) { msr 2195 arch/x86/kvm/vmx/vmx.c if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX) msr 2199 arch/x86/kvm/vmx/vmx.c if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX) msr 2200 arch/x86/kvm/vmx/vmx.c && (msr & FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX) msr 2207 arch/x86/kvm/vmx/vmx.c if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX) msr 2287 arch/x86/kvm/vmx/vmx.c u32 msr, u32 *result) msr 2292 arch/x86/kvm/vmx/vmx.c rdmsr(msr, vmx_msr_low, vmx_msr_high); msr 2768 arch/x86/kvm/vmx/vmx.c struct shared_msr_entry *msr = find_msr_entry(vmx, MSR_EFER); msr 2770 arch/x86/kvm/vmx/vmx.c if (!msr) msr 2776 arch/x86/kvm/vmx/vmx.c msr->data = efer; msr 2780 arch/x86/kvm/vmx/vmx.c msr->data = efer & ~EFER_LME; msr 3573 arch/x86/kvm/vmx/vmx.c u32 msr, int type) msr 3588 arch/x86/kvm/vmx/vmx.c if (msr <= 0x1fff) { msr 3591 arch/x86/kvm/vmx/vmx.c __clear_bit(msr, msr_bitmap + 0x000 / f); msr 3595 arch/x86/kvm/vmx/vmx.c __clear_bit(msr, msr_bitmap + 0x800 / f); msr 3597 arch/x86/kvm/vmx/vmx.c } else if ((msr >= 0xc0000000) && (msr <= 0xc0001fff)) { msr 3598 arch/x86/kvm/vmx/vmx.c msr &= 0x1fff; msr 3601 arch/x86/kvm/vmx/vmx.c __clear_bit(msr, msr_bitmap + 0x400 / f); msr 3605 arch/x86/kvm/vmx/vmx.c __clear_bit(msr, msr_bitmap + 0xc00 / f); msr 3611 arch/x86/kvm/vmx/vmx.c u32 msr, int type) msr 3626 arch/x86/kvm/vmx/vmx.c if (msr <= 0x1fff) { msr 3629 arch/x86/kvm/vmx/vmx.c __set_bit(msr, msr_bitmap + 0x000 / f); msr 3633 arch/x86/kvm/vmx/vmx.c __set_bit(msr, msr_bitmap + 0x800 / f); msr 3635 arch/x86/kvm/vmx/vmx.c } else if ((msr >= 0xc0000000) && (msr <= 0xc0001fff)) { msr 3636 arch/x86/kvm/vmx/vmx.c msr &= 0x1fff; msr 3639 arch/x86/kvm/vmx/vmx.c __set_bit(msr, msr_bitmap + 0x400 / f); msr 3643 arch/x86/kvm/vmx/vmx.c __set_bit(msr, msr_bitmap + 0xc00 / f); msr 3649 arch/x86/kvm/vmx/vmx.c u32 msr, int type, bool value) msr 3652 arch/x86/kvm/vmx/vmx.c vmx_enable_intercept_for_msr(msr_bitmap, msr, type); msr 3654 arch/x86/kvm/vmx/vmx.c vmx_disable_intercept_for_msr(msr_bitmap, msr, type); msr 3675 arch/x86/kvm/vmx/vmx.c int msr; msr 3677 arch/x86/kvm/vmx/vmx.c for (msr = 0x800; msr <= 0x8ff; msr += BITS_PER_LONG) { msr 3678 arch/x86/kvm/vmx/vmx.c unsigned word = msr / BITS_PER_LONG; msr 6424 arch/x86/kvm/vmx/vmx.c clear_atomic_switch_msr(vmx, msrs[i].msr); msr 6426 arch/x86/kvm/vmx/vmx.c add_atomic_switch_msr(vmx, msrs[i].msr, msrs[i].guest, msr 335 arch/x86/kvm/vmx/vmx.h struct shared_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr); msr 265 arch/x86/kvm/x86.c static void shared_msr_update(unsigned slot, u32 msr) msr 277 arch/x86/kvm/x86.c rdmsrl_safe(msr, &value); msr 282 arch/x86/kvm/x86.c void kvm_define_shared_msr(unsigned slot, u32 msr) msr 285 arch/x86/kvm/x86.c shared_msrs_global.msrs[slot] = msr; msr 1400 arch/x86/kvm/x86.c static int kvm_get_msr_feature(struct kvm_msr_entry *msr) msr 1402 arch/x86/kvm/x86.c switch (msr->index) { msr 1404 arch/x86/kvm/x86.c msr->data = kvm_get_arch_capabilities(); msr 1407 arch/x86/kvm/x86.c rdmsrl_safe(msr->index, &msr->data); msr 1410 arch/x86/kvm/x86.c if (kvm_x86_ops->get_msr_feature(msr)) msr 1418 arch/x86/kvm/x86.c struct kvm_msr_entry msr; msr 1421 arch/x86/kvm/x86.c msr.index = index; msr 1422 arch/x86/kvm/x86.c r = kvm_get_msr_feature(&msr); msr 1426 arch/x86/kvm/x86.c *data = msr.data; msr 1502 arch/x86/kvm/x86.c struct msr_data msr; msr 1530 arch/x86/kvm/x86.c msr.data = data; msr 1531 arch/x86/kvm/x86.c msr.index = index; msr 1532 arch/x86/kvm/x86.c msr.host_initiated = host_initiated; msr 1534 arch/x86/kvm/x86.c return kvm_x86_ops->set_msr(vcpu, &msr); msr 1546 arch/x86/kvm/x86.c struct msr_data msr; msr 1549 arch/x86/kvm/x86.c msr.index = index; msr 1550 arch/x86/kvm/x86.c msr.host_initiated = host_initiated; msr 1552 arch/x86/kvm/x86.c ret = kvm_x86_ops->get_msr(vcpu, &msr); msr 1554 arch/x86/kvm/x86.c *data = msr.data; msr 1939 arch/x86/kvm/x86.c void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr) msr 1946 arch/x86/kvm/x86.c u64 data = msr->data; msr 1955 arch/x86/kvm/x86.c if (data == 0 && msr->host_initiated) { msr 2025 arch/x86/kvm/x86.c if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) msr 2532 arch/x86/kvm/x86.c u32 msr = msr_info->index; msr 2535 arch/x86/kvm/x86.c switch (msr) { msr 2548 arch/x86/kvm/x86.c if (msr >= MSR_IA32_MC0_CTL && msr 2549 arch/x86/kvm/x86.c msr < MSR_IA32_MCx_CTL(bank_num)) { msr 2551 arch/x86/kvm/x86.c msr - MSR_IA32_MC0_CTL, msr 2695 arch/x86/kvm/x86.c u32 msr = msr_info->index; msr 2698 arch/x86/kvm/x86.c switch (msr) { msr 2753 arch/x86/kvm/x86.c return kvm_mtrr_set_msr(vcpu, msr, data); msr 2757 arch/x86/kvm/x86.c return kvm_x2apic_msr_write(vcpu, msr, data); msr 2807 arch/x86/kvm/x86.c bool tmp = (msr == MSR_KVM_SYSTEM_TIME); msr 2873 arch/x86/kvm/x86.c if (kvm_pmu_is_valid_msr(vcpu, msr)) msr 2878 arch/x86/kvm/x86.c "0x%x data 0x%llx\n", msr, data); msr 2897 arch/x86/kvm/x86.c return kvm_hv_set_msr_common(vcpu, msr, data, msr 2905 arch/x86/kvm/x86.c msr, data); msr 2932 arch/x86/kvm/x86.c if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr)) msr 2934 arch/x86/kvm/x86.c if (kvm_pmu_is_valid_msr(vcpu, msr)) msr 2938 arch/x86/kvm/x86.c msr, data); msr 2944 arch/x86/kvm/x86.c msr, data); msr 2952 arch/x86/kvm/x86.c static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host) msr 2958 arch/x86/kvm/x86.c switch (msr) { msr 2975 arch/x86/kvm/x86.c if (msr >= MSR_IA32_MC0_CTL && msr 2976 arch/x86/kvm/x86.c msr < MSR_IA32_MCx_CTL(bank_num)) { msr 2978 arch/x86/kvm/x86.c msr - MSR_IA32_MC0_CTL, msr 5277 arch/x86/kvm/x86.c struct kvm_msr_entry msr; msr 5279 arch/x86/kvm/x86.c msr.index = msr_based_features_all[i]; msr 5280 arch/x86/kvm/x86.c if (kvm_get_msr_feature(&msr)) msr 9181 arch/x86/kvm/x86.c struct msr_data msr; msr 9189 arch/x86/kvm/x86.c msr.data = 0x0; msr 9190 arch/x86/kvm/x86.c msr.index = MSR_IA32_TSC; msr 9191 arch/x86/kvm/x86.c msr.host_initiated = true; msr 9192 arch/x86/kvm/x86.c kvm_write_tsc(vcpu, &msr); msr 266 arch/x86/kvm/x86.h void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr); msr 283 arch/x86/kvm/x86.h bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data); msr 284 arch/x86/kvm/x86.h int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data); msr 285 arch/x86/kvm/x86.h int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); msr 11 arch/x86/lib/msr-smp.c struct msr *reg; msr 25 arch/x86/lib/msr-smp.c struct msr *reg; msr 100 arch/x86/lib/msr-smp.c struct msr *msrs, msr 127 arch/x86/lib/msr-smp.c void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs) msr 141 arch/x86/lib/msr-smp.c void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs) msr 148 arch/x86/lib/msr-smp.c struct msr_info msr; msr 158 arch/x86/lib/msr-smp.c rv->msr.err = rdmsr_safe(rv->msr.msr_no, &rv->msr.reg.l, &rv->msr.reg.h); msr 180 arch/x86/lib/msr-smp.c rv.msr.msr_no = msr_no; msr 185 arch/x86/lib/msr-smp.c err = rv.msr.err; msr 187 arch/x86/lib/msr-smp.c *l = rv.msr.reg.l; msr 188 arch/x86/lib/msr-smp.c *h = rv.msr.reg.h; msr 9 arch/x86/lib/msr.c struct msr *msrs_alloc(void) msr 11 arch/x86/lib/msr.c struct msr *msrs = NULL; msr 13 arch/x86/lib/msr.c msrs = alloc_percpu(struct msr); msr 23 arch/x86/lib/msr.c void msrs_free(struct msr *msrs) msr 39 arch/x86/lib/msr.c int msr_read(u32 msr, struct msr *m) msr 44 arch/x86/lib/msr.c err = rdmsrl_safe(msr, &val); msr 57 arch/x86/lib/msr.c int msr_write(u32 msr, struct msr *m) msr 59 arch/x86/lib/msr.c return wrmsrl_safe(msr, m->q); msr 62 arch/x86/lib/msr.c static inline int __flip_bit(u32 msr, u8 bit, bool set) msr 64 arch/x86/lib/msr.c struct msr m, m1; msr 70 arch/x86/lib/msr.c err = msr_read(msr, &m); msr 83 arch/x86/lib/msr.c err = msr_write(msr, &m1); msr 98 arch/x86/lib/msr.c int msr_set_bit(u32 msr, u8 bit) msr 100 arch/x86/lib/msr.c return __flip_bit(msr, bit, true); msr 111 arch/x86/lib/msr.c int msr_clear_bit(u32 msr, u8 bit) msr 113 arch/x86/lib/msr.c return __flip_bit(msr, bit, false); msr 117 arch/x86/lib/msr.c void do_trace_write_msr(unsigned int msr, u64 val, int failed) msr 119 arch/x86/lib/msr.c trace_write_msr(msr, val, failed); msr 124 arch/x86/lib/msr.c void do_trace_read_msr(unsigned int msr, u64 val, int failed) msr 126 arch/x86/lib/msr.c trace_read_msr(msr, val, failed); msr 495 arch/x86/mm/mem_encrypt_identity.c u64 msr; msr 534 arch/x86/mm/mem_encrypt_identity.c msr = __rdmsr(MSR_K8_SYSCFG); msr 535 arch/x86/mm/mem_encrypt_identity.c if (!(msr & MSR_K8_SYSCFG_MEM_ENCRYPT)) msr 539 arch/x86/mm/mem_encrypt_identity.c msr = __rdmsr(MSR_AMD64_SEV); msr 540 arch/x86/mm/mem_encrypt_identity.c if (!(msr & MSR_AMD64_SEV_ENABLED)) msr 192 arch/x86/pci/mmconfig-shared.c u64 base, msr; msr 203 arch/x86/pci/mmconfig-shared.c msr = high; msr 204 arch/x86/pci/mmconfig-shared.c msr <<= 32; msr 205 arch/x86/pci/mmconfig-shared.c msr |= low; msr 208 arch/x86/pci/mmconfig-shared.c if (!(msr & FAM10H_MMIO_CONF_ENABLE)) msr 211 arch/x86/pci/mmconfig-shared.c base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT); msr 213 arch/x86/pci/mmconfig-shared.c busnbits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) & msr 123 arch/x86/platform/pvh/enlighten.c u32 msr = xen_cpuid_base(); msr 124 arch/x86/platform/pvh/enlighten.c bool xen_guest = !!msr; msr 39 arch/x86/power/cpu.c struct saved_msr *msr = ctxt->saved_msrs.array; msr 40 arch/x86/power/cpu.c struct saved_msr *end = msr + ctxt->saved_msrs.num; msr 42 arch/x86/power/cpu.c while (msr < end) { msr 43 arch/x86/power/cpu.c msr->valid = !rdmsrl_safe(msr->info.msr_no, &msr->info.reg.q); msr 44 arch/x86/power/cpu.c msr++; msr 50 arch/x86/power/cpu.c struct saved_msr *msr = ctxt->saved_msrs.array; msr 51 arch/x86/power/cpu.c struct saved_msr *end = msr + ctxt->saved_msrs.num; msr 53 arch/x86/power/cpu.c while (msr < end) { msr 54 arch/x86/power/cpu.c if (msr->valid) msr 55 arch/x86/power/cpu.c wrmsrl(msr->info.msr_no, msr->info.reg.q); msr 56 arch/x86/power/cpu.c msr++; msr 104 arch/x86/xen/enlighten_hvm.c uint32_t msr; msr 107 arch/x86/xen/enlighten_hvm.c msr = cpuid_ebx(base + 2); msr 109 arch/x86/xen/enlighten_hvm.c wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); msr 889 arch/x86/xen/enlighten_pv.c static u64 xen_read_msr_safe(unsigned int msr, int *err) msr 893 arch/x86/xen/enlighten_pv.c if (pmu_msr_read(msr, &val, err)) msr 896 arch/x86/xen/enlighten_pv.c val = native_read_msr_safe(msr, err); msr 897 arch/x86/xen/enlighten_pv.c switch (msr) { msr 905 arch/x86/xen/enlighten_pv.c static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) msr 915 arch/x86/xen/enlighten_pv.c switch (msr) { msr 941 arch/x86/xen/enlighten_pv.c if (!pmu_msr_write(msr, low, high, &ret)) msr 942 arch/x86/xen/enlighten_pv.c ret = native_write_msr_safe(msr, low, high); msr 948 arch/x86/xen/enlighten_pv.c static u64 xen_read_msr(unsigned int msr) msr 956 arch/x86/xen/enlighten_pv.c return xen_read_msr_safe(msr, &err); msr 959 arch/x86/xen/enlighten_pv.c static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) msr 965 arch/x86/xen/enlighten_pv.c xen_write_msr_safe(msr, low, high); msr 28 arch/x86/xen/enlighten_pvh.c u32 msr; msr 35 arch/x86/xen/enlighten_pvh.c msr = cpuid_ebx(xen_cpuid_base() + 2); msr 37 arch/x86/xen/enlighten_pvh.c wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); msr 132 arch/x86/xen/pmu.c static inline bool is_amd_pmu_msr(unsigned int msr) msr 134 arch/x86/xen/pmu.c if ((msr >= MSR_F15H_PERF_CTL && msr 135 arch/x86/xen/pmu.c msr < MSR_F15H_PERF_CTR + (amd_num_counters * 2)) || msr 136 arch/x86/xen/pmu.c (msr >= MSR_K7_EVNTSEL0 && msr 137 arch/x86/xen/pmu.c msr < MSR_K7_PERFCTR0 + amd_num_counters)) msr 189 arch/x86/xen/pmu.c static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type, msr 205 arch/x86/xen/pmu.c switch (msr) { msr 243 arch/x86/xen/pmu.c if (msr == MSR_CORE_PERF_GLOBAL_OVF_CTRL) msr 252 arch/x86/xen/pmu.c static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read) msr 265 arch/x86/xen/pmu.c ((msr >= MSR_K7_EVNTSEL0) && (msr <= MSR_K7_PERFCTR3))) msr 266 arch/x86/xen/pmu.c msr = get_fam15h_addr(msr); msr 270 arch/x86/xen/pmu.c if (msr == amd_ctrls_base + off) { msr 274 arch/x86/xen/pmu.c } else if (msr == amd_counters_base + off) { msr 293 arch/x86/xen/pmu.c bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err) msr 296 arch/x86/xen/pmu.c if (is_amd_pmu_msr(msr)) { msr 297 arch/x86/xen/pmu.c if (!xen_amd_pmu_emulate(msr, val, 1)) msr 298 arch/x86/xen/pmu.c *val = native_read_msr_safe(msr, err); msr 304 arch/x86/xen/pmu.c if (is_intel_pmu_msr(msr, &type, &index)) { msr 305 arch/x86/xen/pmu.c if (!xen_intel_pmu_emulate(msr, val, type, index, 1)) msr 306 arch/x86/xen/pmu.c *val = native_read_msr_safe(msr, err); msr 314 arch/x86/xen/pmu.c bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err) msr 319 arch/x86/xen/pmu.c if (is_amd_pmu_msr(msr)) { msr 320 arch/x86/xen/pmu.c if (!xen_amd_pmu_emulate(msr, &val, 0)) msr 321 arch/x86/xen/pmu.c *err = native_write_msr_safe(msr, low, high); msr 327 arch/x86/xen/pmu.c if (is_intel_pmu_msr(msr, &type, &index)) { msr 328 arch/x86/xen/pmu.c if (!xen_intel_pmu_emulate(msr, &val, type, index, 0)) msr 329 arch/x86/xen/pmu.c *err = native_write_msr_safe(msr, low, high); msr 345 arch/x86/xen/pmu.c uint32_t msr; msr 348 arch/x86/xen/pmu.c msr = amd_counters_base + (counter * amd_msr_step); msr 349 arch/x86/xen/pmu.c return native_read_msr_safe(msr, &err); msr 366 arch/x86/xen/pmu.c uint32_t msr; msr 370 arch/x86/xen/pmu.c msr = MSR_CORE_PERF_FIXED_CTR0 + (counter & 0xffff); msr 372 arch/x86/xen/pmu.c msr = MSR_IA32_PERFCTR0 + counter; msr 374 arch/x86/xen/pmu.c return native_read_msr_safe(msr, &err); msr 16 arch/x86/xen/pmu.h bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err); msr 17 arch/x86/xen/pmu.h bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err); msr 713 drivers/acpi/processor_throttling.c u64 msr = 0; msr 725 drivers/acpi/processor_throttling.c msr = (msr_high << 32) | msr_low; msr 726 drivers/acpi/processor_throttling.c *value = (u64) msr; msr 735 drivers/acpi/processor_throttling.c u64 msr; msr 742 drivers/acpi/processor_throttling.c msr = value; msr 744 drivers/acpi/processor_throttling.c msr & 0xffffffff, msr >> 32); msr 33 drivers/ata/pata_cs5536.c module_param_named(msr, use_msr, int, 0644); msr 34 drivers/ata/pata_cs5536.c MODULE_PARM_DESC(msr, "Force using MSR to configure IDE function (Default: 0)"); msr 293 drivers/bluetooth/dtl1_cs.c unsigned char msr; msr 340 drivers/bluetooth/dtl1_cs.c msr = inb(iobase + UART_MSR); msr 342 drivers/bluetooth/dtl1_cs.c if (info->ri_latch ^ (msr & UART_MSR_RI)) { msr 343 drivers/bluetooth/dtl1_cs.c info->ri_latch = msr & UART_MSR_RI; msr 75 drivers/cpufreq/acpi-cpufreq.c u64 msr; msr 80 drivers/cpufreq/acpi-cpufreq.c msr = lo | ((u64)hi << 32); msr 81 drivers/cpufreq/acpi-cpufreq.c return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE); msr 85 drivers/cpufreq/acpi-cpufreq.c msr = lo | ((u64)hi << 32); msr 86 drivers/cpufreq/acpi-cpufreq.c return !(msr & MSR_K7_HWCR_CPB_DIS); msr 206 drivers/cpufreq/acpi-cpufreq.c static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr) msr 213 drivers/cpufreq/acpi-cpufreq.c msr &= AMD_MSR_RANGE; msr 215 drivers/cpufreq/acpi-cpufreq.c msr &= HYGON_MSR_RANGE; msr 217 drivers/cpufreq/acpi-cpufreq.c msr &= INTEL_MSR_RANGE; msr 222 drivers/cpufreq/acpi-cpufreq.c if (msr == perf->states[pos->driver_data].status) msr 44 drivers/cpufreq/amd_freq_sensitivity.c struct msr actual, reference; msr 287 drivers/cpufreq/speedstep-centrino.c static unsigned extract_clock(unsigned msr, unsigned int cpu, int failsafe) msr 299 drivers/cpufreq/speedstep-centrino.c msr = (msr >> 8) & 0xff; msr 300 drivers/cpufreq/speedstep-centrino.c return msr * 100000; msr 307 drivers/cpufreq/speedstep-centrino.c msr &= 0xffff; msr 312 drivers/cpufreq/speedstep-centrino.c if (msr == per_cpu(centrino_model, cpu)->op_points[i].driver_data) msr 424 drivers/cpufreq/speedstep-centrino.c unsigned int msr, oldmsr = 0, h = 0, cpu = policy->cpu; msr 463 drivers/cpufreq/speedstep-centrino.c msr = op_points->driver_data; msr 467 drivers/cpufreq/speedstep-centrino.c if (msr == (oldmsr & 0xffff)) { msr 477 drivers/cpufreq/speedstep-centrino.c msr &= 0xffff; msr 478 drivers/cpufreq/speedstep-centrino.c oldmsr |= msr; msr 17 drivers/edac/amd64_edac.c static struct msr __percpu *msrs; msr 3050 drivers/edac/amd64_edac.c struct msr *reg = per_cpu_ptr(msrs, cpu); msr 3083 drivers/edac/amd64_edac.c struct msr *reg = per_cpu_ptr(msrs, cpu); msr 476 drivers/i2c/busses/i2c-rcar.c static void rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr) msr 481 drivers/i2c/busses/i2c-rcar.c if (!(msr & MDE)) msr 523 drivers/i2c/busses/i2c-rcar.c static void rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr) msr 528 drivers/i2c/busses/i2c-rcar.c if (!(msr & MDR)) msr 531 drivers/i2c/busses/i2c-rcar.c if (msr & MAT) { msr 626 drivers/i2c/busses/i2c-rcar.c u32 msr, val; msr 634 drivers/i2c/busses/i2c-rcar.c msr = rcar_i2c_read(priv, ICMSR); msr 637 drivers/i2c/busses/i2c-rcar.c msr &= rcar_i2c_read(priv, ICMIER); msr 638 drivers/i2c/busses/i2c-rcar.c if (!msr) { msr 646 drivers/i2c/busses/i2c-rcar.c if (msr & MAL) { msr 652 drivers/i2c/busses/i2c-rcar.c if (msr & MNR) { msr 660 drivers/i2c/busses/i2c-rcar.c if (msr & MST) { msr 667 drivers/i2c/busses/i2c-rcar.c rcar_i2c_irq_recv(priv, msr); msr 669 drivers/i2c/busses/i2c-rcar.c rcar_i2c_irq_send(priv, msr); msr 117 drivers/i2c/busses/i2c-sh7760.c unsigned long msr, fsr, fier, len; msr 119 drivers/i2c/busses/i2c-sh7760.c msr = IN32(id, I2CMSR); msr 123 drivers/i2c/busses/i2c-sh7760.c if (msr & MSR_MAL) { msr 131 drivers/i2c/busses/i2c-sh7760.c if (msr & MSR_MNR) { msr 146 drivers/i2c/busses/i2c-sh7760.c msr &= ~MSR_MAT; msr 152 drivers/i2c/busses/i2c-sh7760.c if (msr & MSR_MST) { msr 158 drivers/i2c/busses/i2c-sh7760.c if (msr & MSR_MAT) msr 231 drivers/i2c/busses/i2c-sh7760.c OUT32(id, I2CMSR, ~msr); msr 293 drivers/ide/cs5536.c module_param_named(msr, use_msr, int, 0644); msr 294 drivers/ide/cs5536.c MODULE_PARM_DESC(msr, "Force using MSR to configure IDE function (Default: 0)"); msr 1216 drivers/idle/intel_idle.c unsigned long long msr; msr 1219 drivers/idle/intel_idle.c rdmsrl(MSR_PKGC6_IRTL, msr); msr 1220 drivers/idle/intel_idle.c usec = irtl_2_usec(msr); msr 1226 drivers/idle/intel_idle.c rdmsrl(MSR_PKGC7_IRTL, msr); msr 1227 drivers/idle/intel_idle.c usec = irtl_2_usec(msr); msr 1233 drivers/idle/intel_idle.c rdmsrl(MSR_PKGC8_IRTL, msr); msr 1234 drivers/idle/intel_idle.c usec = irtl_2_usec(msr); msr 1240 drivers/idle/intel_idle.c rdmsrl(MSR_PKGC9_IRTL, msr); msr 1241 drivers/idle/intel_idle.c usec = irtl_2_usec(msr); msr 1247 drivers/idle/intel_idle.c rdmsrl(MSR_PKGC10_IRTL, msr); msr 1248 drivers/idle/intel_idle.c usec = irtl_2_usec(msr); msr 1263 drivers/idle/intel_idle.c unsigned long long msr; msr 1275 drivers/idle/intel_idle.c rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr); msr 1278 drivers/idle/intel_idle.c if ((msr & 0xF) != 8) msr 1287 drivers/idle/intel_idle.c rdmsrl(MSR_IA32_FEATURE_CONTROL, msr); msr 1290 drivers/idle/intel_idle.c if (msr & (1 << 18)) msr 2055 drivers/macintosh/via-pmu.c unsigned long msr; msr 2088 drivers/macintosh/via-pmu.c msr = mfmsr() | MSR_POW; msr 2091 drivers/macintosh/via-pmu.c mtmsr(msr); msr 42 drivers/mfd/ezx-pcap.c u32 msr; msr 150 drivers/mfd/ezx-pcap.c pcap->msr |= 1 << irq_to_pcap(pcap, d->irq); msr 158 drivers/mfd/ezx-pcap.c pcap->msr &= ~(1 << irq_to_pcap(pcap, d->irq)); msr 173 drivers/mfd/ezx-pcap.c ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr); msr 180 drivers/mfd/ezx-pcap.c u32 msr, isr, int_sel, service; msr 184 drivers/mfd/ezx-pcap.c ezx_pcap_read(pcap, PCAP_REG_MSR, &msr); msr 193 drivers/mfd/ezx-pcap.c ezx_pcap_write(pcap, PCAP_REG_MSR, isr | msr); msr 197 drivers/mfd/ezx-pcap.c service = isr & ~msr; msr 203 drivers/mfd/ezx-pcap.c ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr); msr 475 drivers/mfd/ezx-pcap.c pcap->msr = PCAP_MASK_ALL_INTERRUPT; msr 47 drivers/misc/cs5535-mfgpt.c uint32_t msr, mask, value, dummy; msr 66 drivers/misc/cs5535-mfgpt.c msr = MSR_MFGPT_NR; msr 71 drivers/misc/cs5535-mfgpt.c msr = MSR_MFGPT_NR; msr 76 drivers/misc/cs5535-mfgpt.c msr = MSR_MFGPT_IRQ; msr 84 drivers/misc/cs5535-mfgpt.c rdmsr(msr, value, dummy); msr 91 drivers/misc/cs5535-mfgpt.c wrmsr(msr, value, dummy); msr 1167 drivers/net/ethernet/i825xx/82596.c unsigned char msr = rtc[3]; msr 1173 drivers/net/ethernet/i825xx/82596.c rtc[3] = msr; msr 252 drivers/net/hamradio/baycom_ser_fdx.c unsigned char iir, msr; msr 262 drivers/net/hamradio/baycom_ser_fdx.c msr = inb(MSR(dev->base_addr)); msr 264 drivers/net/hamradio/baycom_ser_fdx.c if ((msr & 8) && bc->opt_dcd) msr 265 drivers/net/hamradio/baycom_ser_fdx.c hdlcdrv_setdcd(&bc->hdrv, !((msr ^ bc->opt_dcd) & 0x80)); msr 296 drivers/net/hamradio/baycom_ser_fdx.c msr = inb(MSR(dev->base_addr)); msr 298 drivers/net/hamradio/baycom_ser_fdx.c if ((msr & 8) && bc->opt_dcd) msr 299 drivers/net/hamradio/baycom_ser_fdx.c hdlcdrv_setdcd(&bc->hdrv, !((msr ^ bc->opt_dcd) & 0x80)); msr 304 drivers/net/hamradio/baycom_ser_fdx.c ser12_rx(dev, bc, &ts, msr & 0x10); /* CTS */ msr 745 drivers/net/hamradio/yam.c unsigned char msr = inb(MSR(dev->base_addr)); msr 754 drivers/net/hamradio/yam.c yp->dcd = (msr & RX_DCD) ? 1 : 0; msr 761 drivers/net/hamradio/yam.c if (msr & TX_RDY) { msr 768 drivers/net/hamradio/yam.c if (msr & RX_FLAG) msr 630 drivers/net/usb/rtl8150.c u8 cr, tcr, rcr, msr; msr 644 drivers/net/usb/rtl8150.c get_registers(dev, MSR, 1, &msr); msr 4321 drivers/net/wireless/atmel/atmel.c msr CPSR_c, r0 /* This is probably unnecessary */ msr 387 drivers/platform/x86/intel_speed_select_if/isst_if_common.c static bool match_punit_msr_white_list(int msr) msr 392 drivers/platform/x86/intel_speed_select_if/isst_if_common.c if (punit_msr_white_list[i] == msr) msr 406 drivers/platform/x86/intel_speed_select_if/isst_if_common.c if (!match_punit_msr_white_list(msr_cmd->msr)) msr 417 drivers/platform/x86/intel_speed_select_if/isst_if_common.c msr_cmd->msr, msr 421 drivers/platform/x86/intel_speed_select_if/isst_if_common.c ret = isst_store_cmd(0, msr_cmd->msr, msr 428 drivers/platform/x86/intel_speed_select_if/isst_if_common.c msr_cmd->msr, &data); msr 89 drivers/powercap/intel_rapl_msr.c u32 msr = (u32)ra->reg; msr 91 drivers/powercap/intel_rapl_msr.c if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) { msr 92 drivers/powercap/intel_rapl_msr.c pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu); msr 102 drivers/powercap/intel_rapl_msr.c u32 msr = (u32)ra->reg; msr 105 drivers/powercap/intel_rapl_msr.c ra->err = rdmsrl_safe(msr, &val); msr 112 drivers/powercap/intel_rapl_msr.c ra->err = wrmsrl_safe(msr, val); msr 181 drivers/regulator/bcm590xx-regulator.c BCM590XX_REG_RANGES(msr, dcdc_iosr1_ranges), msr 43 drivers/ssb/driver_extif.c u8 save_mcr, msr = 0; msr 48 drivers/ssb/driver_extif.c msr = regs[UART_MSR] & (UART_MSR_DCD | UART_MSR_RI msr 52 drivers/ssb/driver_extif.c return (msr == (UART_MSR_DCD | UART_MSR_CTS)); msr 48 drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c u8 msr; msr 51 drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c msr = rtl92e_readb(dev, MSR); msr 52 drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c msr &= ~MSR_LINK_MASK; msr 57 drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c msr |= (MSR_LINK_MANAGED << MSR_LINK_SHIFT); msr 59 drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT); msr 64 drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c msr |= (MSR_LINK_ADHOC << MSR_LINK_SHIFT); msr 66 drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT); msr 70 drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c msr |= (MSR_LINK_MASTER << MSR_LINK_SHIFT); msr 72 drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT); msr 78 drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c rtl92e_writeb(dev, MSR, msr); msr 667 drivers/staging/rtl8192u/r8192U_core.c u8 msr; msr 669 drivers/staging/rtl8192u/r8192U_core.c read_nic_byte(dev, MSR, &msr); msr 670 drivers/staging/rtl8192u/r8192U_core.c msr &= ~MSR_LINK_MASK; msr 679 drivers/staging/rtl8192u/r8192U_core.c msr |= (MSR_LINK_MANAGED << MSR_LINK_SHIFT); msr 681 drivers/staging/rtl8192u/r8192U_core.c msr |= (MSR_LINK_ADHOC << MSR_LINK_SHIFT); msr 683 drivers/staging/rtl8192u/r8192U_core.c msr |= (MSR_LINK_MASTER << MSR_LINK_SHIFT); msr 686 drivers/staging/rtl8192u/r8192U_core.c msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT); msr 689 drivers/staging/rtl8192u/r8192U_core.c write_nic_byte(dev, MSR, msr); msr 241 drivers/thermal/mtk_thermal.c const int *msr; msr 398 drivers/thermal/mtk_thermal.c .msr = mt8173_msr, msr 428 drivers/thermal/mtk_thermal.c .msr = mt2701_msr, msr 458 drivers/thermal/mtk_thermal.c .msr = mt2712_msr, msr 482 drivers/thermal/mtk_thermal.c .msr = mt7622_msr, msr 515 drivers/thermal/mtk_thermal.c .msr = mt8183_msr, msr 595 drivers/thermal/mtk_thermal.c conf->msr[conf->bank_data[bank->id].sensors[i]]); msr 2217 drivers/tty/mxser.c int max, irqbits, bits, msr; msr 2289 drivers/tty/mxser.c msr = inb(port->ioaddr + UART_MSR); msr 2290 drivers/tty/mxser.c if (msr & UART_MSR_ANY_DELTA) msr 2291 drivers/tty/mxser.c mxser_check_modem_status(tty, port, msr); msr 200 drivers/tty/serial/8250/8250.h static inline int serial8250_MSR_to_TIOCM(int msr) msr 204 drivers/tty/serial/8250/8250.h if (msr & UART_MSR_DCD) msr 206 drivers/tty/serial/8250/8250.h if (msr & UART_MSR_RI) msr 208 drivers/tty/serial/8250/8250.h if (msr & UART_MSR_DSR) msr 210 drivers/tty/serial/8250/8250.h if (msr & UART_MSR_CTS) msr 1984 drivers/tty/serial/8250/8250_port.c unsigned int msr = serial_in(up, UART_MSR); msr 1985 drivers/tty/serial/8250/8250_port.c up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; msr 1986 drivers/tty/serial/8250/8250_port.c if (msr & UART_MSR_CTS) msr 266 drivers/tty/serial/jsm/jsm.h u8 msr; /* WR MSR - Modem Status Reg */ msr 321 drivers/tty/serial/jsm/jsm.h u8 msr; /* WR MSR - Modem Status Reg */ msr 116 drivers/tty/serial/jsm/jsm_cls.c writeb(ch->ch_stopc, &ch->ch_cls_uart->msr); msr 242 drivers/tty/serial/jsm/jsm_cls.c writeb(ch->ch_stopc, &ch->ch_cls_uart->msr); msr 602 drivers/tty/serial/jsm/jsm_cls.c cls_parse_modem(ch, readb(&ch->ch_cls_uart->msr)); msr 813 drivers/tty/serial/jsm/jsm_cls.c cls_parse_modem(ch, readb(&ch->ch_cls_uart->msr)); msr 892 drivers/tty/serial/jsm/jsm_cls.c readb(&ch->ch_cls_uart->msr); msr 818 drivers/tty/serial/jsm/jsm_neo.c neo_parse_modem(ch, readb(&ch->ch_neo_uart->msr)); msr 1086 drivers/tty/serial/jsm/jsm_neo.c neo_parse_modem(ch, readb(&ch->ch_neo_uart->msr)); msr 1309 drivers/tty/serial/jsm/jsm_neo.c readb(&ch->ch_neo_uart->msr); msr 183 drivers/tty/serial/men_z135_uart.c u8 msr; msr 185 drivers/tty/serial/men_z135_uart.c msr = (uart->stat_reg >> 8) & 0xff; msr 187 drivers/tty/serial/men_z135_uart.c if (msr & MEN_Z135_MSR_DDCD) msr 189 drivers/tty/serial/men_z135_uart.c msr & MEN_Z135_MSR_DCD); msr 190 drivers/tty/serial/men_z135_uart.c if (msr & MEN_Z135_MSR_DCTS) msr 192 drivers/tty/serial/men_z135_uart.c msr & MEN_Z135_MSR_CTS); msr 523 drivers/tty/serial/men_z135_uart.c u8 msr; msr 525 drivers/tty/serial/men_z135_uart.c msr = ioread8(port->membase + MEN_Z135_STAT_REG + 1); msr 527 drivers/tty/serial/men_z135_uart.c if (msr & MEN_Z135_MSR_CTS) msr 529 drivers/tty/serial/men_z135_uart.c if (msr & MEN_Z135_MSR_DSR) msr 531 drivers/tty/serial/men_z135_uart.c if (msr & MEN_Z135_MSR_RI) msr 533 drivers/tty/serial/men_z135_uart.c if (msr & MEN_Z135_MSR_DCD) msr 1184 drivers/tty/serial/omap-serial.c unsigned int msr = serial_in(up, UART_MSR); msr 1186 drivers/tty/serial/omap-serial.c up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; msr 1187 drivers/tty/serial/omap-serial.c if (msr & UART_MSR_CTS) msr 555 drivers/tty/serial/pch_uart.c unsigned int msr = ioread8(priv->membase + UART_MSR); msr 556 drivers/tty/serial/pch_uart.c priv->dmsr = msr & PCH_UART_MSR_DELTA; msr 557 drivers/tty/serial/pch_uart.c return (u8)msr; msr 1091 drivers/tty/serial/pch_uart.c u8 msr; msr 1136 drivers/tty/serial/pch_uart.c msr = pch_uart_hal_get_modem(priv); msr 1139 drivers/tty/serial/pch_uart.c if ((msr & UART_MSR_ANY_DELTA) == 0) msr 1532 drivers/tty/serial/pch_uart.c unsigned int msr = ioread8(up->membase + UART_MSR); msr 1533 drivers/tty/serial/pch_uart.c if (msr & UART_MSR_CTS) msr 327 drivers/tty/serial/pnx8xxx_uart.c unsigned int msr; msr 331 drivers/tty/serial/pnx8xxx_uart.c msr = serial_in(sport, PNX8XXX_MCR); msr 333 drivers/tty/serial/pnx8xxx_uart.c mctrl |= msr & PNX8XXX_UART_MCR_CTS ? TIOCM_CTS : 0; msr 334 drivers/tty/serial/pnx8xxx_uart.c mctrl |= msr & PNX8XXX_UART_MCR_DCD ? TIOCM_CAR : 0; msr 343 drivers/tty/serial/pnx8xxx_uart.c unsigned int msr; msr 787 drivers/tty/serial/serial-tegra.c unsigned long msr; msr 789 drivers/tty/serial/serial-tegra.c msr = tegra_uart_read(tup, UART_MSR); msr 790 drivers/tty/serial/serial-tegra.c if (!(msr & UART_MSR_ANY_DELTA)) msr 793 drivers/tty/serial/serial-tegra.c if (msr & UART_MSR_TERI) msr 795 drivers/tty/serial/serial-tegra.c if (msr & UART_MSR_DDSR) msr 798 drivers/tty/serial/serial-tegra.c if (msr & UART_MSR_DDCD) msr 799 drivers/tty/serial/serial-tegra.c uart_handle_dcd_change(&tup->uport, msr & UART_MSR_DCD); msr 801 drivers/tty/serial/serial-tegra.c if (msr & UART_MSR_DCTS) msr 802 drivers/tty/serial/serial-tegra.c uart_handle_cts_change(&tup->uport, msr & UART_MSR_CTS); msr 922 drivers/tty/serial/serial-tegra.c unsigned long msr; msr 930 drivers/tty/serial/serial-tegra.c msr = tegra_uart_read(tup, UART_MSR); msr 932 drivers/tty/serial/serial-tegra.c if ((mcr & TEGRA_UART_MCR_CTS_EN) && (msr & UART_MSR_CTS)) msr 942 drivers/tty/serial/serial-tegra.c msr = tegra_uart_read(tup, UART_MSR); msr 945 drivers/tty/serial/serial-tegra.c (msr & UART_MSR_CTS)) msr 210 drivers/tty/serial/vr41xx_siu.c uint8_t msr; msr 213 drivers/tty/serial/vr41xx_siu.c msr = siu_read(port, UART_MSR); msr 214 drivers/tty/serial/vr41xx_siu.c if (msr & UART_MSR_DCD) msr 216 drivers/tty/serial/vr41xx_siu.c if (msr & UART_MSR_RI) msr 218 drivers/tty/serial/vr41xx_siu.c if (msr & UART_MSR_DSR) msr 220 drivers/tty/serial/vr41xx_siu.c if (msr & UART_MSR_CTS) msr 360 drivers/tty/serial/vr41xx_siu.c uint8_t msr; msr 362 drivers/tty/serial/vr41xx_siu.c msr = siu_read(port, UART_MSR); msr 363 drivers/tty/serial/vr41xx_siu.c if ((msr & UART_MSR_ANY_DELTA) == 0) msr 365 drivers/tty/serial/vr41xx_siu.c if (msr & UART_MSR_DDCD) msr 366 drivers/tty/serial/vr41xx_siu.c uart_handle_dcd_change(port, msr & UART_MSR_DCD); msr 367 drivers/tty/serial/vr41xx_siu.c if (msr & UART_MSR_TERI) msr 369 drivers/tty/serial/vr41xx_siu.c if (msr & UART_MSR_DDSR) msr 371 drivers/tty/serial/vr41xx_siu.c if (msr & UART_MSR_DCTS) msr 372 drivers/tty/serial/vr41xx_siu.c uart_handle_cts_change(port, msr & UART_MSR_CTS); msr 728 drivers/tty/serial/vr41xx_siu.c uint8_t lsr, msr; msr 743 drivers/tty/serial/vr41xx_siu.c msr = siu_read(port, UART_MSR); msr 744 drivers/tty/serial/vr41xx_siu.c if ((msr & UART_MSR_CTS) != 0) msr 73 drivers/usb/serial/ark3116.c __u32 msr; /* modem status register value */ msr 353 drivers/usb/serial/ark3116.c priv->msr = *buf; msr 415 drivers/usb/serial/ark3116.c status = priv->msr; msr 482 drivers/usb/serial/ark3116.c static void ark3116_update_msr(struct usb_serial_port *port, __u8 msr) msr 488 drivers/usb/serial/ark3116.c priv->msr = msr; msr 491 drivers/usb/serial/ark3116.c if (msr & UART_MSR_ANY_DELTA) { msr 493 drivers/usb/serial/ark3116.c if (msr & UART_MSR_DCTS) msr 495 drivers/usb/serial/ark3116.c if (msr & UART_MSR_DDSR) msr 497 drivers/usb/serial/ark3116.c if (msr & UART_MSR_DDCD) msr 499 drivers/usb/serial/ark3116.c if (msr & UART_MSR_TERI) msr 94 drivers/usb/serial/ch341.c u8 msr; msr 210 drivers/usb/serial/ch341.c priv->msr = (~(*buffer)) & CH341_BITS_MODEM_STAT; msr 342 drivers/usb/serial/ch341.c if (priv->msr & CH341_BIT_DCD) msr 553 drivers/usb/serial/ch341.c delta = status ^ priv->msr; msr 554 drivers/usb/serial/ch341.c priv->msr = status; msr 627 drivers/usb/serial/ch341.c status = priv->msr; msr 606 drivers/usb/serial/f81232.c u8 mcr, msr; msr 613 drivers/usb/serial/f81232.c msr = port_priv->modem_status; msr 618 drivers/usb/serial/f81232.c (msr & UART_MSR_CTS ? TIOCM_CTS : 0) | msr 619 drivers/usb/serial/f81232.c (msr & UART_MSR_DCD ? TIOCM_CAR : 0) | msr 620 drivers/usb/serial/f81232.c (msr & UART_MSR_RI ? TIOCM_RI : 0) | msr 621 drivers/usb/serial/f81232.c (msr & UART_MSR_DSR ? TIOCM_DSR : 0); msr 683 drivers/usb/serial/f81232.c u8 msr; msr 687 drivers/usb/serial/f81232.c msr = priv->modem_status; msr 690 drivers/usb/serial/f81232.c if (msr & UART_MSR_DCD) msr 764 drivers/usb/serial/f81534.c u8 msr; msr 771 drivers/usb/serial/f81534.c F81534_MODEM_STATUS_REG, &msr); msr 775 drivers/usb/serial/f81534.c if ((msr & msr_mask) != msr_mask) msr 1014 drivers/usb/serial/f81534.c static void f81534_msr_changed(struct usb_serial_port *port, u8 msr) msr 1021 drivers/usb/serial/f81534.c if (!(msr & UART_MSR_ANY_DELTA)) msr 1026 drivers/usb/serial/f81534.c port_priv->shadow_msr = msr; msr 1030 drivers/usb/serial/f81534.c msr); msr 1033 drivers/usb/serial/f81534.c if (msr & UART_MSR_DCTS) msr 1035 drivers/usb/serial/f81534.c if (msr & UART_MSR_DDSR) msr 1037 drivers/usb/serial/f81534.c if (msr & UART_MSR_DDCD) msr 1039 drivers/usb/serial/f81534.c if (msr & UART_MSR_TERI) msr 1044 drivers/usb/serial/f81534.c if (!(msr & UART_MSR_DDCD)) msr 1048 drivers/usb/serial/f81534.c __func__, port_priv->phy_num, old_msr, msr); msr 1054 drivers/usb/serial/f81534.c usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD); msr 1063 drivers/usb/serial/f81534.c u8 msr; msr 1066 drivers/usb/serial/f81534.c status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr); msr 1072 drivers/usb/serial/f81534.c port_priv->shadow_msr = msr; msr 1449 drivers/usb/serial/f81534.c u8 msr; msr 1453 drivers/usb/serial/f81534.c status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr); msr 1463 drivers/usb/serial/f81534.c (msr & UART_MSR_CTS ? TIOCM_CTS : 0) | msr 1464 drivers/usb/serial/f81534.c (msr & UART_MSR_DCD ? TIOCM_CAR : 0) | msr 1465 drivers/usb/serial/f81534.c (msr & UART_MSR_RI ? TIOCM_RI : 0) | msr 1466 drivers/usb/serial/f81534.c (msr & UART_MSR_DSR ? TIOCM_DSR : 0); msr 1625 drivers/usb/serial/io_edgeport.c unsigned int msr; msr 1628 drivers/usb/serial/io_edgeport.c msr = edge_port->shadowMSR; msr 1632 drivers/usb/serial/io_edgeport.c | ((msr & EDGEPORT_MSR_CTS) ? TIOCM_CTS: 0) /* 0x020 */ msr 1633 drivers/usb/serial/io_edgeport.c | ((msr & EDGEPORT_MSR_CD) ? TIOCM_CAR: 0) /* 0x040 */ msr 1634 drivers/usb/serial/io_edgeport.c | ((msr & EDGEPORT_MSR_RI) ? TIOCM_RI: 0) /* 0x080 */ msr 1635 drivers/usb/serial/io_edgeport.c | ((msr & EDGEPORT_MSR_DSR) ? TIOCM_DSR: 0); /* 0x100 */ msr 1555 drivers/usb/serial/io_ti.c static void handle_new_msr(struct edgeport_port *edge_port, __u8 msr) msr 1560 drivers/usb/serial/io_ti.c dev_dbg(&edge_port->port->dev, "%s - %02x\n", __func__, msr); msr 1562 drivers/usb/serial/io_ti.c if (msr & (EDGEPORT_MSR_DELTA_CTS | EDGEPORT_MSR_DELTA_DSR | msr 1567 drivers/usb/serial/io_ti.c if (msr & EDGEPORT_MSR_DELTA_CTS) msr 1569 drivers/usb/serial/io_ti.c if (msr & EDGEPORT_MSR_DELTA_DSR) msr 1571 drivers/usb/serial/io_ti.c if (msr & EDGEPORT_MSR_DELTA_CD) msr 1573 drivers/usb/serial/io_ti.c if (msr & EDGEPORT_MSR_DELTA_RI) msr 1579 drivers/usb/serial/io_ti.c edge_port->shadow_msr = msr & 0xf0; msr 1584 drivers/usb/serial/io_ti.c if (msr & EDGEPORT_MSR_CTS) msr 1636 drivers/usb/serial/io_ti.c __u8 msr; msr 1705 drivers/usb/serial/io_ti.c msr = data[1]; msr 1707 drivers/usb/serial/io_ti.c __func__, port_number, msr); msr 1708 drivers/usb/serial/io_ti.c handle_new_msr(edge_port, msr); msr 2418 drivers/usb/serial/io_ti.c unsigned int msr; msr 2424 drivers/usb/serial/io_ti.c msr = edge_port->shadow_msr; msr 2428 drivers/usb/serial/io_ti.c | ((msr & EDGEPORT_MSR_CTS) ? TIOCM_CTS: 0) /* 0x020 */ msr 2429 drivers/usb/serial/io_ti.c | ((msr & EDGEPORT_MSR_CD) ? TIOCM_CAR: 0) /* 0x040 */ msr 2430 drivers/usb/serial/io_ti.c | ((msr & EDGEPORT_MSR_RI) ? TIOCM_RI: 0) /* 0x080 */ msr 2431 drivers/usb/serial/io_ti.c | ((msr & EDGEPORT_MSR_DSR) ? TIOCM_DSR: 0); /* 0x100 */ msr 156 drivers/usb/serial/keyspan_usa90msg.h u8 msr, // reports the actual MSR register msr 306 drivers/usb/serial/mct_u232.c unsigned char *msr) msr 313 drivers/usb/serial/mct_u232.c *msr = 0; msr 327 drivers/usb/serial/mct_u232.c *msr = 0; msr 329 drivers/usb/serial/mct_u232.c *msr = buf[0]; msr 331 drivers/usb/serial/mct_u232.c dev_dbg(&port->dev, "get_modem_stat: 0x%x\n", *msr); msr 337 drivers/usb/serial/mct_u232.c unsigned char msr) msr 340 drivers/usb/serial/mct_u232.c if (msr & MCT_U232_MSR_DDSR) msr 342 drivers/usb/serial/mct_u232.c if (msr & MCT_U232_MSR_DCTS) msr 344 drivers/usb/serial/mct_u232.c if (msr & MCT_U232_MSR_DRI) msr 346 drivers/usb/serial/mct_u232.c if (msr & MCT_U232_MSR_DCD) msr 351 drivers/usb/serial/mct_u232.c unsigned int *control_state, unsigned char msr) msr 354 drivers/usb/serial/mct_u232.c if (msr & MCT_U232_MSR_DSR) msr 358 drivers/usb/serial/mct_u232.c if (msr & MCT_U232_MSR_CTS) msr 362 drivers/usb/serial/mct_u232.c if (msr & MCT_U232_MSR_RI) msr 366 drivers/usb/serial/mct_u232.c if (msr & MCT_U232_MSR_CD) msr 370 drivers/usb/serial/mct_u232.c dev_dbg(&port->dev, "msr_to_state: msr=0x%x ==> state=0x%x\n", msr, *control_state); msr 1744 drivers/usb/serial/mos7720.c unsigned int msr ; msr 1747 drivers/usb/serial/mos7720.c msr = mos7720_port->shadowMSR; msr 1751 drivers/usb/serial/mos7720.c | ((msr & UART_MSR_CTS) ? TIOCM_CTS : 0) /* 0x020 */ msr 1752 drivers/usb/serial/mos7720.c | ((msr & UART_MSR_DCD) ? TIOCM_CAR : 0) /* 0x040 */ msr 1753 drivers/usb/serial/mos7720.c | ((msr & UART_MSR_RI) ? TIOCM_RI : 0) /* 0x080 */ msr 1754 drivers/usb/serial/mos7720.c | ((msr & UART_MSR_DSR) ? TIOCM_DSR : 0); /* 0x100 */ msr 1470 drivers/usb/serial/mos7840.c __u16 msr; msr 1478 drivers/usb/serial/mos7840.c status = mos7840_get_uart_reg(port, MODEM_STATUS_REGISTER, &msr); msr 1487 drivers/usb/serial/mos7840.c | ((msr & MOS7840_MSR_CTS) ? TIOCM_CTS : 0) msr 1488 drivers/usb/serial/mos7840.c | ((msr & MOS7840_MSR_CD) ? TIOCM_CAR : 0) msr 1489 drivers/usb/serial/mos7840.c | ((msr & MOS7840_MSR_RI) ? TIOCM_RI : 0) msr 1490 drivers/usb/serial/mos7840.c | ((msr & MOS7840_MSR_DSR) ? TIOCM_DSR : 0); msr 743 drivers/usb/serial/mxuport.c unsigned int msr; msr 751 drivers/usb/serial/mxuport.c msr = mxport->msr_state; msr 759 drivers/usb/serial/mxuport.c ((msr & UART_MSR_CTS) ? TIOCM_CTS : 0) | /* 0x020 */ msr 760 drivers/usb/serial/mxuport.c ((msr & UART_MSR_DCD) ? TIOCM_CAR : 0) | /* 0x040 */ msr 761 drivers/usb/serial/mxuport.c ((msr & UART_MSR_RI) ? TIOCM_RI : 0) | /* 0x080 */ msr 762 drivers/usb/serial/mxuport.c ((msr & UART_MSR_DSR) ? TIOCM_DSR : 0)); /* 0x100 */ msr 254 drivers/usb/serial/spcp8x5.c u8 msr; msr 257 drivers/usb/serial/spcp8x5.c ret = spcp8x5_get_msr(port, &msr); msr 258 drivers/usb/serial/spcp8x5.c if (ret || msr & MSR_STATUS_LINE_DCD) msr 435 drivers/usb/serial/ssu100.c static void ssu100_update_msr(struct usb_serial_port *port, u8 msr) msr 441 drivers/usb/serial/ssu100.c priv->shadowMSR = msr; msr 444 drivers/usb/serial/ssu100.c if (msr & UART_MSR_ANY_DELTA) { msr 446 drivers/usb/serial/ssu100.c if (msr & UART_MSR_DCTS) msr 448 drivers/usb/serial/ssu100.c if (msr & UART_MSR_DDSR) msr 450 drivers/usb/serial/ssu100.c if (msr & UART_MSR_DDCD) msr 452 drivers/usb/serial/ssu100.c if (msr & UART_MSR_TERI) msr 335 drivers/usb/serial/ti_usb_3410_5052.c static void ti_handle_new_msr(struct ti_port *tport, u8 msr); msr 1029 drivers/usb/serial/ti_usb_3410_5052.c unsigned int msr; msr 1034 drivers/usb/serial/ti_usb_3410_5052.c msr = tport->tp_msr; msr 1041 drivers/usb/serial/ti_usb_3410_5052.c | ((msr & TI_MSR_CTS) ? TIOCM_CTS : 0) msr 1042 drivers/usb/serial/ti_usb_3410_5052.c | ((msr & TI_MSR_CD) ? TIOCM_CAR : 0) msr 1043 drivers/usb/serial/ti_usb_3410_5052.c | ((msr & TI_MSR_RI) ? TIOCM_RI : 0) msr 1044 drivers/usb/serial/ti_usb_3410_5052.c | ((msr & TI_MSR_DSR) ? TIOCM_DSR : 0); msr 1121 drivers/usb/serial/ti_usb_3410_5052.c u8 msr; msr 1171 drivers/usb/serial/ti_usb_3410_5052.c msr = data[1]; msr 1172 drivers/usb/serial/ti_usb_3410_5052.c dev_dbg(dev, "%s - port %d, msr 0x%02X\n", __func__, port_number, msr); msr 1173 drivers/usb/serial/ti_usb_3410_5052.c ti_handle_new_msr(tport, msr); msr 1436 drivers/usb/serial/ti_usb_3410_5052.c static void ti_handle_new_msr(struct ti_port *tport, u8 msr) msr 1442 drivers/usb/serial/ti_usb_3410_5052.c dev_dbg(&tport->tp_port->dev, "%s - msr 0x%02X\n", __func__, msr); msr 1444 drivers/usb/serial/ti_usb_3410_5052.c if (msr & TI_MSR_DELTA_MASK) { msr 1447 drivers/usb/serial/ti_usb_3410_5052.c if (msr & TI_MSR_DELTA_CTS) msr 1449 drivers/usb/serial/ti_usb_3410_5052.c if (msr & TI_MSR_DELTA_DSR) msr 1451 drivers/usb/serial/ti_usb_3410_5052.c if (msr & TI_MSR_DELTA_CD) msr 1453 drivers/usb/serial/ti_usb_3410_5052.c if (msr & TI_MSR_DELTA_RI) msr 1459 drivers/usb/serial/ti_usb_3410_5052.c tport->tp_msr = msr & TI_MSR_MASK; msr 1464 drivers/usb/serial/ti_usb_3410_5052.c if (msr & TI_MSR_CTS) msr 105 drivers/video/fbdev/cg14.c u8 msr; /* Master Status Reg */ msr 31 drivers/video/fbdev/geode/gxfb.h } msr; msr 41 drivers/video/fbdev/geode/lxfb.h } msr; msr 596 drivers/video/fbdev/geode/lxfb_ops.c rdmsrl(MSR_LX_MSR_PADSEL, par->msr.padsel); msr 597 drivers/video/fbdev/geode/lxfb_ops.c rdmsrl(MSR_GLCP_DOTPLL, par->msr.dotpll); msr 598 drivers/video/fbdev/geode/lxfb_ops.c rdmsrl(MSR_LX_GLD_MSR_CONFIG, par->msr.dfglcfg); msr 599 drivers/video/fbdev/geode/lxfb_ops.c rdmsrl(MSR_LX_SPARE_MSR, par->msr.dcspare); msr 669 drivers/video/fbdev/geode/lxfb_ops.c wrmsrl(MSR_LX_SPARE_MSR, par->msr.dcspare); msr 733 drivers/video/fbdev/geode/lxfb_ops.c wrmsrl(MSR_LX_GLD_MSR_CONFIG, par->msr.dfglcfg); msr 734 drivers/video/fbdev/geode/lxfb_ops.c wrmsrl(MSR_LX_MSR_PADSEL, par->msr.padsel); msr 768 drivers/video/fbdev/geode/lxfb_ops.c lx_set_dotpll((u32) (par->msr.dotpll >> 32)); msr 26 drivers/video/fbdev/geode/suspend_gx.c rdmsrl(MSR_GX_MSR_PADSEL, par->msr.padsel); msr 27 drivers/video/fbdev/geode/suspend_gx.c rdmsrl(MSR_GLCP_DOTPLL, par->msr.dotpll); msr 138 drivers/video/fbdev/geode/suspend_gx.c wrmsrl(MSR_GX_MSR_PADSEL, par->msr.padsel); msr 175 drivers/video/fbdev/geode/suspend_gx.c gx_set_dotpll((uint32_t) (par->msr.dotpll >> 32)); msr 221 drivers/video/fbdev/i810/i810.h u8 msr; msr 241 drivers/video/fbdev/i810/i810.h u8 cr39, cr41, cr70, sr01, msr; msr 266 drivers/video/fbdev/i810/i810_dvt.c if (~(std_modes[mode].msr & (1 << 6))) msr 268 drivers/video/fbdev/i810/i810_dvt.c if (~(std_modes[mode].msr & (1 << 7))) msr 129 drivers/video/fbdev/i810/i810_gtf.c u8 msr = 0; msr 191 drivers/video/fbdev/i810/i810_gtf.c msr |= 1 << 6; msr 193 drivers/video/fbdev/i810/i810_gtf.c msr |= 1 << 7; msr 194 drivers/video/fbdev/i810/i810_gtf.c par->regs.msr = msr; msr 245 drivers/video/fbdev/i810/i810_main.c i810_writeb(MSR_WRITE, mmio, par->regs.msr | 0xC8 | 1); msr 519 drivers/video/fbdev/i810/i810_main.c i810_writeb(MSR_WRITE, mmio, par->hw_state.msr); msr 625 drivers/video/fbdev/i810/i810_main.c par->hw_state.msr = i810_readb(MSR_READ, mmio); msr 148 include/uapi/linux/isst_if.h __u64 msr; msr 194 include/uapi/linux/kvm.h __u32 msr; msr 1078 include/uapi/linux/kvm.h __u32 msr; msr 237 ipc/msg.c struct msg_receiver *msr, *t; msr 239 ipc/msg.c list_for_each_entry_safe(msr, t, &msq->q_receivers, r_list) { msr 240 ipc/msg.c wake_q_add(wake_q, msr->r_tsk); msr 241 ipc/msg.c WRITE_ONCE(msr->r_msg, ERR_PTR(res)); msr 792 ipc/msg.c struct msg_receiver *msr, *t; msr 794 ipc/msg.c list_for_each_entry_safe(msr, t, &msq->q_receivers, r_list) { msr 795 ipc/msg.c if (testmsg(msg, msr->r_msgtype, msr->r_mode) && msr 796 ipc/msg.c !security_msg_queue_msgrcv(&msq->q_perm, msg, msr->r_tsk, msr 797 ipc/msg.c msr->r_msgtype, msr->r_mode)) { msr 799 ipc/msg.c list_del(&msr->r_list); msr 800 ipc/msg.c if (msr->r_maxsize < msg->m_ts) { msr 801 ipc/msg.c wake_q_add(wake_q, msr->r_tsk); msr 802 ipc/msg.c WRITE_ONCE(msr->r_msg, ERR_PTR(-E2BIG)); msr 804 ipc/msg.c ipc_update_pid(&msq->q_lrpid, task_pid(msr->r_tsk)); msr 807 ipc/msg.c wake_q_add(wake_q, msr->r_tsk); msr 808 ipc/msg.c WRITE_ONCE(msr->r_msg, msg); msr 336 net/mac80211/rc80211_minstrel.c struct minstrel_rate *msr, *mr; msr 393 net/mac80211/rc80211_minstrel.c msr = &mi->r[ndx]; msr 401 net/mac80211/rc80211_minstrel.c msr->perfect_tx_time > mr->perfect_tx_time && msr 402 net/mac80211/rc80211_minstrel.c msr->stats.sample_skipped < 20) { msr 413 net/mac80211/rc80211_minstrel.c if (!msr->sample_limit) msr 417 net/mac80211/rc80211_minstrel.c if (msr->sample_limit > 0) msr 418 net/mac80211/rc80211_minstrel.c msr->sample_limit--; msr 36 samples/kprobes/kprobe_example.c p->symbol_name, p->addr, regs->nip, regs->msr); msr 66 samples/kprobes/kprobe_example.c p->symbol_name, p->addr, regs->msr); msr 129 sound/pci/ctxfi/ctamixer.c for (i = 0; i < amixer->rsc.msr; i++) { msr 203 sound/pci/ctxfi/ctamixer.c AMIXER, desc->msr, mgr->mgr.hw); msr 248 sound/pci/ctxfi/ctamixer.c for (i = 0; i < desc->msr; i++) { msr 286 sound/pci/ctxfi/ctamixer.c for (i = 0; i < amixer->rsc.msr; i++) msr 369 sound/pci/ctxfi/ctamixer.c err = rsc_init(&sum->rsc, sum->idx[0], SUM, desc->msr, mgr->mgr.hw); msr 403 sound/pci/ctxfi/ctamixer.c for (i = 0; i < desc->msr; i++) { msr 441 sound/pci/ctxfi/ctamixer.c for (i = 0; i < sum->rsc.msr; i++) msr 30 sound/pci/ctxfi/ctamixer.h unsigned int msr; msr 75 sound/pci/ctxfi/ctamixer.h unsigned int msr; msr 258 sound/pci/ctxfi/ctatc.c desc.msr = atc->msr; msr 265 sound/pci/ctxfi/ctatc.c (atc->rsr * atc->msr)); msr 280 sound/pci/ctxfi/ctatc.c mix_dsc.msr = atc->msr; msr 384 sound/pci/ctxfi/ctatc.c max_cisz = src->multi * src->rsc.msr; msr 445 sound/pci/ctxfi/ctatc.c max_cisz = src->multi * src->rsc.msr; msr 453 sound/pci/ctxfi/ctatc.c unsigned int msr:8; msr 465 sound/pci/ctxfi/ctatc.c pitch = atc_get_pitch((atc->rsr * atc->msr), msr 469 sound/pci/ctxfi/ctatc.c if (1 == atc->msr) { /* FIXME: do we really need SRC here if pitch==1 */ msr 472 sound/pci/ctxfi/ctatc.c conf[0].mix_msr = conf[0].imp_msr = conf[0].msr = 1; msr 474 sound/pci/ctxfi/ctatc.c } else if (2 <= atc->msr) { msr 478 sound/pci/ctxfi/ctatc.c conf[0].pitch = (atc->msr << 24); msr 479 sound/pci/ctxfi/ctatc.c conf[0].msr = conf[0].mix_msr = 1; msr 480 sound/pci/ctxfi/ctatc.c conf[0].imp_msr = atc->msr; msr 484 sound/pci/ctxfi/ctatc.c conf[1].msr = conf[1].mix_msr = conf[1].imp_msr = 1; msr 491 sound/pci/ctxfi/ctatc.c conf[0].msr = conf[0].mix_msr msr 492 sound/pci/ctxfi/ctatc.c = conf[0].imp_msr = atc->msr; msr 526 sound/pci/ctxfi/ctatc.c pitch = atc_get_pitch((atc->rsr * atc->msr), msr 536 sound/pci/ctxfi/ctatc.c n_amixer += multi * atc->msr; msr 537 sound/pci/ctxfi/ctatc.c n_srcimp += multi * atc->msr; msr 564 sound/pci/ctxfi/ctatc.c src_dsc.msr = src_node_conf[i/multi].msr; msr 582 sound/pci/ctxfi/ctatc.c mix_dsc.msr = atc->msr; msr 584 sound/pci/ctxfi/ctatc.c mix_dsc.msr = src_node_conf[(i-n_sum*2)/multi].mix_msr; msr 586 sound/pci/ctxfi/ctatc.c mix_dsc.msr = 1; msr 597 sound/pci/ctxfi/ctatc.c sum_dsc.msr = atc->msr; msr 602 sound/pci/ctxfi/ctatc.c pitch = atc_get_pitch((atc->rsr * atc->msr), msr 607 sound/pci/ctxfi/ctatc.c srcimp_dsc.msr = src_node_conf[i/multi].imp_msr; msr 609 sound/pci/ctxfi/ctatc.c srcimp_dsc.msr = (pitch <= 0x8000000) ? atc->msr : 1; msr 611 sound/pci/ctxfi/ctatc.c srcimp_dsc.msr = 1; msr 623 sound/pci/ctxfi/ctatc.c src_dsc.msr = 1; msr 689 sound/pci/ctxfi/ctatc.c pitch = atc_get_pitch((atc->rsr * atc->msr), msr 697 sound/pci/ctxfi/ctatc.c for (j = 0; j < atc->msr; j++) { msr 799 sound/pci/ctxfi/ctatc.c desc.msr = 1; msr 800 sound/pci/ctxfi/ctatc.c while (apcm->substream->runtime->rate > (rsr * desc.msr)) msr 801 sound/pci/ctxfi/ctatc.c desc.msr <<= 1; msr 808 sound/pci/ctxfi/ctatc.c pitch = atc_get_pitch(apcm->substream->runtime->rate, (rsr * desc.msr)); msr 824 sound/pci/ctxfi/ctatc.c mix_dsc.msr = desc.msr; msr 1121 sound/pci/ctxfi/ctatc.c da_dsc.msr = state ? 1 : atc->msr; msr 1342 sound/pci/ctxfi/ctatc.c info.msr = atc->msr; msr 1395 sound/pci/ctxfi/ctatc.c da_desc.msr = atc->msr; msr 1412 sound/pci/ctxfi/ctatc.c src_dsc.msr = atc->msr; msr 1424 sound/pci/ctxfi/ctatc.c srcimp_dsc.msr = 8; msr 1435 sound/pci/ctxfi/ctatc.c sum_dsc.msr = atc->msr; msr 1566 sound/pci/ctxfi/ctatc.c info.msr = atc->msr; msr 1667 sound/pci/ctxfi/ctatc.c unsigned int rsr, unsigned int msr, msr 1689 sound/pci/ctxfi/ctatc.c atc->msr = msr; msr 77 sound/pci/ctxfi/ctatc.h unsigned int msr; /* master sample rate in rsr */ msr 152 sound/pci/ctxfi/ctatc.h unsigned int rsr, unsigned int msr, int chip_type, msr 162 sound/pci/ctxfi/ctdaio.c entry = kzalloc((sizeof(*entry) * daio->rscl.msr), GFP_KERNEL); msr 170 sound/pci/ctxfi/ctdaio.c for (i = 0; i < daio->rscl.msr; i++, entry++) { msr 191 sound/pci/ctxfi/ctdaio.c entry = kzalloc((sizeof(*entry) * daio->rscr.msr), GFP_KERNEL); msr 199 sound/pci/ctxfi/ctdaio.c for (i = 0; i < daio->rscr.msr; i++, entry++) { msr 203 sound/pci/ctxfi/ctdaio.c dao->imappers[daio->rscl.msr + i] = entry; msr 226 sound/pci/ctxfi/ctdaio.c for (i = 1; i < daio->rscl.msr; i++) { msr 244 sound/pci/ctxfi/ctdaio.c if (!dao->imappers[daio->rscl.msr]) msr 247 sound/pci/ctxfi/ctdaio.c entry = dao->imappers[daio->rscl.msr]; msr 250 sound/pci/ctxfi/ctdaio.c for (i = 1; i < daio->rscr.msr; i++) { msr 251 sound/pci/ctxfi/ctdaio.c entry = dao->imappers[daio->rscl.msr + i]; msr 253 sound/pci/ctxfi/ctdaio.c dao->imappers[daio->rscl.msr + i] = NULL; msr 256 sound/pci/ctxfi/ctdaio.c kfree(dao->imappers[daio->rscl.msr]); msr 257 sound/pci/ctxfi/ctdaio.c dao->imappers[daio->rscl.msr] = NULL; msr 287 sound/pci/ctxfi/ctdaio.c static int dai_set_srt_msr(struct dai *dai, unsigned int msr) msr 291 sound/pci/ctxfi/ctdaio.c for (rsr = 0; msr > 1; msr >>= 1) msr 345 sound/pci/ctxfi/ctdaio.c err = rsc_init(&daio->rscl, idx_l, DAIO, desc->msr, hw); msr 349 sound/pci/ctxfi/ctdaio.c err = rsc_init(&daio->rscr, idx_r, DAIO, desc->msr, hw); msr 397 sound/pci/ctxfi/ctdaio.c dao->imappers = kzalloc(array3_size(sizeof(void *), desc->msr, 2), msr 414 sound/pci/ctxfi/ctdaio.c conf = (desc->msr & 0x7) | (desc->passthru << 3); msr 437 sound/pci/ctxfi/ctdaio.c if (dao->imappers[dao->daio.rscl.msr]) msr 456 sound/pci/ctxfi/ctdaio.c dsc.msr = desc->msr; msr 468 sound/pci/ctxfi/ctdaio.c unsigned int rsr, msr; msr 480 sound/pci/ctxfi/ctdaio.c for (rsr = 0, msr = desc->msr; msr > 1; msr >>= 1) msr 65 sound/pci/ctxfi/ctdaio.h unsigned int msr:4; msr 83 sound/pci/ctxfi/ctdaio.h int (*set_srt_msr)(struct dai *dai, unsigned int msr); msr 92 sound/pci/ctxfi/ctdaio.h unsigned int msr:4; msr 58 sound/pci/ctxfi/cthardware.h unsigned int msr; /* master sample rate in rsrs */ msr 1186 sound/pci/ctxfi/cthw20k1.c unsigned int msr; /* master sample rate in rsrs */ msr 1190 sound/pci/ctxfi/cthw20k1.c unsigned int msr; /* master sample rate in rsrs */ msr 1196 sound/pci/ctxfi/cthw20k1.c unsigned int msr; /* master sample rate in rsrs */ msr 1221 sound/pci/ctxfi/cthw20k1.c switch (info->msr) { msr 1452 sound/pci/ctxfi/cthw20k1.c switch (info->msr) { msr 2052 sound/pci/ctxfi/cthw20k1.c daio_info.msr = info->msr; msr 2057 sound/pci/ctxfi/cthw20k1.c dac_info.msr = info->msr; msr 2062 sound/pci/ctxfi/cthw20k1.c adc_info.msr = info->msr; msr 1129 sound/pci/ctxfi/cthw20k2.c unsigned int msr; /* master sample rate in rsrs */ msr 1133 sound/pci/ctxfi/cthw20k2.c unsigned int msr; /* master sample rate in rsrs */ msr 1139 sound/pci/ctxfi/cthw20k2.c unsigned int msr; /* master sample rate in rsrs */ msr 1153 sound/pci/ctxfi/cthw20k2.c if (1 == info->msr) { msr 1157 sound/pci/ctxfi/cthw20k2.c } else if (2 == info->msr) { msr 1175 sound/pci/ctxfi/cthw20k2.c } else if ((4 == info->msr) && (hw->model == CTSB1270)) { msr 1217 sound/pci/ctxfi/cthw20k2.c if (2 == info->msr) { msr 1220 sound/pci/ctxfi/cthw20k2.c } else if (4 == info->msr) { msr 1631 sound/pci/ctxfi/cthw20k2.c if (1 == info->msr) msr 1633 sound/pci/ctxfi/cthw20k2.c else if (2 == info->msr) msr 1721 sound/pci/ctxfi/cthw20k2.c if (1 == info->msr) { msr 1726 sound/pci/ctxfi/cthw20k2.c } else if (2 == info->msr) { msr 1854 sound/pci/ctxfi/cthw20k2.c if (1 == info->msr) msr 1856 sound/pci/ctxfi/cthw20k2.c else if (2 == info->msr) msr 1876 sound/pci/ctxfi/cthw20k2.c if (1 == info->msr) { msr 1880 sound/pci/ctxfi/cthw20k2.c } else if ((2 == info->msr) || (4 == info->msr)) { msr 1887 sound/pci/ctxfi/cthw20k2.c info->msr); msr 2171 sound/pci/ctxfi/cthw20k2.c daio_info.msr = info->msr; msr 2176 sound/pci/ctxfi/cthw20k2.c dac_info.msr = info->msr; msr 2181 sound/pci/ctxfi/cthw20k2.c adc_info.msr = info->msr; msr 849 sound/pci/ctxfi/ctmixer.c sum_desc.msr = mixer->atc->msr; msr 864 sound/pci/ctxfi/ctmixer.c am_desc.msr = mixer->atc->msr; msr 282 sound/pci/ctxfi/ctpcm.c runtime->hw.rate_max = atc->rsr * atc->msr; msr 115 sound/pci/ctxfi/ctresource.c for (i = 0; (i < 8) && (!(rsc->msr & (0x1 << i))); ) msr 134 sound/pci/ctxfi/ctresource.c rsc_init(struct rsc *rsc, u32 idx, enum RSCTYP type, u32 msr, struct hw *hw) msr 141 sound/pci/ctxfi/ctresource.c rsc->msr = msr; msr 200 sound/pci/ctxfi/ctresource.c rsc->msr = 0; msr 35 sound/pci/ctxfi/ctresource.h u32 msr:4; /* The Master Sample Rate a resource working on */ msr 50 sound/pci/ctxfi/ctresource.h rsc_init(struct rsc *rsc, u32 idx, enum RSCTYP type, u32 msr, struct hw *hw); msr 182 sound/pci/ctxfi/ctsrc.c if (src->rsc.msr > 1) { msr 193 sound/pci/ctxfi/ctsrc.c for (i = 1; i < src->rsc.msr; i++) { msr 228 sound/pci/ctxfi/ctsrc.c unsigned int rsr, msr; msr 232 sound/pci/ctxfi/ctsrc.c for (rsr = 0, msr = src->rsc.msr; msr > 1; msr >>= 1) msr 254 sound/pci/ctxfi/ctsrc.c for (msr = 1; msr < src->rsc.msr; msr++) { msr 296 sound/pci/ctxfi/ctsrc.c unsigned int rsr, msr; msr 301 sound/pci/ctxfi/ctsrc.c for (rsr = 0, msr = src->rsc.msr; msr > 1; msr >>= 1) msr 323 sound/pci/ctxfi/ctsrc.c for (msr = 0; msr < src->rsc.msr; msr++) { msr 365 sound/pci/ctxfi/ctsrc.c err = rsc_init(&p->rsc, idx + i, SRC, desc->msr, mgr->mgr.hw); msr 492 sound/pci/ctxfi/ctsrc.c for (i = 0; i < src->rsc.msr; i++) { msr 508 sound/pci/ctxfi/ctsrc.c for (i = 0; i < src->rsc.msr; i++) { msr 524 sound/pci/ctxfi/ctsrc.c for (i = 0; i < src->rsc.msr; i++) { msr 627 sound/pci/ctxfi/ctsrc.c for (i = 0; i < srcimp->rsc.msr; i++) { msr 650 sound/pci/ctxfi/ctsrc.c for (i = 0; i < srcimp->rsc.msr; i++) { msr 673 sound/pci/ctxfi/ctsrc.c SRCIMP, desc->msr, mgr->mgr.hw); msr 678 sound/pci/ctxfi/ctsrc.c srcimp->imappers = kcalloc(desc->msr, sizeof(struct imapper), msr 729 sound/pci/ctxfi/ctsrc.c for (i = 0; i < desc->msr; i++) { msr 767 sound/pci/ctxfi/ctsrc.c for (i = 0; i < srcimp->rsc.msr; i++) msr 78 sound/pci/ctxfi/ctsrc.h unsigned char msr; msr 119 sound/pci/ctxfi/ctsrc.h unsigned int msr; msr 42 tools/arch/powerpc/include/uapi/asm/kvm.h __u64 msr; msr 194 tools/include/uapi/linux/kvm.h __u32 msr; msr 1078 tools/include/uapi/linux/kvm.h __u32 msr; msr 20 tools/perf/arch/powerpc/include/dwarf-regs-table.h REG_DWARFNUM_NAME(msr, 66), msr 67 tools/perf/arch/powerpc/util/dwarf-regs.c REG_DWARFNUM_NAME(msr, 66), msr 46 tools/perf/arch/powerpc/util/perf_regs.c SMPL_REG(msr, PERF_REG_POWERPC_MSR), msr 541 tools/perf/pmu-events/jevents.c struct msrmap *msr = NULL; msr 584 tools/perf/pmu-events/jevents.c msr = lookup_msr(map, val); msr 648 tools/perf/pmu-events/jevents.c if (msr != NULL) msr 649 tools/perf/pmu-events/jevents.c addfield(map, &event, ",", msr->pname, msrval); msr 98 tools/perf/util/stat.c ID(SMI_NUM, msr/smi/), msr 99 tools/perf/util/stat.c ID(APERF, msr/aperf/), msr 28 tools/power/cpupower/debug/i386/centrino-decode.c static int rdmsr(unsigned int cpu, unsigned int msr, msr 47 tools/power/cpupower/debug/i386/centrino-decode.c if (lseek(fd, msr, SEEK_CUR) == -1) msr 63 tools/power/cpupower/debug/i386/centrino-decode.c static void decode (unsigned int msr) msr 68 tools/power/cpupower/debug/i386/centrino-decode.c multiplier = ((msr >> 8) & 0xFF); msr 70 tools/power/cpupower/debug/i386/centrino-decode.c mv = (((msr & 0xFF) * 16) + 700); msr 72 tools/power/cpupower/debug/i386/centrino-decode.c printf("0x%x means multiplier %d @ %d mV\n", msr, multiplier, mv); msr 30 tools/power/cpupower/debug/i386/powernow-k8-decode.c uint64_t msr = 0; msr 43 tools/power/cpupower/debug/i386/powernow-k8-decode.c if (read(fd, &msr, 8) != 8) msr 46 tools/power/cpupower/debug/i386/powernow-k8-decode.c *fid = ((uint32_t )(msr & 0xffffffffull)) & MSR_S_LO_CURRENT_FID; msr 47 tools/power/cpupower/debug/i386/powernow-k8-decode.c *vid = ((uint32_t )(msr>>32 & 0xffffffffull)) & MSR_S_HI_CURRENT_VID; msr 65 tools/power/cpupower/utils/idle_monitor/hsw_ext_idle.c int msr; msr 69 tools/power/cpupower/utils/idle_monitor/hsw_ext_idle.c msr = MSR_PKG_C8_RESIDENCY; msr 72 tools/power/cpupower/utils/idle_monitor/hsw_ext_idle.c msr = MSR_PKG_C9_RESIDENCY; msr 75 tools/power/cpupower/utils/idle_monitor/hsw_ext_idle.c msr = MSR_PKG_C10_RESIDENCY; msr 78 tools/power/cpupower/utils/idle_monitor/hsw_ext_idle.c msr = MSR_TSC; msr 83 tools/power/cpupower/utils/idle_monitor/hsw_ext_idle.c if (read_msr(cpu, msr, val)) msr 74 tools/power/cpupower/utils/idle_monitor/nhm_idle.c int msr; msr 78 tools/power/cpupower/utils/idle_monitor/nhm_idle.c msr = MSR_CORE_C3_RESIDENCY; msr 81 tools/power/cpupower/utils/idle_monitor/nhm_idle.c msr = MSR_CORE_C6_RESIDENCY; msr 84 tools/power/cpupower/utils/idle_monitor/nhm_idle.c msr = MSR_PKG_C3_RESIDENCY; msr 87 tools/power/cpupower/utils/idle_monitor/nhm_idle.c msr = MSR_PKG_C6_RESIDENCY; msr 90 tools/power/cpupower/utils/idle_monitor/nhm_idle.c msr = MSR_TSC; msr 95 tools/power/cpupower/utils/idle_monitor/nhm_idle.c if (read_msr(cpu, msr, val)) msr 63 tools/power/cpupower/utils/idle_monitor/snb_idle.c int msr; msr 67 tools/power/cpupower/utils/idle_monitor/snb_idle.c msr = MSR_CORE_C7_RESIDENCY; msr 70 tools/power/cpupower/utils/idle_monitor/snb_idle.c msr = MSR_PKG_C2_RESIDENCY; msr 73 tools/power/cpupower/utils/idle_monitor/snb_idle.c msr = MSR_PKG_C7_RESIDENCY; msr 76 tools/power/cpupower/utils/idle_monitor/snb_idle.c msr = MSR_TSC; msr 81 tools/power/cpupower/utils/idle_monitor/snb_idle.c if (read_msr(cpu, msr, val)) msr 580 tools/power/x86/intel-speed-select/isst-config.c int isst_send_msr_command(unsigned int cpu, unsigned int msr, int write, msr 593 tools/power/x86/intel-speed-select/isst-config.c msr_cmds.msr_cmd[0].msr = msr; msr 601 tools/power/x86/intel-speed-select/isst-config.c cpu, msr, write); msr 608 tools/power/x86/intel-speed-select/isst-config.c cpu, msr, write, *req_resp, msr_cmds.msr_cmd[0].data); msr 384 tools/power/x86/turbostat/turbostat.c int get_msr(int cpu, off_t offset, unsigned long long *msr) msr 388 tools/power/x86/turbostat/turbostat.c retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset); msr 390 tools/power/x86/turbostat/turbostat.c if (retval != sizeof *msr) msr 1781 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 1858 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_SMI_COUNT, &msr)) msr 1860 tools/power/x86/turbostat/turbostat.c t->smi_count = msr & 0xFFFFFFFF; msr 1898 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr)) msr 1900 tools/power/x86/turbostat/turbostat.c c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F); msr 1904 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr)) msr 1906 tools/power/x86/turbostat/turbostat.c c->core_energy = msr & 0xFFFFFFFF; msr 1969 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr)) msr 1971 tools/power/x86/turbostat/turbostat.c p->energy_pkg = msr & 0xFFFFFFFF; msr 1974 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr)) msr 1976 tools/power/x86/turbostat/turbostat.c p->energy_cores = msr & 0xFFFFFFFF; msr 1979 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr)) msr 1981 tools/power/x86/turbostat/turbostat.c p->energy_dram = msr & 0xFFFFFFFF; msr 1984 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr)) msr 1986 tools/power/x86/turbostat/turbostat.c p->energy_gfx = msr & 0xFFFFFFFF; msr 1989 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr)) msr 1991 tools/power/x86/turbostat/turbostat.c p->rapl_pkg_perf_status = msr & 0xFFFFFFFF; msr 1994 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr)) msr 1996 tools/power/x86/turbostat/turbostat.c p->rapl_dram_perf_status = msr & 0xFFFFFFFF; msr 1999 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_PKG_ENERGY_STAT, &msr)) msr 2001 tools/power/x86/turbostat/turbostat.c p->energy_pkg = msr & 0xFFFFFFFF; msr 2004 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr)) msr 2006 tools/power/x86/turbostat/turbostat.c p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F); msr 2071 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 2074 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_PLATFORM_INFO, &msr); msr 2076 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr); msr 2078 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 40) & 0xFF; msr 2082 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 8) & 0xFF; msr 2086 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr); msr 2088 tools/power/x86/turbostat/turbostat.c base_cpu, msr, msr & 0x2 ? "EN" : "DIS"); msr 2096 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 2099 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr); msr 2101 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr); msr 2103 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 8) & 0xFF; msr 2108 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 0) & 0xFF; msr 2118 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 2121 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr); msr 2123 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr); msr 2125 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 56) & 0xFF; msr 2130 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 48) & 0xFF; msr 2135 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 40) & 0xFF; msr 2140 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 32) & 0xFF; msr 2145 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 24) & 0xFF; msr 2150 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 16) & 0xFF; msr 2155 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 8) & 0xFF; msr 2160 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 0) & 0xFF; msr 2184 tools/power/x86/turbostat/turbostat.c unsigned long long msr, core_counts; msr 2187 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr); msr 2188 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr); msr 2197 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 56) & 0xFF; msr 2203 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 48) & 0xFF; msr 2209 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 40) & 0xFF; msr 2215 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 32) & 0xFF; msr 2221 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 24) & 0xFF; msr 2227 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 16) & 0xFF; msr 2233 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 8) & 0xFF; msr 2239 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 0) & 0xFF; msr 2250 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 2253 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr); msr 2254 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF); msr 2256 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 0) & 0x3F; msr 2261 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 8) & 0x3F; msr 2266 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 16) & 0x3F; msr 2271 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr); msr 2272 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF); msr 2274 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 24) & 0x3F; msr 2279 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 16) & 0x3F; msr 2284 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 8) & 0x3F; msr 2289 tools/power/x86/turbostat/turbostat.c ratio = (msr >> 0) & 0x3F; msr 2300 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 2306 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr); msr 2309 tools/power/x86/turbostat/turbostat.c base_cpu, msr); msr 2335 tools/power/x86/turbostat/turbostat.c cores[b_nr] = (msr & 0xFF) >> 1; msr 2336 tools/power/x86/turbostat/turbostat.c ratio[b_nr] = (msr >> 8) & 0xFF; msr 2339 tools/power/x86/turbostat/turbostat.c delta_cores = (msr >> i) & 0x1F; msr 2340 tools/power/x86/turbostat/turbostat.c delta_ratio = (msr >> (i + 5)) & 0x7; msr 2357 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 2359 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr); msr 2361 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr); msr 2364 tools/power/x86/turbostat/turbostat.c (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "", msr 2365 tools/power/x86/turbostat/turbostat.c (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "", msr 2366 tools/power/x86/turbostat/turbostat.c (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "", msr 2367 tools/power/x86/turbostat/turbostat.c (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "", msr 2368 tools/power/x86/turbostat/turbostat.c (msr & (1 << 15)) ? "" : "UN", msr 2369 tools/power/x86/turbostat/turbostat.c (unsigned int)msr & 0xF, msr 2375 tools/power/x86/turbostat/turbostat.c (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off"); msr 2386 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 2388 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr); msr 2389 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr); msr 2390 tools/power/x86/turbostat/turbostat.c fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF); msr 2392 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr); msr 2393 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr); msr 2394 tools/power/x86/turbostat/turbostat.c if (msr) { msr 2395 tools/power/x86/turbostat/turbostat.c fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF); msr 2396 tools/power/x86/turbostat/turbostat.c fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF); msr 2397 tools/power/x86/turbostat/turbostat.c fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF); msr 2398 tools/power/x86/turbostat/turbostat.c fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF); msr 2402 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr); msr 2403 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr); msr 2404 tools/power/x86/turbostat/turbostat.c if (msr) { msr 2405 tools/power/x86/turbostat/turbostat.c fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF); msr 2406 tools/power/x86/turbostat/turbostat.c fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF); msr 2407 tools/power/x86/turbostat/turbostat.c fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF); msr 2408 tools/power/x86/turbostat/turbostat.c fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF); msr 2412 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr); msr 2413 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr); msr 2414 tools/power/x86/turbostat/turbostat.c if ((msr) & 0x3) msr 2415 tools/power/x86/turbostat/turbostat.c fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3); msr 2416 tools/power/x86/turbostat/turbostat.c fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1); msr 2419 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr); msr 2420 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr); msr 2421 tools/power/x86/turbostat/turbostat.c fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF); msr 2422 tools/power/x86/turbostat/turbostat.c fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1); msr 2430 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 2432 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_PKGC3_IRTL, &msr); msr 2433 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr); msr 2434 tools/power/x86/turbostat/turbostat.c fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", msr 2435 tools/power/x86/turbostat/turbostat.c (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]); msr 2437 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_PKGC6_IRTL, &msr); msr 2438 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr); msr 2439 tools/power/x86/turbostat/turbostat.c fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", msr 2440 tools/power/x86/turbostat/turbostat.c (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]); msr 2442 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_PKGC7_IRTL, &msr); msr 2443 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr); msr 2444 tools/power/x86/turbostat/turbostat.c fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", msr 2445 tools/power/x86/turbostat/turbostat.c (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]); msr 2450 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_PKGC8_IRTL, &msr); msr 2451 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr); msr 2452 tools/power/x86/turbostat/turbostat.c fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", msr 2453 tools/power/x86/turbostat/turbostat.c (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]); msr 2455 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_PKGC9_IRTL, &msr); msr 2456 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr); msr 2457 tools/power/x86/turbostat/turbostat.c fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", msr 2458 tools/power/x86/turbostat/turbostat.c (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]); msr 2460 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_PKGC10_IRTL, &msr); msr 2461 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr); msr 2462 tools/power/x86/turbostat/turbostat.c fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", msr 2463 tools/power/x86/turbostat/turbostat.c (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]); msr 3226 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 3286 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr); msr 3287 tools/power/x86/turbostat/turbostat.c pkg_cstate_limit = pkg_cstate_limits[msr & 0xF]; msr 3289 tools/power/x86/turbostat/turbostat.c get_msr(base_cpu, MSR_PLATFORM_INFO, &msr); msr 3290 tools/power/x86/turbostat/turbostat.c base_ratio = (msr >> 8) & 0xFF; msr 3596 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 3614 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr)) msr 3617 tools/power/x86/turbostat/turbostat.c switch (msr & 0xF) { msr 3631 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string); msr 3641 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 3658 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_PM_ENABLE, &msr)) msr 3662 tools/power/x86/turbostat/turbostat.c cpu, msr, (msr & (1 << 0)) ? "" : "No-"); msr 3665 tools/power/x86/turbostat/turbostat.c if ((msr & (1 << 0)) == 0) msr 3668 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr)) msr 3673 tools/power/x86/turbostat/turbostat.c cpu, msr, msr 3674 tools/power/x86/turbostat/turbostat.c (unsigned int)HWP_HIGHEST_PERF(msr), msr 3675 tools/power/x86/turbostat/turbostat.c (unsigned int)HWP_GUARANTEED_PERF(msr), msr 3676 tools/power/x86/turbostat/turbostat.c (unsigned int)HWP_MOSTEFFICIENT_PERF(msr), msr 3677 tools/power/x86/turbostat/turbostat.c (unsigned int)HWP_LOWEST_PERF(msr)); msr 3679 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_HWP_REQUEST, &msr)) msr 3684 tools/power/x86/turbostat/turbostat.c cpu, msr, msr 3685 tools/power/x86/turbostat/turbostat.c (unsigned int)(((msr) >> 0) & 0xff), msr 3686 tools/power/x86/turbostat/turbostat.c (unsigned int)(((msr) >> 8) & 0xff), msr 3687 tools/power/x86/turbostat/turbostat.c (unsigned int)(((msr) >> 16) & 0xff), msr 3688 tools/power/x86/turbostat/turbostat.c (unsigned int)(((msr) >> 24) & 0xff), msr 3689 tools/power/x86/turbostat/turbostat.c (unsigned int)(((msr) >> 32) & 0xff3), msr 3690 tools/power/x86/turbostat/turbostat.c (unsigned int)(((msr) >> 42) & 0x1)); msr 3693 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr)) msr 3698 tools/power/x86/turbostat/turbostat.c cpu, msr, msr 3699 tools/power/x86/turbostat/turbostat.c (unsigned int)(((msr) >> 0) & 0xff), msr 3700 tools/power/x86/turbostat/turbostat.c (unsigned int)(((msr) >> 8) & 0xff), msr 3701 tools/power/x86/turbostat/turbostat.c (unsigned int)(((msr) >> 16) & 0xff), msr 3702 tools/power/x86/turbostat/turbostat.c (unsigned int)(((msr) >> 24) & 0xff), msr 3703 tools/power/x86/turbostat/turbostat.c (unsigned int)(((msr) >> 32) & 0xff3)); msr 3706 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr)) msr 3711 tools/power/x86/turbostat/turbostat.c cpu, msr, msr 3712 tools/power/x86/turbostat/turbostat.c ((msr) & 0x1) ? "EN" : "Dis", msr 3713 tools/power/x86/turbostat/turbostat.c ((msr) & 0x2) ? "EN" : "Dis"); msr 3715 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_HWP_STATUS, &msr)) msr 3720 tools/power/x86/turbostat/turbostat.c cpu, msr, msr 3721 tools/power/x86/turbostat/turbostat.c ((msr) & 0x1) ? "" : "No-", msr 3722 tools/power/x86/turbostat/turbostat.c ((msr) & 0x2) ? "" : "No-"); msr 3732 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 3747 tools/power/x86/turbostat/turbostat.c get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr); msr 3748 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr); msr 3750 tools/power/x86/turbostat/turbostat.c (msr & 1 << 15) ? "bit15, " : "", msr 3751 tools/power/x86/turbostat/turbostat.c (msr & 1 << 14) ? "bit14, " : "", msr 3752 tools/power/x86/turbostat/turbostat.c (msr & 1 << 13) ? "Transitions, " : "", msr 3753 tools/power/x86/turbostat/turbostat.c (msr & 1 << 12) ? "MultiCoreTurbo, " : "", msr 3754 tools/power/x86/turbostat/turbostat.c (msr & 1 << 11) ? "PkgPwrL2, " : "", msr 3755 tools/power/x86/turbostat/turbostat.c (msr & 1 << 10) ? "PkgPwrL1, " : "", msr 3756 tools/power/x86/turbostat/turbostat.c (msr & 1 << 9) ? "CorePwr, " : "", msr 3757 tools/power/x86/turbostat/turbostat.c (msr & 1 << 8) ? "Amps, " : "", msr 3758 tools/power/x86/turbostat/turbostat.c (msr & 1 << 6) ? "VR-Therm, " : "", msr 3759 tools/power/x86/turbostat/turbostat.c (msr & 1 << 5) ? "Auto-HWP, " : "", msr 3760 tools/power/x86/turbostat/turbostat.c (msr & 1 << 4) ? "Graphics, " : "", msr 3761 tools/power/x86/turbostat/turbostat.c (msr & 1 << 2) ? "bit2, " : "", msr 3762 tools/power/x86/turbostat/turbostat.c (msr & 1 << 1) ? "ThermStatus, " : "", msr 3763 tools/power/x86/turbostat/turbostat.c (msr & 1 << 0) ? "PROCHOT, " : ""); msr 3765 tools/power/x86/turbostat/turbostat.c (msr & 1 << 31) ? "bit31, " : "", msr 3766 tools/power/x86/turbostat/turbostat.c (msr & 1 << 30) ? "bit30, " : "", msr 3767 tools/power/x86/turbostat/turbostat.c (msr & 1 << 29) ? "Transitions, " : "", msr 3768 tools/power/x86/turbostat/turbostat.c (msr & 1 << 28) ? "MultiCoreTurbo, " : "", msr 3769 tools/power/x86/turbostat/turbostat.c (msr & 1 << 27) ? "PkgPwrL2, " : "", msr 3770 tools/power/x86/turbostat/turbostat.c (msr & 1 << 26) ? "PkgPwrL1, " : "", msr 3771 tools/power/x86/turbostat/turbostat.c (msr & 1 << 25) ? "CorePwr, " : "", msr 3772 tools/power/x86/turbostat/turbostat.c (msr & 1 << 24) ? "Amps, " : "", msr 3773 tools/power/x86/turbostat/turbostat.c (msr & 1 << 22) ? "VR-Therm, " : "", msr 3774 tools/power/x86/turbostat/turbostat.c (msr & 1 << 21) ? "Auto-HWP, " : "", msr 3775 tools/power/x86/turbostat/turbostat.c (msr & 1 << 20) ? "Graphics, " : "", msr 3776 tools/power/x86/turbostat/turbostat.c (msr & 1 << 18) ? "bit18, " : "", msr 3777 tools/power/x86/turbostat/turbostat.c (msr & 1 << 17) ? "ThermStatus, " : "", msr 3778 tools/power/x86/turbostat/turbostat.c (msr & 1 << 16) ? "PROCHOT, " : ""); msr 3782 tools/power/x86/turbostat/turbostat.c get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr); msr 3783 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr); msr 3785 tools/power/x86/turbostat/turbostat.c (msr & 1 << 0) ? "PROCHOT, " : "", msr 3786 tools/power/x86/turbostat/turbostat.c (msr & 1 << 1) ? "ThermStatus, " : "", msr 3787 tools/power/x86/turbostat/turbostat.c (msr & 1 << 4) ? "Graphics, " : "", msr 3788 tools/power/x86/turbostat/turbostat.c (msr & 1 << 6) ? "VR-Therm, " : "", msr 3789 tools/power/x86/turbostat/turbostat.c (msr & 1 << 8) ? "Amps, " : "", msr 3790 tools/power/x86/turbostat/turbostat.c (msr & 1 << 9) ? "GFXPwr, " : "", msr 3791 tools/power/x86/turbostat/turbostat.c (msr & 1 << 10) ? "PkgPwrL1, " : "", msr 3792 tools/power/x86/turbostat/turbostat.c (msr & 1 << 11) ? "PkgPwrL2, " : ""); msr 3794 tools/power/x86/turbostat/turbostat.c (msr & 1 << 16) ? "PROCHOT, " : "", msr 3795 tools/power/x86/turbostat/turbostat.c (msr & 1 << 17) ? "ThermStatus, " : "", msr 3796 tools/power/x86/turbostat/turbostat.c (msr & 1 << 20) ? "Graphics, " : "", msr 3797 tools/power/x86/turbostat/turbostat.c (msr & 1 << 22) ? "VR-Therm, " : "", msr 3798 tools/power/x86/turbostat/turbostat.c (msr & 1 << 24) ? "Amps, " : "", msr 3799 tools/power/x86/turbostat/turbostat.c (msr & 1 << 25) ? "GFXPwr, " : "", msr 3800 tools/power/x86/turbostat/turbostat.c (msr & 1 << 26) ? "PkgPwrL1, " : "", msr 3801 tools/power/x86/turbostat/turbostat.c (msr & 1 << 27) ? "PkgPwrL2, " : ""); msr 3804 tools/power/x86/turbostat/turbostat.c get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr); msr 3805 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr); msr 3807 tools/power/x86/turbostat/turbostat.c (msr & 1 << 0) ? "PROCHOT, " : "", msr 3808 tools/power/x86/turbostat/turbostat.c (msr & 1 << 1) ? "ThermStatus, " : "", msr 3809 tools/power/x86/turbostat/turbostat.c (msr & 1 << 6) ? "VR-Therm, " : "", msr 3810 tools/power/x86/turbostat/turbostat.c (msr & 1 << 8) ? "Amps, " : "", msr 3811 tools/power/x86/turbostat/turbostat.c (msr & 1 << 10) ? "PkgPwrL1, " : "", msr 3812 tools/power/x86/turbostat/turbostat.c (msr & 1 << 11) ? "PkgPwrL2, " : ""); msr 3814 tools/power/x86/turbostat/turbostat.c (msr & 1 << 16) ? "PROCHOT, " : "", msr 3815 tools/power/x86/turbostat/turbostat.c (msr & 1 << 17) ? "ThermStatus, " : "", msr 3816 tools/power/x86/turbostat/turbostat.c (msr & 1 << 22) ? "VR-Therm, " : "", msr 3817 tools/power/x86/turbostat/turbostat.c (msr & 1 << 24) ? "Amps, " : "", msr 3818 tools/power/x86/turbostat/turbostat.c (msr & 1 << 26) ? "PkgPwrL1, " : "", msr 3819 tools/power/x86/turbostat/turbostat.c (msr & 1 << 27) ? "PkgPwrL2, " : ""); msr 3829 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 3832 tools/power/x86/turbostat/turbostat.c if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr)) msr 3833 tools/power/x86/turbostat/turbostat.c return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units; msr 3876 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 3987 tools/power/x86/turbostat/turbostat.c if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr)) msr 3990 tools/power/x86/turbostat/turbostat.c rapl_power_units = 1.0 / (1 << (msr & 0xF)); msr 3992 tools/power/x86/turbostat/turbostat.c rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000; msr 3994 tools/power/x86/turbostat/turbostat.c rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F)); msr 3998 tools/power/x86/turbostat/turbostat.c time_unit = msr >> 16 & 0xF; msr 4013 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 4043 tools/power/x86/turbostat/turbostat.c if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr)) msr 4046 tools/power/x86/turbostat/turbostat.c rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf)); msr 4047 tools/power/x86/turbostat/turbostat.c rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f)); msr 4048 tools/power/x86/turbostat/turbostat.c rapl_power_units = ldexp(1.0, -(msr & 0xf)); msr 4099 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 4118 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr)) msr 4121 tools/power/x86/turbostat/turbostat.c dts = (msr >> 16) & 0x7F; msr 4123 tools/power/x86/turbostat/turbostat.c cpu, msr, tcc_activation_temp - dts); msr 4125 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr)) msr 4128 tools/power/x86/turbostat/turbostat.c dts = (msr >> 16) & 0x7F; msr 4129 tools/power/x86/turbostat/turbostat.c dts2 = (msr >> 8) & 0x7F; msr 4131 tools/power/x86/turbostat/turbostat.c cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2); msr 4138 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr)) msr 4141 tools/power/x86/turbostat/turbostat.c dts = (msr >> 16) & 0x7F; msr 4142 tools/power/x86/turbostat/turbostat.c resolution = (msr >> 27) & 0xF; msr 4144 tools/power/x86/turbostat/turbostat.c cpu, msr, tcc_activation_temp - dts, resolution); msr 4146 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr)) msr 4149 tools/power/x86/turbostat/turbostat.c dts = (msr >> 16) & 0x7F; msr 4150 tools/power/x86/turbostat/turbostat.c dts2 = (msr >> 8) & 0x7F; msr 4152 tools/power/x86/turbostat/turbostat.c cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2); msr 4158 tools/power/x86/turbostat/turbostat.c void print_power_limit_msr(int cpu, unsigned long long msr, char *label) msr 4162 tools/power/x86/turbostat/turbostat.c ((msr >> 15) & 1) ? "EN" : "DIS", msr 4163 tools/power/x86/turbostat/turbostat.c ((msr >> 0) & 0x7FFF) * rapl_power_units, msr 4164 tools/power/x86/turbostat/turbostat.c (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units, msr 4165 tools/power/x86/turbostat/turbostat.c (((msr >> 16) & 1) ? "EN" : "DIS")); msr 4172 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 4191 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr)) msr 4195 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr)) msr 4199 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr, msr 4204 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr)) msr 4209 tools/power/x86/turbostat/turbostat.c cpu, msr, msr 4210 tools/power/x86/turbostat/turbostat.c ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units, msr 4211 tools/power/x86/turbostat/turbostat.c ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units, msr 4212 tools/power/x86/turbostat/turbostat.c ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units, msr 4213 tools/power/x86/turbostat/turbostat.c ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units); msr 4218 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr)) msr 4222 tools/power/x86/turbostat/turbostat.c cpu, msr, (msr >> 63) & 1 ? "" : "UN"); msr 4224 tools/power/x86/turbostat/turbostat.c print_power_limit_msr(cpu, msr, "PKG Limit #1"); msr 4227 tools/power/x86/turbostat/turbostat.c ((msr >> 47) & 1) ? "EN" : "DIS", msr 4228 tools/power/x86/turbostat/turbostat.c ((msr >> 32) & 0x7FFF) * rapl_power_units, msr 4229 tools/power/x86/turbostat/turbostat.c (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units, msr 4230 tools/power/x86/turbostat/turbostat.c ((msr >> 48) & 1) ? "EN" : "DIS"); msr 4234 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr)) msr 4238 tools/power/x86/turbostat/turbostat.c cpu, msr, msr 4239 tools/power/x86/turbostat/turbostat.c ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units, msr 4240 tools/power/x86/turbostat/turbostat.c ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units, msr 4241 tools/power/x86/turbostat/turbostat.c ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units, msr 4242 tools/power/x86/turbostat/turbostat.c ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units); msr 4245 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr)) msr 4248 tools/power/x86/turbostat/turbostat.c cpu, msr, (msr >> 31) & 1 ? "" : "UN"); msr 4250 tools/power/x86/turbostat/turbostat.c print_power_limit_msr(cpu, msr, "DRAM Limit"); msr 4253 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_PP0_POLICY, &msr)) msr 4256 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF); msr 4259 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr)) msr 4262 tools/power/x86/turbostat/turbostat.c cpu, msr, (msr >> 31) & 1 ? "" : "UN"); msr 4263 tools/power/x86/turbostat/turbostat.c print_power_limit_msr(cpu, msr, "Cores Limit"); msr 4266 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_PP1_POLICY, &msr)) msr 4269 tools/power/x86/turbostat/turbostat.c fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF); msr 4271 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr)) msr 4274 tools/power/x86/turbostat/turbostat.c cpu, msr, (msr >> 31) & 1 ? "" : "UN"); msr 4275 tools/power/x86/turbostat/turbostat.c print_power_limit_msr(cpu, msr, "GFX Limit"); msr 4414 tools/power/x86/turbostat/turbostat.c unsigned long long msr = 3; msr 4418 tools/power/x86/turbostat/turbostat.c if (get_msr(base_cpu, MSR_FSB_FREQ, &msr)) msr 4421 tools/power/x86/turbostat/turbostat.c i = msr & 0xf; msr 4458 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 4487 tools/power/x86/turbostat/turbostat.c if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr)) msr 4490 tools/power/x86/turbostat/turbostat.c target_c_local = (msr >> 16) & 0xFF; msr 4494 tools/power/x86/turbostat/turbostat.c cpu, msr, target_c_local); msr 4513 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 4515 tools/power/x86/turbostat/turbostat.c if (!get_msr(base_cpu, MSR_IA32_FEATURE_CONTROL, &msr)) msr 4517 tools/power/x86/turbostat/turbostat.c base_cpu, msr, msr 4518 tools/power/x86/turbostat/turbostat.c msr & FEATURE_CONTROL_LOCKED ? "" : "UN-", msr 4519 tools/power/x86/turbostat/turbostat.c msr & (1 << 18) ? "SGX" : ""); msr 4524 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 4529 tools/power/x86/turbostat/turbostat.c if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr)) msr 4531 tools/power/x86/turbostat/turbostat.c base_cpu, msr, msr 4532 tools/power/x86/turbostat/turbostat.c msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-", msr 4533 tools/power/x86/turbostat/turbostat.c msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-", msr 4534 tools/power/x86/turbostat/turbostat.c msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-", msr 4535 tools/power/x86/turbostat/turbostat.c msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "", msr 4536 tools/power/x86/turbostat/turbostat.c msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : ""); msr 4541 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 4546 tools/power/x86/turbostat/turbostat.c if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr)) msr 4548 tools/power/x86/turbostat/turbostat.c base_cpu, msr, msr 4549 tools/power/x86/turbostat/turbostat.c msr & (0 << 0) ? "No-" : "", msr 4550 tools/power/x86/turbostat/turbostat.c msr & (1 << 0) ? "No-" : "", msr 4551 tools/power/x86/turbostat/turbostat.c msr & (2 << 0) ? "No-" : "", msr 4552 tools/power/x86/turbostat/turbostat.c msr & (3 << 0) ? "No-" : ""); msr 4563 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 4571 tools/power/x86/turbostat/turbostat.c if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr)) msr 4573 tools/power/x86/turbostat/turbostat.c base_cpu, msr, msr 4574 tools/power/x86/turbostat/turbostat.c msr & (1 << 0) ? "DIS" : "EN", msr 4575 tools/power/x86/turbostat/turbostat.c msr & (1 << 1) ? "EN" : "DIS", msr 4576 tools/power/x86/turbostat/turbostat.c msr & (1 << 8) ? "EN" : "DIS"); msr 4586 tools/power/x86/turbostat/turbostat.c unsigned long long msr; msr 4588 tools/power/x86/turbostat/turbostat.c if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr)) msr 4590 tools/power/x86/turbostat/turbostat.c base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); msr 4592 tools/power/x86/turbostat/turbostat.c if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr)) msr 4594 tools/power/x86/turbostat/turbostat.c base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); msr 626 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c int get_msr(int cpu, int offset, unsigned long long *msr) msr 637 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c retval = pread(fd, msr, sizeof(*msr), offset); msr 638 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c if (retval != sizeof(*msr)) msr 642 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c fprintf(stderr, "get_msr(cpu%d, 0x%X, 0x%llX)\n", cpu, offset, *msr); msr 681 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c unsigned long long msr; msr 683 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c get_msr(cpu, msr_offset, &msr); msr 685 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c cap->highest = msr_perf_2_ratio(HWP_HIGHEST_PERF(msr)); msr 686 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c cap->guaranteed = msr_perf_2_ratio(HWP_GUARANTEED_PERF(msr)); msr 687 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c cap->efficient = msr_perf_2_ratio(HWP_MOSTEFFICIENT_PERF(msr)); msr 688 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c cap->lowest = msr_perf_2_ratio(HWP_LOWEST_PERF(msr)); msr 716 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c unsigned long long msr; msr 718 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c get_msr(cpu, msr_offset, &msr); msr 720 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c hwp_req->hwp_min = msr_perf_2_ratio((((msr) >> 0) & 0xff)); msr 721 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c hwp_req->hwp_max = msr_perf_2_ratio((((msr) >> 8) & 0xff)); msr 722 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c hwp_req->hwp_desired = msr_perf_2_ratio((((msr) >> 16) & 0xff)); msr 723 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c hwp_req->hwp_epp = (((msr) >> 24) & 0xff); msr 724 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c hwp_req->hwp_window = (((msr) >> 32) & 0x3ff); msr 725 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c hwp_req->hwp_use_pkg = (((msr) >> 42) & 0x1); msr 730 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c unsigned long long msr = 0; msr 738 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c msr |= HWP_MIN_PERF(ratio_2_msr_perf(hwp_req->hwp_min)); msr 739 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c msr |= HWP_MAX_PERF(ratio_2_msr_perf(hwp_req->hwp_max)); msr 740 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c msr |= HWP_DESIRED_PERF(ratio_2_msr_perf(hwp_req->hwp_desired)); msr 741 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c msr |= HWP_ENERGY_PERF_PREFERENCE(hwp_req->hwp_epp); msr 742 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c msr |= HWP_ACTIVITY_WINDOW(hwp_req->hwp_window); msr 743 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c msr |= HWP_PACKAGE_CONTROL(hwp_req->hwp_use_pkg); msr 745 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c put_msr(cpu, msr_offset, msr); msr 750 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c unsigned long long msr; msr 755 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr); msr 757 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c printf("cpu%d: EPB %u\n", cpu, (unsigned int) msr); msr 775 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c unsigned long long msr; msr 784 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c get_msr(first_cpu_in_pkg[pkg], MSR_HWP_INTERRUPT, &msr); msr 787 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c pkg, msr, msr 788 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c ((msr) & 0x2) ? "EN" : "Dis", msr 789 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c ((msr) & 0x1) ? "EN" : "Dis"); msr 791 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c get_msr(first_cpu_in_pkg[pkg], MSR_HWP_STATUS, &msr); msr 794 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c pkg, msr, msr 795 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c ((msr) & 0x4) ? "" : "No-", msr 796 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c ((msr) & 0x1) ? "" : "No-"); msr 1027 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c unsigned long long msr; msr 1029 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c get_msr(cpu, MSR_PM_ENABLE, &msr); msr 1033 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c printf("cpu%d: MSR_PM_ENABLE old: %d new: %d\n", cpu, (unsigned int) msr, 1); msr 1040 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c unsigned long long msr; msr 1044 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr); msr 1049 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c cpu, (unsigned int) msr, (unsigned int) new_epb); msr 1055 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c get_msr(cpu, MSR_IA32_MISC_ENABLE, &msr); msr 1057 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c turbo_is_present_and_disabled = ((msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE) != 0); msr 1061 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c msr &= ~MSR_IA32_MISC_ENABLE_TURBO_DISABLE; msr 1062 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c put_msr(cpu, MSR_IA32_MISC_ENABLE, msr); msr 1072 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c msr |= MSR_IA32_MISC_ENABLE_TURBO_DISABLE; msr 1073 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c put_msr(cpu, MSR_IA32_MISC_ENABLE, msr); msr 1202 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c unsigned long long msr; msr 1208 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c get_msr(base_cpu, MSR_PM_ENABLE, &msr); msr 1209 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c if ((msr & 1) == 0) { msr 1288 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c unsigned long long msr; msr 1290 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr); msr 1292 tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c bdx_highest_ratio = msr & 0xFF; msr 16 tools/testing/selftests/intel_pstate/msr.c long long msr; msr 36 tools/testing/selftests/intel_pstate/msr.c pread(fd, &msr, sizeof(msr), 0x199); msr 38 tools/testing/selftests/intel_pstate/msr.c printf("msr 0x199: 0x%llx\n", msr); msr 97 tools/testing/selftests/kvm/include/x86_64/processor.h static inline uint64_t rdmsr(uint32_t msr) msr 101 tools/testing/selftests/kvm/include/x86_64/processor.h __asm__ __volatile__("rdmsr" : "=a"(a), "=d"(d) : "c"(msr) : "memory"); msr 106 tools/testing/selftests/kvm/include/x86_64/processor.h static inline void wrmsr(uint32_t msr, uint64_t value) msr 111 tools/testing/selftests/kvm/include/x86_64/processor.h __asm__ __volatile__("wrmsr" :: "a"(a), "d"(d), "c"(msr) : "memory"); msr 551 tools/testing/selftests/kvm/include/x86_64/vmx.h void *msr; msr 94 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmx->msr = (void *)vm_vaddr_alloc(vm, getpagesize(), 0x10000, 0, 0); msr 95 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmx->msr_hva = addr_gva2hva(vm, (uintptr_t)vmx->msr); msr 96 tools/testing/selftests/kvm/lib/x86_64/vmx.c vmx->msr_gpa = addr_gva2gpa(vm, (uintptr_t)vmx->msr);