msm_gpu            10 drivers/gpu/drm/msm/adreno/a2xx_gpu.c static void a2xx_dump(struct msm_gpu *gpu);
msm_gpu            11 drivers/gpu/drm/msm/adreno/a2xx_gpu.c static bool a2xx_idle(struct msm_gpu *gpu);
msm_gpu            13 drivers/gpu/drm/msm/adreno/a2xx_gpu.c static bool a2xx_me_init(struct msm_gpu *gpu)
msm_gpu            60 drivers/gpu/drm/msm/adreno/a2xx_gpu.c static int a2xx_hw_init(struct msm_gpu *gpu)
msm_gpu           201 drivers/gpu/drm/msm/adreno/a2xx_gpu.c static void a2xx_recover(struct msm_gpu *gpu)
msm_gpu           222 drivers/gpu/drm/msm/adreno/a2xx_gpu.c static void a2xx_destroy(struct msm_gpu *gpu)
msm_gpu           234 drivers/gpu/drm/msm/adreno/a2xx_gpu.c static bool a2xx_idle(struct msm_gpu *gpu)
msm_gpu           252 drivers/gpu/drm/msm/adreno/a2xx_gpu.c static irqreturn_t a2xx_irq(struct msm_gpu *gpu)
msm_gpu           383 drivers/gpu/drm/msm/adreno/a2xx_gpu.c static void a2xx_dump(struct msm_gpu *gpu)
msm_gpu           390 drivers/gpu/drm/msm/adreno/a2xx_gpu.c static struct msm_gpu_state *a2xx_gpu_state_get(struct msm_gpu *gpu)
msm_gpu           439 drivers/gpu/drm/msm/adreno/a2xx_gpu.c struct msm_gpu *a2xx_gpu_init(struct drm_device *dev)
msm_gpu           443 drivers/gpu/drm/msm/adreno/a2xx_gpu.c 	struct msm_gpu *gpu;
msm_gpu            32 drivers/gpu/drm/msm/adreno/a3xx_gpu.c static void a3xx_dump(struct msm_gpu *gpu);
msm_gpu            33 drivers/gpu/drm/msm/adreno/a3xx_gpu.c static bool a3xx_idle(struct msm_gpu *gpu);
msm_gpu            35 drivers/gpu/drm/msm/adreno/a3xx_gpu.c static bool a3xx_me_init(struct msm_gpu *gpu)
msm_gpu            62 drivers/gpu/drm/msm/adreno/a3xx_gpu.c static int a3xx_hw_init(struct msm_gpu *gpu)
msm_gpu           291 drivers/gpu/drm/msm/adreno/a3xx_gpu.c static void a3xx_recover(struct msm_gpu *gpu)
msm_gpu           312 drivers/gpu/drm/msm/adreno/a3xx_gpu.c static void a3xx_destroy(struct msm_gpu *gpu)
msm_gpu           329 drivers/gpu/drm/msm/adreno/a3xx_gpu.c static bool a3xx_idle(struct msm_gpu *gpu)
msm_gpu           347 drivers/gpu/drm/msm/adreno/a3xx_gpu.c static irqreturn_t a3xx_irq(struct msm_gpu *gpu)
msm_gpu           402 drivers/gpu/drm/msm/adreno/a3xx_gpu.c static void a3xx_dump(struct msm_gpu *gpu)
msm_gpu           409 drivers/gpu/drm/msm/adreno/a3xx_gpu.c static struct msm_gpu_state *a3xx_gpu_state_get(struct msm_gpu *gpu)
msm_gpu           461 drivers/gpu/drm/msm/adreno/a3xx_gpu.c struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
msm_gpu           465 drivers/gpu/drm/msm/adreno/a3xx_gpu.c 	struct msm_gpu *gpu;
msm_gpu            25 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static void a4xx_dump(struct msm_gpu *gpu);
msm_gpu            26 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static bool a4xx_idle(struct msm_gpu *gpu);
msm_gpu            32 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static void a4xx_enable_hwcg(struct msm_gpu *gpu)
msm_gpu           109 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static bool a4xx_me_init(struct msm_gpu *gpu)
msm_gpu           136 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static int a4xx_hw_init(struct msm_gpu *gpu)
msm_gpu           291 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static void a4xx_recover(struct msm_gpu *gpu)
msm_gpu           312 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static void a4xx_destroy(struct msm_gpu *gpu)
msm_gpu           329 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static bool a4xx_idle(struct msm_gpu *gpu)
msm_gpu           346 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static irqreturn_t a4xx_irq(struct msm_gpu *gpu)
msm_gpu           449 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static struct msm_gpu_state *a4xx_gpu_state_get(struct msm_gpu *gpu)
msm_gpu           474 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static void a4xx_dump(struct msm_gpu *gpu)
msm_gpu           481 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static int a4xx_pm_resume(struct msm_gpu *gpu) {
msm_gpu           501 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static int a4xx_pm_suspend(struct msm_gpu *gpu) {
msm_gpu           516 drivers/gpu/drm/msm/adreno/a4xx_gpu.c static int a4xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
msm_gpu           545 drivers/gpu/drm/msm/adreno/a4xx_gpu.c struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
msm_gpu           549 drivers/gpu/drm/msm/adreno/a4xx_gpu.c 	struct msm_gpu *gpu;
msm_gpu            14 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c static int pfp_print(struct msm_gpu *gpu, struct drm_printer *p)
msm_gpu            29 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c static int me_print(struct msm_gpu *gpu, struct drm_printer *p)
msm_gpu            44 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c static int meq_print(struct msm_gpu *gpu, struct drm_printer *p)
msm_gpu            59 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c static int roq_print(struct msm_gpu *gpu, struct drm_printer *p)
msm_gpu            84 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 	int (*show)(struct msm_gpu *gpu, struct drm_printer *p) =
msm_gpu           104 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 	struct msm_gpu *gpu = priv->gpu;
msm_gpu           151 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c int a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor)
msm_gpu            17 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_dump(struct msm_gpu *gpu);
msm_gpu            21 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
msm_gpu            46 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit,
msm_gpu           106 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
msm_gpu           312 drivers/gpu/drm/msm/adreno/a5xx_gpu.c void a5xx_set_hwcg(struct msm_gpu *gpu, bool state)
msm_gpu           330 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static int a5xx_me_init(struct msm_gpu *gpu)
msm_gpu           368 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static int a5xx_preempt_start(struct msm_gpu *gpu)
msm_gpu           411 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static int a5xx_ucode_init(struct msm_gpu *gpu)
msm_gpu           459 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static int a5xx_zap_shader_resume(struct msm_gpu *gpu)
msm_gpu           471 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static int a5xx_zap_shader_init(struct msm_gpu *gpu)
msm_gpu           502 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static int a5xx_hw_init(struct msm_gpu *gpu)
msm_gpu           749 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_recover(struct msm_gpu *gpu)
msm_gpu           769 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_destroy(struct msm_gpu *gpu)
msm_gpu           797 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static inline bool _a5xx_check_idle(struct msm_gpu *gpu)
msm_gpu           810 drivers/gpu/drm/msm/adreno/a5xx_gpu.c bool a5xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
msm_gpu           839 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	struct msm_gpu *gpu = arg;
msm_gpu           850 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_cp_err_irq(struct msm_gpu *gpu)
msm_gpu           901 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_rbbm_err_irq(struct msm_gpu *gpu, u32 status)
msm_gpu           942 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_uche_err_irq(struct msm_gpu *gpu)
msm_gpu           952 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_gpmu_err_irq(struct msm_gpu *gpu)
msm_gpu           957 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_fault_detect_irq(struct msm_gpu *gpu)
msm_gpu           987 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static irqreturn_t a5xx_irq(struct msm_gpu *gpu)
msm_gpu          1067 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_dump(struct msm_gpu *gpu)
msm_gpu          1074 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static int a5xx_pm_resume(struct msm_gpu *gpu)
msm_gpu          1109 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static int a5xx_pm_suspend(struct msm_gpu *gpu)
msm_gpu          1127 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
msm_gpu          1146 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static int a5xx_crashdumper_init(struct msm_gpu *gpu,
msm_gpu          1159 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static int a5xx_crashdumper_run(struct msm_gpu *gpu,
msm_gpu          1203 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static void a5xx_gpu_state_get_hlsq_regs(struct msm_gpu *gpu,
msm_gpu          1262 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static struct msm_gpu_state *a5xx_gpu_state_get(struct msm_gpu *gpu)
msm_gpu          1309 drivers/gpu/drm/msm/adreno/a5xx_gpu.c void a5xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
msm_gpu          1350 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static struct msm_ringbuffer *a5xx_active_ring(struct msm_gpu *gpu)
msm_gpu          1358 drivers/gpu/drm/msm/adreno/a5xx_gpu.c static unsigned long a5xx_gpu_busy(struct msm_gpu *gpu)
msm_gpu          1420 drivers/gpu/drm/msm/adreno/a5xx_gpu.c struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)
msm_gpu          1426 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	struct msm_gpu *gpu;
msm_gpu            44 drivers/gpu/drm/msm/adreno/a5xx_gpu.h int a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor);
msm_gpu           127 drivers/gpu/drm/msm/adreno/a5xx_gpu.h int a5xx_power_init(struct msm_gpu *gpu);
msm_gpu           128 drivers/gpu/drm/msm/adreno/a5xx_gpu.h void a5xx_gpmu_ucode_init(struct msm_gpu *gpu);
msm_gpu           130 drivers/gpu/drm/msm/adreno/a5xx_gpu.h static inline int spin_usecs(struct msm_gpu *gpu, uint32_t usecs,
msm_gpu           143 drivers/gpu/drm/msm/adreno/a5xx_gpu.h bool a5xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
msm_gpu           144 drivers/gpu/drm/msm/adreno/a5xx_gpu.h void a5xx_set_hwcg(struct msm_gpu *gpu, bool state);
msm_gpu           146 drivers/gpu/drm/msm/adreno/a5xx_gpu.h void a5xx_preempt_init(struct msm_gpu *gpu);
msm_gpu           147 drivers/gpu/drm/msm/adreno/a5xx_gpu.h void a5xx_preempt_hw_init(struct msm_gpu *gpu);
msm_gpu           148 drivers/gpu/drm/msm/adreno/a5xx_gpu.h void a5xx_preempt_trigger(struct msm_gpu *gpu);
msm_gpu           149 drivers/gpu/drm/msm/adreno/a5xx_gpu.h void a5xx_preempt_irq(struct msm_gpu *gpu);
msm_gpu           150 drivers/gpu/drm/msm/adreno/a5xx_gpu.h void a5xx_preempt_fini(struct msm_gpu *gpu);
msm_gpu           103 drivers/gpu/drm/msm/adreno/a5xx_power.c static inline uint32_t _get_mvolts(struct msm_gpu *gpu, uint32_t freq)
msm_gpu           122 drivers/gpu/drm/msm/adreno/a5xx_power.c static void a530_lm_setup(struct msm_gpu *gpu)
msm_gpu           175 drivers/gpu/drm/msm/adreno/a5xx_power.c static void a540_lm_setup(struct msm_gpu *gpu)
msm_gpu           211 drivers/gpu/drm/msm/adreno/a5xx_power.c static void a5xx_pc_init(struct msm_gpu *gpu)
msm_gpu           220 drivers/gpu/drm/msm/adreno/a5xx_power.c static int a5xx_gpmu_init(struct msm_gpu *gpu)
msm_gpu           278 drivers/gpu/drm/msm/adreno/a5xx_power.c static void a5xx_lm_enable(struct msm_gpu *gpu)
msm_gpu           295 drivers/gpu/drm/msm/adreno/a5xx_power.c int a5xx_power_init(struct msm_gpu *gpu)
msm_gpu           320 drivers/gpu/drm/msm/adreno/a5xx_power.c void a5xx_gpmu_ucode_init(struct msm_gpu *gpu)
msm_gpu            40 drivers/gpu/drm/msm/adreno/a5xx_preempt.c static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
msm_gpu            56 drivers/gpu/drm/msm/adreno/a5xx_preempt.c static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu)
msm_gpu            79 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	struct msm_gpu *gpu = &a5xx_gpu->base.base;
msm_gpu            91 drivers/gpu/drm/msm/adreno/a5xx_preempt.c void a5xx_preempt_trigger(struct msm_gpu *gpu)
msm_gpu           159 drivers/gpu/drm/msm/adreno/a5xx_preempt.c void a5xx_preempt_irq(struct msm_gpu *gpu)
msm_gpu           196 drivers/gpu/drm/msm/adreno/a5xx_preempt.c void a5xx_preempt_hw_init(struct msm_gpu *gpu)
msm_gpu           227 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	struct msm_gpu *gpu = &adreno_gpu->base;
msm_gpu           257 drivers/gpu/drm/msm/adreno/a5xx_preempt.c void a5xx_preempt_fini(struct msm_gpu *gpu)
msm_gpu           267 drivers/gpu/drm/msm/adreno/a5xx_preempt.c void a5xx_preempt_init(struct msm_gpu *gpu)
msm_gpu            17 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct msm_gpu *gpu = &adreno_gpu->base;
msm_gpu           107 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct msm_gpu *gpu = &adreno_gpu->base;
msm_gpu           138 drivers/gpu/drm/msm/adreno/a6xx_gmu.c void a6xx_gmu_set_freq(struct msm_gpu *gpu, unsigned long freq)
msm_gpu           155 drivers/gpu/drm/msm/adreno/a6xx_gmu.c unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu)
msm_gpu           696 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct msm_gpu *gpu = &adreno_gpu->base;
msm_gpu           786 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct msm_gpu *gpu = &adreno_gpu->base;
msm_gpu           846 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct msm_gpu *gpu = &a6xx_gpu->base.base;
msm_gpu          1095 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct msm_gpu *gpu = &adreno_gpu->base;
msm_gpu          1145 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct msm_gpu *gpu = &adreno_gpu->base;
msm_gpu            15 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static inline bool _a6xx_check_idle(struct msm_gpu *gpu)
msm_gpu            33 drivers/gpu/drm/msm/adreno/a6xx_gpu.c bool a6xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
msm_gpu            52 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
msm_gpu            82 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
msm_gpu           265 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static void a6xx_set_hwcg(struct msm_gpu *gpu, bool state)
msm_gpu           292 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static int a6xx_cp_init(struct msm_gpu *gpu)
msm_gpu           321 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static int a6xx_ucode_init(struct msm_gpu *gpu)
msm_gpu           349 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static int a6xx_zap_shader_init(struct msm_gpu *gpu)
msm_gpu           375 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static int a6xx_hw_init(struct msm_gpu *gpu)
msm_gpu           568 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static void a6xx_dump(struct msm_gpu *gpu)
msm_gpu           578 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static void a6xx_recover(struct msm_gpu *gpu)
msm_gpu           607 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	struct msm_gpu *gpu = arg;
msm_gpu           619 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static void a6xx_cp_hw_err_irq(struct msm_gpu *gpu)
msm_gpu           661 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static void a6xx_fault_detect_irq(struct msm_gpu *gpu)
msm_gpu           692 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static irqreturn_t a6xx_irq(struct msm_gpu *gpu)
msm_gpu           734 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static int a6xx_pm_resume(struct msm_gpu *gpu)
msm_gpu           751 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static int a6xx_pm_suspend(struct msm_gpu *gpu)
msm_gpu           761 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
msm_gpu           776 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static struct msm_ringbuffer *a6xx_active_ring(struct msm_gpu *gpu)
msm_gpu           784 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static void a6xx_destroy(struct msm_gpu *gpu)
msm_gpu           800 drivers/gpu/drm/msm/adreno/a6xx_gpu.c static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu)
msm_gpu           847 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
msm_gpu           854 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	struct msm_gpu *gpu;
msm_gpu            59 drivers/gpu/drm/msm/adreno/a6xx_gpu.h void a6xx_gmu_set_freq(struct msm_gpu *gpu, unsigned long freq);
msm_gpu            60 drivers/gpu/drm/msm/adreno/a6xx_gpu.h unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu);
msm_gpu            62 drivers/gpu/drm/msm/adreno/a6xx_gpu.h void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
msm_gpu            65 drivers/gpu/drm/msm/adreno/a6xx_gpu.h struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu);
msm_gpu           112 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static int a6xx_crashdumper_init(struct msm_gpu *gpu,
msm_gpu           125 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static int a6xx_crashdumper_run(struct msm_gpu *gpu,
msm_gpu           156 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static int debugbus_read(struct msm_gpu *gpu, u32 block, u32 offset,
msm_gpu           204 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static int vbif_debugbus_read(struct msm_gpu *gpu, u32 ctrl0, u32 ctrl1,
msm_gpu           228 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_vbif_debugbus_block(struct msm_gpu *gpu,
msm_gpu           282 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_debugbus_block(struct msm_gpu *gpu,
msm_gpu           318 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_debugbus(struct msm_gpu *gpu,
msm_gpu           427 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_dbgahb_cluster(struct msm_gpu *gpu,
msm_gpu           473 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_dbgahb_clusters(struct msm_gpu *gpu,
msm_gpu           495 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_cluster(struct msm_gpu *gpu,
msm_gpu           544 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_clusters(struct msm_gpu *gpu,
msm_gpu           564 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_shader_block(struct msm_gpu *gpu,
msm_gpu           595 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_shaders(struct msm_gpu *gpu,
msm_gpu           615 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_crashdumper_hlsq_registers(struct msm_gpu *gpu,
msm_gpu           653 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_crashdumper_registers(struct msm_gpu *gpu,
msm_gpu           691 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_ahb_gpu_registers(struct msm_gpu *gpu,
msm_gpu           717 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void _a6xx_get_gmu_registers(struct msm_gpu *gpu,
msm_gpu           745 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_gmu_registers(struct msm_gpu *gpu,
msm_gpu           773 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_registers(struct msm_gpu *gpu,
msm_gpu           809 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_indexed_regs(struct msm_gpu *gpu,
msm_gpu           829 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c static void a6xx_get_indexed_registers(struct msm_gpu *gpu,
msm_gpu           865 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu)
msm_gpu          1114 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
msm_gpu           208 drivers/gpu/drm/msm/adreno/adreno_device.c struct msm_gpu *adreno_load_gpu(struct drm_device *dev)
msm_gpu           212 drivers/gpu/drm/msm/adreno/adreno_device.c 	struct msm_gpu *gpu = NULL;
msm_gpu           322 drivers/gpu/drm/msm/adreno/adreno_device.c 	struct msm_gpu *gpu;
msm_gpu           360 drivers/gpu/drm/msm/adreno/adreno_device.c 	struct msm_gpu *gpu = dev_get_drvdata(dev);
msm_gpu           426 drivers/gpu/drm/msm/adreno/adreno_device.c 	struct msm_gpu *gpu = platform_get_drvdata(pdev);
msm_gpu           434 drivers/gpu/drm/msm/adreno/adreno_device.c 	struct msm_gpu *gpu = platform_get_drvdata(pdev);
msm_gpu            23 drivers/gpu/drm/msm/adreno/adreno_gpu.c static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname,
msm_gpu           133 drivers/gpu/drm/msm/adreno/adreno_gpu.c int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid)
msm_gpu           159 drivers/gpu/drm/msm/adreno/adreno_gpu.c int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value)
msm_gpu           313 drivers/gpu/drm/msm/adreno/adreno_gpu.c struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu,
msm_gpu           332 drivers/gpu/drm/msm/adreno/adreno_gpu.c int adreno_hw_init(struct msm_gpu *gpu)
msm_gpu           391 drivers/gpu/drm/msm/adreno/adreno_gpu.c struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu)
msm_gpu           396 drivers/gpu/drm/msm/adreno/adreno_gpu.c void adreno_recover(struct msm_gpu *gpu)
msm_gpu           414 drivers/gpu/drm/msm/adreno/adreno_gpu.c void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
msm_gpu           486 drivers/gpu/drm/msm/adreno/adreno_gpu.c void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
msm_gpu           507 drivers/gpu/drm/msm/adreno/adreno_gpu.c bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
msm_gpu           523 drivers/gpu/drm/msm/adreno/adreno_gpu.c int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state)
msm_gpu           695 drivers/gpu/drm/msm/adreno/adreno_gpu.c void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
msm_gpu           757 drivers/gpu/drm/msm/adreno/adreno_gpu.c void adreno_dump_info(struct msm_gpu *gpu)
msm_gpu           780 drivers/gpu/drm/msm/adreno/adreno_gpu.c void adreno_dump(struct msm_gpu *gpu)
msm_gpu           853 drivers/gpu/drm/msm/adreno/adreno_gpu.c 		struct msm_gpu *gpu)
msm_gpu           902 drivers/gpu/drm/msm/adreno/adreno_gpu.c 	struct msm_gpu *gpu = &adreno_gpu->base;
msm_gpu           933 drivers/gpu/drm/msm/adreno/adreno_gpu.c 	struct msm_gpu *gpu = &adreno_gpu->base;
msm_gpu            68 drivers/gpu/drm/msm/adreno/adreno_gpu.h 	int (*get_timestamp)(struct msm_gpu *gpu, uint64_t *value);
msm_gpu            78 drivers/gpu/drm/msm/adreno/adreno_gpu.h 	struct msm_gpu *(*init)(struct drm_device *dev);
msm_gpu            86 drivers/gpu/drm/msm/adreno/adreno_gpu.h 	struct msm_gpu base;
msm_gpu           219 drivers/gpu/drm/msm/adreno/adreno_gpu.h int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
msm_gpu           222 drivers/gpu/drm/msm/adreno/adreno_gpu.h struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu,
msm_gpu           224 drivers/gpu/drm/msm/adreno/adreno_gpu.h int adreno_hw_init(struct msm_gpu *gpu);
msm_gpu           225 drivers/gpu/drm/msm/adreno/adreno_gpu.h void adreno_recover(struct msm_gpu *gpu);
msm_gpu           226 drivers/gpu/drm/msm/adreno/adreno_gpu.h void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
msm_gpu           228 drivers/gpu/drm/msm/adreno/adreno_gpu.h void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
msm_gpu           229 drivers/gpu/drm/msm/adreno/adreno_gpu.h bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
msm_gpu           231 drivers/gpu/drm/msm/adreno/adreno_gpu.h void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
msm_gpu           234 drivers/gpu/drm/msm/adreno/adreno_gpu.h void adreno_dump_info(struct msm_gpu *gpu);
msm_gpu           235 drivers/gpu/drm/msm/adreno/adreno_gpu.h void adreno_dump(struct msm_gpu *gpu);
msm_gpu           237 drivers/gpu/drm/msm/adreno/adreno_gpu.h struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu);
msm_gpu           247 drivers/gpu/drm/msm/adreno/adreno_gpu.h int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state);
msm_gpu           254 drivers/gpu/drm/msm/adreno/adreno_gpu.h int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid);
msm_gpu           353 drivers/gpu/drm/msm/adreno/adreno_gpu.h struct msm_gpu *a2xx_gpu_init(struct drm_device *dev);
msm_gpu           354 drivers/gpu/drm/msm/adreno/adreno_gpu.h struct msm_gpu *a3xx_gpu_init(struct drm_device *dev);
msm_gpu           355 drivers/gpu/drm/msm/adreno/adreno_gpu.h struct msm_gpu *a4xx_gpu_init(struct drm_device *dev);
msm_gpu           356 drivers/gpu/drm/msm/adreno/adreno_gpu.h struct msm_gpu *a5xx_gpu_init(struct drm_device *dev);
msm_gpu           357 drivers/gpu/drm/msm/adreno/adreno_gpu.h struct msm_gpu *a6xx_gpu_init(struct drm_device *dev);
msm_gpu            29 drivers/gpu/drm/msm/msm_debugfs.c 	struct msm_gpu *gpu = priv->gpu;
msm_gpu            49 drivers/gpu/drm/msm/msm_debugfs.c 	struct msm_gpu *gpu = priv->gpu;
msm_gpu            64 drivers/gpu/drm/msm/msm_debugfs.c 	struct msm_gpu *gpu = priv->gpu;
msm_gpu           114 drivers/gpu/drm/msm/msm_debugfs.c 	struct msm_gpu *gpu = priv->gpu;
msm_gpu           700 drivers/gpu/drm/msm/msm_drv.c 	struct msm_gpu *gpu;
msm_gpu           876 drivers/gpu/drm/msm/msm_drv.c 	struct msm_gpu *gpu = priv->gpu;
msm_gpu            37 drivers/gpu/drm/msm/msm_drv.h struct msm_gpu;
msm_gpu           163 drivers/gpu/drm/msm/msm_drv.h 	struct msm_gpu *gpu;
msm_gpu           254 drivers/gpu/drm/msm/msm_drv.h msm_gem_address_space_create_a2xx(struct device *dev, struct msm_gpu *gpu,
msm_gpu           303 drivers/gpu/drm/msm/msm_drv.h 		struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence);
msm_gpu           737 drivers/gpu/drm/msm/msm_gem.c 		struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence)
msm_gpu            61 drivers/gpu/drm/msm/msm_gem.h 	struct msm_gpu *gpu;     /* non-null if active */
msm_gpu           132 drivers/gpu/drm/msm/msm_gem.h 	struct msm_gpu *gpu;
msm_gpu            28 drivers/gpu/drm/msm/msm_gem_submit.c 		struct msm_gpu *gpu, struct msm_gem_address_space *aspace,
msm_gpu           405 drivers/gpu/drm/msm/msm_gem_submit.c 	struct msm_gpu *gpu = priv->gpu;
msm_gpu           154 drivers/gpu/drm/msm/msm_gem_vma.c msm_gem_address_space_create_a2xx(struct device *dev, struct msm_gpu *gpu,
msm_gpu            28 drivers/gpu/drm/msm/msm_gpu.c 	struct msm_gpu *gpu = platform_get_drvdata(to_platform_device(dev));
msm_gpu            49 drivers/gpu/drm/msm/msm_gpu.c 	struct msm_gpu *gpu = platform_get_drvdata(to_platform_device(dev));
msm_gpu            68 drivers/gpu/drm/msm/msm_gpu.c 	struct msm_gpu *gpu = platform_get_drvdata(to_platform_device(dev));
msm_gpu            85 drivers/gpu/drm/msm/msm_gpu.c static void msm_devfreq_init(struct msm_gpu *gpu)
msm_gpu           110 drivers/gpu/drm/msm/msm_gpu.c static int enable_pwrrail(struct msm_gpu *gpu)
msm_gpu           134 drivers/gpu/drm/msm/msm_gpu.c static int disable_pwrrail(struct msm_gpu *gpu)
msm_gpu           143 drivers/gpu/drm/msm/msm_gpu.c static int enable_clk(struct msm_gpu *gpu)
msm_gpu           155 drivers/gpu/drm/msm/msm_gpu.c static int disable_clk(struct msm_gpu *gpu)
msm_gpu           173 drivers/gpu/drm/msm/msm_gpu.c static int enable_axi(struct msm_gpu *gpu)
msm_gpu           180 drivers/gpu/drm/msm/msm_gpu.c static int disable_axi(struct msm_gpu *gpu)
msm_gpu           187 drivers/gpu/drm/msm/msm_gpu.c void msm_gpu_resume_devfreq(struct msm_gpu *gpu)
msm_gpu           195 drivers/gpu/drm/msm/msm_gpu.c int msm_gpu_pm_resume(struct msm_gpu *gpu)
msm_gpu           220 drivers/gpu/drm/msm/msm_gpu.c int msm_gpu_pm_suspend(struct msm_gpu *gpu)
msm_gpu           243 drivers/gpu/drm/msm/msm_gpu.c int msm_gpu_hw_init(struct msm_gpu *gpu)
msm_gpu           265 drivers/gpu/drm/msm/msm_gpu.c 	struct msm_gpu *gpu = data;
msm_gpu           300 drivers/gpu/drm/msm/msm_gpu.c 	struct msm_gpu *gpu = data;
msm_gpu           336 drivers/gpu/drm/msm/msm_gpu.c static void msm_gpu_crashstate_capture(struct msm_gpu *gpu,
msm_gpu           379 drivers/gpu/drm/msm/msm_gpu.c static void msm_gpu_crashstate_capture(struct msm_gpu *gpu,
msm_gpu           389 drivers/gpu/drm/msm/msm_gpu.c static void update_fences(struct msm_gpu *gpu, struct msm_ringbuffer *ring,
msm_gpu           417 drivers/gpu/drm/msm/msm_gpu.c static void retire_submits(struct msm_gpu *gpu);
msm_gpu           421 drivers/gpu/drm/msm/msm_gpu.c 	struct msm_gpu *gpu = container_of(work, struct msm_gpu, recover_work);
msm_gpu           511 drivers/gpu/drm/msm/msm_gpu.c static void hangcheck_timer_reset(struct msm_gpu *gpu)
msm_gpu           520 drivers/gpu/drm/msm/msm_gpu.c 	struct msm_gpu *gpu = from_timer(gpu, t, hangcheck_timer);
msm_gpu           555 drivers/gpu/drm/msm/msm_gpu.c static int update_hw_cntrs(struct msm_gpu *gpu, uint32_t ncntrs, uint32_t *cntrs)
msm_gpu           575 drivers/gpu/drm/msm/msm_gpu.c static void update_sw_cntrs(struct msm_gpu *gpu)
msm_gpu           599 drivers/gpu/drm/msm/msm_gpu.c void msm_gpu_perfcntr_start(struct msm_gpu *gpu)
msm_gpu           615 drivers/gpu/drm/msm/msm_gpu.c void msm_gpu_perfcntr_stop(struct msm_gpu *gpu)
msm_gpu           622 drivers/gpu/drm/msm/msm_gpu.c int msm_gpu_perfcntr_sample(struct msm_gpu *gpu, uint32_t *activetime,
msm_gpu           652 drivers/gpu/drm/msm/msm_gpu.c static void retire_submit(struct msm_gpu *gpu, struct msm_ringbuffer *ring,
msm_gpu           687 drivers/gpu/drm/msm/msm_gpu.c static void retire_submits(struct msm_gpu *gpu)
msm_gpu           708 drivers/gpu/drm/msm/msm_gpu.c 	struct msm_gpu *gpu = container_of(work, struct msm_gpu, retire_work);
msm_gpu           721 drivers/gpu/drm/msm/msm_gpu.c void msm_gpu_retire(struct msm_gpu *gpu)
msm_gpu           729 drivers/gpu/drm/msm/msm_gpu.c void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
msm_gpu           782 drivers/gpu/drm/msm/msm_gpu.c 	struct msm_gpu *gpu = data;
msm_gpu           786 drivers/gpu/drm/msm/msm_gpu.c static int get_clocks(struct platform_device *pdev, struct msm_gpu *gpu)
msm_gpu           807 drivers/gpu/drm/msm/msm_gpu.c msm_gpu_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev,
msm_gpu           852 drivers/gpu/drm/msm/msm_gpu.c 		struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs,
msm_gpu           983 drivers/gpu/drm/msm/msm_gpu.c void msm_gpu_cleanup(struct msm_gpu *gpu)
msm_gpu            44 drivers/gpu/drm/msm/msm_gpu.h 	int (*get_param)(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
msm_gpu            45 drivers/gpu/drm/msm/msm_gpu.h 	int (*hw_init)(struct msm_gpu *gpu);
msm_gpu            46 drivers/gpu/drm/msm/msm_gpu.h 	int (*pm_suspend)(struct msm_gpu *gpu);
msm_gpu            47 drivers/gpu/drm/msm/msm_gpu.h 	int (*pm_resume)(struct msm_gpu *gpu);
msm_gpu            48 drivers/gpu/drm/msm/msm_gpu.h 	void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit,
msm_gpu            50 drivers/gpu/drm/msm/msm_gpu.h 	void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
msm_gpu            51 drivers/gpu/drm/msm/msm_gpu.h 	irqreturn_t (*irq)(struct msm_gpu *irq);
msm_gpu            52 drivers/gpu/drm/msm/msm_gpu.h 	struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu);
msm_gpu            53 drivers/gpu/drm/msm/msm_gpu.h 	void (*recover)(struct msm_gpu *gpu);
msm_gpu            54 drivers/gpu/drm/msm/msm_gpu.h 	void (*destroy)(struct msm_gpu *gpu);
msm_gpu            57 drivers/gpu/drm/msm/msm_gpu.h 	void (*show)(struct msm_gpu *gpu, struct msm_gpu_state *state,
msm_gpu            60 drivers/gpu/drm/msm/msm_gpu.h 	int (*debugfs_init)(struct msm_gpu *gpu, struct drm_minor *minor);
msm_gpu            62 drivers/gpu/drm/msm/msm_gpu.h 	unsigned long (*gpu_busy)(struct msm_gpu *gpu);
msm_gpu            63 drivers/gpu/drm/msm/msm_gpu.h 	struct msm_gpu_state *(*gpu_state_get)(struct msm_gpu *gpu);
msm_gpu            65 drivers/gpu/drm/msm/msm_gpu.h 	unsigned long (*gpu_get_freq)(struct msm_gpu *gpu);
msm_gpu            66 drivers/gpu/drm/msm/msm_gpu.h 	void (*gpu_set_freq)(struct msm_gpu *gpu, unsigned long freq);
msm_gpu           144 drivers/gpu/drm/msm/msm_gpu.h static inline bool msm_gpu_active(struct msm_gpu *gpu)
msm_gpu           214 drivers/gpu/drm/msm/msm_gpu.h static inline void gpu_write(struct msm_gpu *gpu, u32 reg, u32 data)
msm_gpu           219 drivers/gpu/drm/msm/msm_gpu.h static inline u32 gpu_read(struct msm_gpu *gpu, u32 reg)
msm_gpu           224 drivers/gpu/drm/msm/msm_gpu.h static inline void gpu_rmw(struct msm_gpu *gpu, u32 reg, u32 mask, u32 or)
msm_gpu           232 drivers/gpu/drm/msm/msm_gpu.h static inline u64 gpu_read64(struct msm_gpu *gpu, u32 lo, u32 hi)
msm_gpu           256 drivers/gpu/drm/msm/msm_gpu.h static inline void gpu_write64(struct msm_gpu *gpu, u32 lo, u32 hi, u64 val)
msm_gpu           263 drivers/gpu/drm/msm/msm_gpu.h int msm_gpu_pm_suspend(struct msm_gpu *gpu);
msm_gpu           264 drivers/gpu/drm/msm/msm_gpu.h int msm_gpu_pm_resume(struct msm_gpu *gpu);
msm_gpu           265 drivers/gpu/drm/msm/msm_gpu.h void msm_gpu_resume_devfreq(struct msm_gpu *gpu);
msm_gpu           267 drivers/gpu/drm/msm/msm_gpu.h int msm_gpu_hw_init(struct msm_gpu *gpu);
msm_gpu           269 drivers/gpu/drm/msm/msm_gpu.h void msm_gpu_perfcntr_start(struct msm_gpu *gpu);
msm_gpu           270 drivers/gpu/drm/msm/msm_gpu.h void msm_gpu_perfcntr_stop(struct msm_gpu *gpu);
msm_gpu           271 drivers/gpu/drm/msm/msm_gpu.h int msm_gpu_perfcntr_sample(struct msm_gpu *gpu, uint32_t *activetime,
msm_gpu           274 drivers/gpu/drm/msm/msm_gpu.h void msm_gpu_retire(struct msm_gpu *gpu);
msm_gpu           275 drivers/gpu/drm/msm/msm_gpu.h void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
msm_gpu           279 drivers/gpu/drm/msm/msm_gpu.h 		struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs,
msm_gpu           282 drivers/gpu/drm/msm/msm_gpu.h void msm_gpu_cleanup(struct msm_gpu *gpu);
msm_gpu           284 drivers/gpu/drm/msm/msm_gpu.h struct msm_gpu *adreno_load_gpu(struct drm_device *dev);
msm_gpu           294 drivers/gpu/drm/msm/msm_gpu.h static inline struct msm_gpu_state *msm_gpu_crashstate_get(struct msm_gpu *gpu)
msm_gpu           310 drivers/gpu/drm/msm/msm_gpu.h static inline void msm_gpu_crashstate_put(struct msm_gpu *gpu)
msm_gpu            13 drivers/gpu/drm/msm/msm_gpummu.c 	struct msm_gpu *gpu;
msm_gpu            97 drivers/gpu/drm/msm/msm_gpummu.c struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu)
msm_gpu            36 drivers/gpu/drm/msm/msm_mmu.h struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu);
msm_gpu            61 drivers/gpu/drm/msm/msm_perf.c 	struct msm_gpu *gpu = priv->gpu;
msm_gpu           155 drivers/gpu/drm/msm/msm_perf.c 	struct msm_gpu *gpu = priv->gpu;
msm_gpu           179 drivers/gpu/drm/msm/msm_rd.c 	struct msm_gpu *gpu = priv->gpu;
msm_gpu            10 drivers/gpu/drm/msm/msm_ringbuffer.c struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
msm_gpu            37 drivers/gpu/drm/msm/msm_ringbuffer.h 	struct msm_gpu *gpu;
msm_gpu            51 drivers/gpu/drm/msm/msm_ringbuffer.h struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,