CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 610 arch/mips/cavium-octeon/setup.c #if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0 CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 627 arch/mips/cavium-octeon/setup.c CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 628 arch/mips/cavium-octeon/setup.c CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE * 128); CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 33 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h ori v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 73 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h dli v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 209 arch/mips/include/asm/processor.h unsigned long cvmseg[CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE] CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 32 arch/mips/kernel/octeon_switch.S #if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0 CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 119 arch/mips/mm/tlbex.c #if defined(CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE) && \ CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 120 arch/mips/mm/tlbex.c CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0 CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 132 arch/mips/mm/tlbex.c return CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE * 128 - (8 * i) - 32768; CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 30 drivers/staging/octeon/ethernet-defines.h #define USE_ASYNC_IOBDMA (CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0)