mpll_cfg           53 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c static struct mpll_cfg dcn2_mpll_cfg[] = {
mpll_cfg          223 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c 		cfg->mpll_cfg = dcn2_mpll_cfg[0];
mpll_cfg          226 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c 		cfg->mpll_cfg = dcn2_mpll_cfg[1];
mpll_cfg          229 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c 		cfg->mpll_cfg = dcn2_mpll_cfg[2];
mpll_cfg          232 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c 		cfg->mpll_cfg = dcn2_mpll_cfg[3];
mpll_cfg          101 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h 	struct mpll_cfg mpll_cfg;
mpll_cfg         1374 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c 	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
mpll_cfg          177 drivers/gpu/drm/imx/dw_hdmi-imx.c 	.mpll_cfg   = imx_mpll_cfg,
mpll_cfg          184 drivers/gpu/drm/imx/dw_hdmi-imx.c 	.mpll_cfg = imx_mpll_cfg,
mpll_cfg          225 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 	const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg;
mpll_cfg          230 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 	for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) {
mpll_cfg          231 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 		if (pclk == mpll_cfg[i].mpixelclock) {
mpll_cfg          409 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 	.mpll_cfg = rockchip_mpll_cfg,
mpll_cfg          426 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 	.mpll_cfg   = rockchip_mpll_cfg,
mpll_cfg          446 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 	.mpll_cfg = rockchip_mpll_cfg,
mpll_cfg          463 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 	.mpll_cfg   = rockchip_mpll_cfg,
mpll_cfg          156 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h 	const struct dw_hdmi_mpll_config *mpll_cfg;
mpll_cfg          530 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 		plat_data->mpll_cfg = variant->mpll_cfg;
mpll_cfg          578 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 	.mpll_cfg = sun50i_h6_mpll_cfg,
mpll_cfg          137 include/drm/bridge/dw_hdmi.h 	const struct dw_hdmi_mpll_config *mpll_cfg;