mpic 320 arch/powerpc/include/asm/kvm_host.h struct openpic *mpic; mpic 771 arch/powerpc/include/asm/kvm_host.h struct openpic *mpic; /* KVM_IRQ_MPIC */ mpic 332 arch/powerpc/include/asm/mpic.h struct mpic *next; mpic 427 arch/powerpc/include/asm/mpic.h extern struct mpic *mpic_alloc(struct device_node *node, mpic 440 arch/powerpc/include/asm/mpic.h extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, mpic 447 arch/powerpc/include/asm/mpic.h extern void mpic_init(struct mpic *mpic); mpic 488 arch/powerpc/include/asm/mpic.h extern unsigned int mpic_get_one_irq(struct mpic *mpic); mpic 2865 arch/powerpc/kernel/prom_init.c phandle u3, i2c, mpic; mpic 2877 arch/powerpc/kernel/prom_init.c mpic = call_prom("finddevice", 1, 1, ADDR("/u3@0,f8000000/mpic@f8040000")); mpic 2878 arch/powerpc/kernel/prom_init.c if (!PHANDLE_VALID(mpic)) mpic 2898 arch/powerpc/kernel/prom_init.c parent = (u32)mpic; mpic 12 arch/powerpc/kvm/irq.h ret = ret || (kvm->arch.mpic != NULL); mpic 1179 arch/powerpc/kvm/mpic.c struct openpic *opp = vcpu->arch.mpic; mpic 1636 arch/powerpc/kvm/mpic.c dev->kvm->arch.mpic = NULL; mpic 1662 arch/powerpc/kvm/mpic.c if (dev->kvm->arch.mpic) mpic 1715 arch/powerpc/kvm/mpic.c dev->kvm->arch.mpic = opp; mpic 1760 arch/powerpc/kvm/mpic.c vcpu->arch.mpic = opp; mpic 1796 arch/powerpc/kvm/mpic.c struct openpic *opp = kvm->arch.mpic; mpic 1810 arch/powerpc/kvm/mpic.c struct openpic *opp = kvm->arch.mpic; mpic 1819 arch/powerpc/kvm/mpic.c openpic_msi_write(kvm->arch.mpic, MSIIR_OFFSET, e->msi.data); mpic 743 arch/powerpc/kvm/powerpc.c kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu); mpic 1989 arch/powerpc/kvm/powerpc.c if (kvm->arch.mpic) mpic 70 arch/powerpc/platforms/44x/iss4xx.c struct mpic *mpic = mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC "); mpic 71 arch/powerpc/platforms/44x/iss4xx.c BUG_ON(mpic == NULL); mpic 72 arch/powerpc/platforms/44x/iss4xx.c mpic_init(mpic); mpic 137 arch/powerpc/platforms/44x/ppc476.c struct mpic *mpic = mpic 139 arch/powerpc/platforms/44x/ppc476.c BUG_ON(mpic == NULL); mpic 140 arch/powerpc/platforms/44x/ppc476.c mpic_init(mpic); mpic 24 arch/powerpc/platforms/85xx/bsc913x_qds.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic 28 arch/powerpc/platforms/85xx/bsc913x_qds.c if (!mpic) mpic 31 arch/powerpc/platforms/85xx/bsc913x_qds.c mpic_init(mpic); mpic 20 arch/powerpc/platforms/85xx/bsc913x_rdb.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic 24 arch/powerpc/platforms/85xx/bsc913x_rdb.c if (!mpic) mpic 27 arch/powerpc/platforms/85xx/bsc913x_rdb.c mpic_init(mpic); mpic 24 arch/powerpc/platforms/85xx/c293pcie.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic 27 arch/powerpc/platforms/85xx/c293pcie.c BUG_ON(mpic == NULL); mpic 29 arch/powerpc/platforms/85xx/c293pcie.c mpic_init(mpic); mpic 37 arch/powerpc/platforms/85xx/corenet_generic.c struct mpic *mpic; mpic 46 arch/powerpc/platforms/85xx/corenet_generic.c mpic = mpic_alloc(NULL, 0, flags, 0, 512, " OpenPIC "); mpic 47 arch/powerpc/platforms/85xx/corenet_generic.c BUG_ON(mpic == NULL); mpic 49 arch/powerpc/platforms/85xx/corenet_generic.c mpic_init(mpic); mpic 43 arch/powerpc/platforms/85xx/ge_imp3a.c struct mpic *mpic; mpic 48 arch/powerpc/platforms/85xx/ge_imp3a.c mpic = mpic_alloc(NULL, 0, mpic 54 arch/powerpc/platforms/85xx/ge_imp3a.c mpic = mpic_alloc(NULL, 0, mpic 60 arch/powerpc/platforms/85xx/ge_imp3a.c BUG_ON(mpic == NULL); mpic 61 arch/powerpc/platforms/85xx/ge_imp3a.c mpic_init(mpic); mpic 59 arch/powerpc/platforms/85xx/ksi8560.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN, mpic 61 arch/powerpc/platforms/85xx/ksi8560.c BUG_ON(mpic == NULL); mpic 62 arch/powerpc/platforms/85xx/ksi8560.c mpic_init(mpic); mpic 33 arch/powerpc/platforms/85xx/mpc8536_ds.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN, mpic 35 arch/powerpc/platforms/85xx/mpc8536_ds.c BUG_ON(mpic == NULL); mpic 36 arch/powerpc/platforms/85xx/mpc8536_ds.c mpic_init(mpic); mpic 37 arch/powerpc/platforms/85xx/mpc85xx_ads.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN, mpic 39 arch/powerpc/platforms/85xx/mpc85xx_ads.c BUG_ON(mpic == NULL); mpic 40 arch/powerpc/platforms/85xx/mpc85xx_ads.c mpic_init(mpic); mpic 232 arch/powerpc/platforms/85xx/mpc85xx_cds.c struct mpic *mpic; mpic 233 arch/powerpc/platforms/85xx/mpc85xx_cds.c mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN, mpic 235 arch/powerpc/platforms/85xx/mpc85xx_cds.c BUG_ON(mpic == NULL); mpic 236 arch/powerpc/platforms/85xx/mpc85xx_cds.c mpic_init(mpic); mpic 59 arch/powerpc/platforms/85xx/mpc85xx_ds.c struct mpic *mpic; mpic 66 arch/powerpc/platforms/85xx/mpc85xx_ds.c mpic = mpic_alloc(NULL, 0, mpic 72 arch/powerpc/platforms/85xx/mpc85xx_ds.c mpic = mpic_alloc(NULL, 0, mpic 78 arch/powerpc/platforms/85xx/mpc85xx_ds.c BUG_ON(mpic == NULL); mpic 79 arch/powerpc/platforms/85xx/mpc85xx_ds.c mpic_init(mpic); mpic 368 arch/powerpc/platforms/85xx/mpc85xx_mds.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic 371 arch/powerpc/platforms/85xx/mpc85xx_mds.c BUG_ON(mpic == NULL); mpic 373 arch/powerpc/platforms/85xx/mpc85xx_mds.c mpic_init(mpic); mpic 45 arch/powerpc/platforms/85xx/mpc85xx_rdb.c struct mpic *mpic; mpic 52 arch/powerpc/platforms/85xx/mpc85xx_rdb.c mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET | mpic 57 arch/powerpc/platforms/85xx/mpc85xx_rdb.c mpic = mpic_alloc(NULL, 0, mpic 63 arch/powerpc/platforms/85xx/mpc85xx_rdb.c BUG_ON(mpic == NULL); mpic 64 arch/powerpc/platforms/85xx/mpc85xx_rdb.c mpic_init(mpic); mpic 26 arch/powerpc/platforms/85xx/mvme2500.c struct mpic *mpic = mpic_alloc(NULL, 0, mpic 29 arch/powerpc/platforms/85xx/mvme2500.c BUG_ON(mpic == NULL); mpic 30 arch/powerpc/platforms/85xx/mvme2500.c mpic_init(mpic); mpic 30 arch/powerpc/platforms/85xx/p1010rdb.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic 34 arch/powerpc/platforms/85xx/p1010rdb.c BUG_ON(mpic == NULL); mpic 36 arch/powerpc/platforms/85xx/p1010rdb.c mpic_init(mpic); mpic 436 arch/powerpc/platforms/85xx/p1022_ds.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic 439 arch/powerpc/platforms/85xx/p1022_ds.c BUG_ON(mpic == NULL); mpic 440 arch/powerpc/platforms/85xx/p1022_ds.c mpic_init(mpic); mpic 100 arch/powerpc/platforms/85xx/p1022_rdk.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic 103 arch/powerpc/platforms/85xx/p1022_rdk.c BUG_ON(mpic == NULL); mpic 104 arch/powerpc/platforms/85xx/p1022_rdk.c mpic_init(mpic); mpic 88 arch/powerpc/platforms/85xx/p1023_rdb.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic 92 arch/powerpc/platforms/85xx/p1023_rdb.c BUG_ON(mpic == NULL); mpic 94 arch/powerpc/platforms/85xx/p1023_rdb.c mpic_init(mpic); mpic 29 arch/powerpc/platforms/85xx/ppa8548.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN, mpic 31 arch/powerpc/platforms/85xx/ppa8548.c BUG_ON(mpic == NULL); mpic 32 arch/powerpc/platforms/85xx/ppa8548.c mpic_init(mpic); mpic 29 arch/powerpc/platforms/85xx/qemu_e500.c struct mpic *mpic; mpic 33 arch/powerpc/platforms/85xx/qemu_e500.c mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC "); mpic 35 arch/powerpc/platforms/85xx/qemu_e500.c BUG_ON(mpic == NULL); mpic 36 arch/powerpc/platforms/85xx/qemu_e500.c mpic_init(mpic); mpic 51 arch/powerpc/platforms/85xx/sbc8548.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN, mpic 53 arch/powerpc/platforms/85xx/sbc8548.c BUG_ON(mpic == NULL); mpic 54 arch/powerpc/platforms/85xx/sbc8548.c mpic_init(mpic); mpic 46 arch/powerpc/platforms/85xx/socrates.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN, mpic 48 arch/powerpc/platforms/85xx/socrates.c BUG_ON(mpic == NULL); mpic 49 arch/powerpc/platforms/85xx/socrates.c mpic_init(mpic); mpic 46 arch/powerpc/platforms/85xx/stx_gp3.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN, mpic 48 arch/powerpc/platforms/85xx/stx_gp3.c BUG_ON(mpic == NULL); mpic 49 arch/powerpc/platforms/85xx/stx_gp3.c mpic_init(mpic); mpic 44 arch/powerpc/platforms/85xx/tqm85xx.c struct mpic *mpic = mpic_alloc(NULL, 0, mpic 47 arch/powerpc/platforms/85xx/tqm85xx.c BUG_ON(mpic == NULL); mpic 48 arch/powerpc/platforms/85xx/tqm85xx.c mpic_init(mpic); mpic 32 arch/powerpc/platforms/85xx/twr_p102x.c struct mpic *mpic; mpic 38 arch/powerpc/platforms/85xx/twr_p102x.c mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic 42 arch/powerpc/platforms/85xx/twr_p102x.c BUG_ON(mpic == NULL); mpic 43 arch/powerpc/platforms/85xx/twr_p102x.c mpic_init(mpic); mpic 42 arch/powerpc/platforms/85xx/xes_mpc85xx.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN, mpic 44 arch/powerpc/platforms/85xx/xes_mpc85xx.c BUG_ON(mpic == NULL); mpic 45 arch/powerpc/platforms/85xx/xes_mpc85xx.c mpic_init(mpic); mpic 36 arch/powerpc/platforms/86xx/pic.c struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic 39 arch/powerpc/platforms/86xx/pic.c BUG_ON(mpic == NULL); mpic 41 arch/powerpc/platforms/86xx/pic.c mpic_init(mpic); mpic 188 arch/powerpc/platforms/cell/setup.c struct mpic *mpic; mpic 197 arch/powerpc/platforms/cell/setup.c mpic = mpic_alloc(dn, 0, MPIC_SECONDARY | MPIC_NO_RESET, mpic 199 arch/powerpc/platforms/cell/setup.c if (mpic == NULL) mpic 201 arch/powerpc/platforms/cell/setup.c mpic_init(mpic); mpic 59 arch/powerpc/platforms/chrp/setup.c static struct mpic *chrp_mpic; mpic 147 arch/powerpc/platforms/embedded6xx/holly.c struct mpic *mpic; mpic 154 arch/powerpc/platforms/embedded6xx/holly.c mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic 159 arch/powerpc/platforms/embedded6xx/holly.c BUG_ON(mpic == NULL); mpic 161 arch/powerpc/platforms/embedded6xx/holly.c mpic_assign_isu(mpic, 0, mpic->paddr + 0x100); mpic 163 arch/powerpc/platforms/embedded6xx/holly.c mpic_init(mpic); mpic 181 arch/powerpc/platforms/embedded6xx/holly.c irq_set_handler_data(cascade_pci_irq, mpic); mpic 83 arch/powerpc/platforms/embedded6xx/linkstation.c struct mpic *mpic; mpic 85 arch/powerpc/platforms/embedded6xx/linkstation.c mpic = mpic_alloc(NULL, 0, 0, 4, 0, " EPIC "); mpic 86 arch/powerpc/platforms/embedded6xx/linkstation.c BUG_ON(mpic == NULL); mpic 89 arch/powerpc/platforms/embedded6xx/linkstation.c mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200); mpic 92 arch/powerpc/platforms/embedded6xx/linkstation.c mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000); mpic 95 arch/powerpc/platforms/embedded6xx/linkstation.c mpic_assign_isu(mpic, 2, mpic->paddr + 0x11100); mpic 97 arch/powerpc/platforms/embedded6xx/linkstation.c mpic_init(mpic); mpic 99 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c struct mpic *mpic; mpic 106 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | mpic 111 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c BUG_ON(mpic == NULL); mpic 113 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c mpic_assign_isu(mpic, 0, mpic->paddr + 0x100); mpic 115 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c mpic_init(mpic); mpic 133 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c irq_set_handler_data(cascade_pci_irq, mpic); mpic 53 arch/powerpc/platforms/embedded6xx/mvme5100.c struct mpic *mpic; mpic 66 arch/powerpc/platforms/embedded6xx/mvme5100.c mpic = mpic_alloc(np, pci_membase, 0, 16, 256, " OpenPIC "); mpic 68 arch/powerpc/platforms/embedded6xx/mvme5100.c BUG_ON(mpic == NULL); mpic 71 arch/powerpc/platforms/embedded6xx/mvme5100.c mpic_assign_isu(mpic, 0, pci_membase + 0x10000); mpic 73 arch/powerpc/platforms/embedded6xx/mvme5100.c mpic_init(mpic); mpic 84 arch/powerpc/platforms/embedded6xx/storcenter.c struct mpic *mpic; mpic 86 arch/powerpc/platforms/embedded6xx/storcenter.c mpic = mpic_alloc(NULL, 0, 0, 16, 0, " OpenPIC "); mpic 87 arch/powerpc/platforms/embedded6xx/storcenter.c BUG_ON(mpic == NULL); mpic 93 arch/powerpc/platforms/embedded6xx/storcenter.c mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200); mpic 94 arch/powerpc/platforms/embedded6xx/storcenter.c mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000); mpic 96 arch/powerpc/platforms/embedded6xx/storcenter.c mpic_init(mpic); mpic 207 arch/powerpc/platforms/maple/setup.c struct mpic *mpic; mpic 257 arch/powerpc/platforms/maple/setup.c mpic = mpic_alloc(mpic_node, openpic_addr, flags, mpic 259 arch/powerpc/platforms/maple/setup.c BUG_ON(mpic == NULL); mpic 265 arch/powerpc/platforms/maple/setup.c mpic_assign_isu(mpic, n, isuaddr); mpic 269 arch/powerpc/platforms/maple/setup.c mpic_init(mpic); mpic 31 arch/powerpc/platforms/pasemi/msi.c static struct mpic *msi_mpic; mpic 138 arch/powerpc/platforms/pasemi/msi.c int mpic_pasemi_msi_init(struct mpic *mpic) mpic 144 arch/powerpc/platforms/pasemi/msi.c of_node = irq_domain_get_of_node(mpic->irqhost); mpic 150 arch/powerpc/platforms/pasemi/msi.c rc = mpic_msi_init_allocator(mpic); mpic 158 arch/powerpc/platforms/pasemi/msi.c msi_mpic = mpic; mpic 221 arch/powerpc/platforms/pasemi/setup.c static void nemo_init_IRQ(struct mpic *mpic) mpic 235 arch/powerpc/platforms/pasemi/setup.c irq_set_default_host(mpic->irqhost); mpic 240 arch/powerpc/platforms/pasemi/setup.c static inline void nemo_init_IRQ(struct mpic *mpic) mpic 254 arch/powerpc/platforms/pasemi/setup.c struct mpic *mpic; mpic 291 arch/powerpc/platforms/pasemi/setup.c mpic = mpic_alloc(mpic_node, openpic_addr, mpic 293 arch/powerpc/platforms/pasemi/setup.c BUG_ON(!mpic); mpic 295 arch/powerpc/platforms/pasemi/setup.c mpic_assign_isu(mpic, 0, mpic->paddr + 0x10000); mpic 296 arch/powerpc/platforms/pasemi/setup.c mpic_init(mpic); mpic 305 arch/powerpc/platforms/pasemi/setup.c nemo_init_IRQ(mpic); mpic 433 arch/powerpc/platforms/powermac/pic.c static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic) mpic 451 arch/powerpc/platforms/powermac/pic.c static struct mpic * __init pmac_setup_one_mpic(struct device_node *np, mpic 455 arch/powerpc/platforms/powermac/pic.c struct mpic *mpic; mpic 469 arch/powerpc/platforms/powermac/pic.c mpic = mpic_alloc(np, 0, flags, 0, 0, name); mpic 470 arch/powerpc/platforms/powermac/pic.c if (mpic == NULL) mpic 473 arch/powerpc/platforms/powermac/pic.c mpic_init(mpic); mpic 475 arch/powerpc/platforms/powermac/pic.c return mpic; mpic 480 arch/powerpc/platforms/powermac/pic.c struct mpic *mpic1, *mpic2; mpic 35 arch/powerpc/sysdev/fsl_mpic_err.c struct mpic *mpic = irq_data_get_irq_chip_data(d); mpic 36 arch/powerpc/sysdev/fsl_mpic_err.c unsigned int src = virq_to_hw(d->irq) - mpic->err_int_vecs[0]; mpic 38 arch/powerpc/sysdev/fsl_mpic_err.c eimr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR); mpic 40 arch/powerpc/sysdev/fsl_mpic_err.c mpic_fsl_err_write(mpic->err_regs, eimr); mpic 46 arch/powerpc/sysdev/fsl_mpic_err.c struct mpic *mpic = irq_data_get_irq_chip_data(d); mpic 47 arch/powerpc/sysdev/fsl_mpic_err.c unsigned int src = virq_to_hw(d->irq) - mpic->err_int_vecs[0]; mpic 49 arch/powerpc/sysdev/fsl_mpic_err.c eimr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR); mpic 51 arch/powerpc/sysdev/fsl_mpic_err.c mpic_fsl_err_write(mpic->err_regs, eimr); mpic 60 arch/powerpc/sysdev/fsl_mpic_err.c int mpic_setup_error_int(struct mpic *mpic, int intvec) mpic 64 arch/powerpc/sysdev/fsl_mpic_err.c mpic->err_regs = ioremap(mpic->paddr + MPIC_ERR_INT_BASE, 0x1000); mpic 65 arch/powerpc/sysdev/fsl_mpic_err.c if (!mpic->err_regs) { mpic 69 arch/powerpc/sysdev/fsl_mpic_err.c mpic->hc_err = fsl_mpic_err_chip; mpic 70 arch/powerpc/sysdev/fsl_mpic_err.c mpic->hc_err.name = mpic->name; mpic 71 arch/powerpc/sysdev/fsl_mpic_err.c mpic->flags |= MPIC_FSL_HAS_EIMR; mpic 74 arch/powerpc/sysdev/fsl_mpic_err.c mpic->err_int_vecs[i] = intvec--; mpic 79 arch/powerpc/sysdev/fsl_mpic_err.c int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw) mpic 81 arch/powerpc/sysdev/fsl_mpic_err.c if ((mpic->flags & MPIC_FSL_HAS_EIMR) && mpic 82 arch/powerpc/sysdev/fsl_mpic_err.c (hw >= mpic->err_int_vecs[0] && mpic 83 arch/powerpc/sysdev/fsl_mpic_err.c hw <= mpic->err_int_vecs[MPIC_MAX_ERR - 1])) { mpic 84 arch/powerpc/sysdev/fsl_mpic_err.c WARN_ON(mpic->flags & MPIC_SECONDARY); mpic 87 arch/powerpc/sysdev/fsl_mpic_err.c irq_set_chip_data(virq, mpic); mpic 88 arch/powerpc/sysdev/fsl_mpic_err.c irq_set_chip_and_handler(virq, &mpic->hc_err, mpic 98 arch/powerpc/sysdev/fsl_mpic_err.c struct mpic *mpic = (struct mpic *) data; mpic 103 arch/powerpc/sysdev/fsl_mpic_err.c eisr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EISR); mpic 104 arch/powerpc/sysdev/fsl_mpic_err.c eimr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR); mpic 111 arch/powerpc/sysdev/fsl_mpic_err.c cascade_irq = irq_linear_revmap(mpic->irqhost, mpic 112 arch/powerpc/sysdev/fsl_mpic_err.c mpic->err_int_vecs[errint]); mpic 118 arch/powerpc/sysdev/fsl_mpic_err.c mpic_fsl_err_write(mpic->err_regs, eimr); mpic 126 arch/powerpc/sysdev/fsl_mpic_err.c void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum) mpic 131 arch/powerpc/sysdev/fsl_mpic_err.c virq = irq_create_mapping(mpic->irqhost, irqnum); mpic 138 arch/powerpc/sysdev/fsl_mpic_err.c mpic_fsl_err_write(mpic->err_regs, ~0); mpic 141 arch/powerpc/sysdev/fsl_mpic_err.c "mpic-error-int", mpic); mpic 56 arch/powerpc/sysdev/mpic.c static struct mpic *mpics; mpic 57 arch/powerpc/sysdev/mpic.c static struct mpic *mpic_primary; mpic 150 arch/powerpc/sysdev/mpic.c #define MPIC_INFO(name) mpic->hw_set[MPIC_IDX_##name] mpic 158 arch/powerpc/sysdev/mpic.c static inline unsigned int mpic_processor_id(struct mpic *mpic) mpic 162 arch/powerpc/sysdev/mpic.c if (!(mpic->flags & MPIC_SECONDARY)) mpic 210 arch/powerpc/sysdev/mpic.c static inline u32 _mpic_ipi_read(struct mpic *mpic, unsigned int ipi) mpic 212 arch/powerpc/sysdev/mpic.c enum mpic_reg_type type = mpic->reg_type; mpic 216 arch/powerpc/sysdev/mpic.c if ((mpic->flags & MPIC_BROKEN_IPI) && type == mpic_access_mmio_le) mpic 218 arch/powerpc/sysdev/mpic.c return _mpic_read(type, &mpic->gregs, offset); mpic 221 arch/powerpc/sysdev/mpic.c static inline void _mpic_ipi_write(struct mpic *mpic, unsigned int ipi, u32 value) mpic 226 arch/powerpc/sysdev/mpic.c _mpic_write(mpic->reg_type, &mpic->gregs, offset, value); mpic 229 arch/powerpc/sysdev/mpic.c static inline unsigned int mpic_tm_offset(struct mpic *mpic, unsigned int tm) mpic 235 arch/powerpc/sysdev/mpic.c static inline u32 _mpic_tm_read(struct mpic *mpic, unsigned int tm) mpic 237 arch/powerpc/sysdev/mpic.c unsigned int offset = mpic_tm_offset(mpic, tm) + mpic 240 arch/powerpc/sysdev/mpic.c return _mpic_read(mpic->reg_type, &mpic->tmregs, offset); mpic 243 arch/powerpc/sysdev/mpic.c static inline void _mpic_tm_write(struct mpic *mpic, unsigned int tm, u32 value) mpic 245 arch/powerpc/sysdev/mpic.c unsigned int offset = mpic_tm_offset(mpic, tm) + mpic 248 arch/powerpc/sysdev/mpic.c _mpic_write(mpic->reg_type, &mpic->tmregs, offset, value); mpic 251 arch/powerpc/sysdev/mpic.c static inline u32 _mpic_cpu_read(struct mpic *mpic, unsigned int reg) mpic 253 arch/powerpc/sysdev/mpic.c unsigned int cpu = mpic_processor_id(mpic); mpic 255 arch/powerpc/sysdev/mpic.c return _mpic_read(mpic->reg_type, &mpic->cpuregs[cpu], reg); mpic 258 arch/powerpc/sysdev/mpic.c static inline void _mpic_cpu_write(struct mpic *mpic, unsigned int reg, u32 value) mpic 260 arch/powerpc/sysdev/mpic.c unsigned int cpu = mpic_processor_id(mpic); mpic 262 arch/powerpc/sysdev/mpic.c _mpic_write(mpic->reg_type, &mpic->cpuregs[cpu], reg, value); mpic 265 arch/powerpc/sysdev/mpic.c static inline u32 _mpic_irq_read(struct mpic *mpic, unsigned int src_no, unsigned int reg) mpic 267 arch/powerpc/sysdev/mpic.c unsigned int isu = src_no >> mpic->isu_shift; mpic 268 arch/powerpc/sysdev/mpic.c unsigned int idx = src_no & mpic->isu_mask; mpic 271 arch/powerpc/sysdev/mpic.c val = _mpic_read(mpic->reg_type, &mpic->isus[isu], mpic 276 arch/powerpc/sysdev/mpic.c mpic->isu_reg0_shadow[src_no]; mpic 281 arch/powerpc/sysdev/mpic.c static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no, mpic 284 arch/powerpc/sysdev/mpic.c unsigned int isu = src_no >> mpic->isu_shift; mpic 285 arch/powerpc/sysdev/mpic.c unsigned int idx = src_no & mpic->isu_mask; mpic 287 arch/powerpc/sysdev/mpic.c _mpic_write(mpic->reg_type, &mpic->isus[isu], mpic 292 arch/powerpc/sysdev/mpic.c mpic->isu_reg0_shadow[src_no] = mpic 297 arch/powerpc/sysdev/mpic.c #define mpic_read(b,r) _mpic_read(mpic->reg_type,&(b),(r)) mpic 298 arch/powerpc/sysdev/mpic.c #define mpic_write(b,r,v) _mpic_write(mpic->reg_type,&(b),(r),(v)) mpic 299 arch/powerpc/sysdev/mpic.c #define mpic_ipi_read(i) _mpic_ipi_read(mpic,(i)) mpic 300 arch/powerpc/sysdev/mpic.c #define mpic_ipi_write(i,v) _mpic_ipi_write(mpic,(i),(v)) mpic 301 arch/powerpc/sysdev/mpic.c #define mpic_tm_read(i) _mpic_tm_read(mpic,(i)) mpic 302 arch/powerpc/sysdev/mpic.c #define mpic_tm_write(i,v) _mpic_tm_write(mpic,(i),(v)) mpic 303 arch/powerpc/sysdev/mpic.c #define mpic_cpu_read(i) _mpic_cpu_read(mpic,(i)) mpic 304 arch/powerpc/sysdev/mpic.c #define mpic_cpu_write(i,v) _mpic_cpu_write(mpic,(i),(v)) mpic 305 arch/powerpc/sysdev/mpic.c #define mpic_irq_read(s,r) _mpic_irq_read(mpic,(s),(r)) mpic 306 arch/powerpc/sysdev/mpic.c #define mpic_irq_write(s,r,v) _mpic_irq_write(mpic,(s),(r),(v)) mpic 314 arch/powerpc/sysdev/mpic.c static void _mpic_map_mmio(struct mpic *mpic, phys_addr_t phys_addr, mpic 323 arch/powerpc/sysdev/mpic.c static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb, mpic 326 arch/powerpc/sysdev/mpic.c phys_addr_t phys_addr = dcr_resource_start(mpic->node, 0); mpic 327 arch/powerpc/sysdev/mpic.c rb->dhost = dcr_map(mpic->node, phys_addr + offset, size); mpic 331 arch/powerpc/sysdev/mpic.c static inline void mpic_map(struct mpic *mpic, mpic 335 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_USES_DCR) mpic 336 arch/powerpc/sysdev/mpic.c _mpic_map_dcr(mpic, rb, offset, size); mpic 338 arch/powerpc/sysdev/mpic.c _mpic_map_mmio(mpic, phys_addr, rb, offset, size); mpic 349 arch/powerpc/sysdev/mpic.c static void __init mpic_test_broken_ipi(struct mpic *mpic) mpic 353 arch/powerpc/sysdev/mpic.c mpic_write(mpic->gregs, MPIC_INFO(GREG_IPI_VECTOR_PRI_0), MPIC_VECPRI_MASK); mpic 354 arch/powerpc/sysdev/mpic.c r = mpic_read(mpic->gregs, MPIC_INFO(GREG_IPI_VECTOR_PRI_0)); mpic 358 arch/powerpc/sysdev/mpic.c mpic->flags |= MPIC_BROKEN_IPI; mpic 367 arch/powerpc/sysdev/mpic.c static inline int mpic_is_ht_interrupt(struct mpic *mpic, unsigned int source) mpic 369 arch/powerpc/sysdev/mpic.c if (source >= 128 || !mpic->fixups) mpic 371 arch/powerpc/sysdev/mpic.c return mpic->fixups[source].base != NULL; mpic 375 arch/powerpc/sysdev/mpic.c static inline void mpic_ht_end_irq(struct mpic *mpic, unsigned int source) mpic 377 arch/powerpc/sysdev/mpic.c struct mpic_irq_fixup *fixup = &mpic->fixups[source]; mpic 384 arch/powerpc/sysdev/mpic.c raw_spin_lock(&mpic->fixup_lock); mpic 387 arch/powerpc/sysdev/mpic.c raw_spin_unlock(&mpic->fixup_lock); mpic 391 arch/powerpc/sysdev/mpic.c static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source, mpic 394 arch/powerpc/sysdev/mpic.c struct mpic_irq_fixup *fixup = &mpic->fixups[source]; mpic 403 arch/powerpc/sysdev/mpic.c raw_spin_lock_irqsave(&mpic->fixup_lock, flags); mpic 411 arch/powerpc/sysdev/mpic.c raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags); mpic 416 arch/powerpc/sysdev/mpic.c mpic->save_data[source].fixup_data = tmp | 1; mpic 420 arch/powerpc/sysdev/mpic.c static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source) mpic 422 arch/powerpc/sysdev/mpic.c struct mpic_irq_fixup *fixup = &mpic->fixups[source]; mpic 432 arch/powerpc/sysdev/mpic.c raw_spin_lock_irqsave(&mpic->fixup_lock, flags); mpic 437 arch/powerpc/sysdev/mpic.c raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags); mpic 442 arch/powerpc/sysdev/mpic.c mpic->save_data[source].fixup_data = tmp & ~1; mpic 447 arch/powerpc/sysdev/mpic.c static void __init mpic_scan_ht_msi(struct mpic *mpic, u8 __iomem *devbase, mpic 483 arch/powerpc/sysdev/mpic.c static void __init mpic_scan_ht_msi(struct mpic *mpic, u8 __iomem *devbase, mpic 490 arch/powerpc/sysdev/mpic.c static void __init mpic_scan_ht_pic(struct mpic *mpic, u8 __iomem *devbase, mpic 526 arch/powerpc/sysdev/mpic.c mpic->fixups[irq].index = i; mpic 527 arch/powerpc/sysdev/mpic.c mpic->fixups[irq].base = base; mpic 530 arch/powerpc/sysdev/mpic.c mpic->fixups[irq].applebase = devbase + 0x60; mpic 532 arch/powerpc/sysdev/mpic.c mpic->fixups[irq].applebase = NULL; mpic 534 arch/powerpc/sysdev/mpic.c mpic->fixups[irq].data = readl(base + 4) | 0x80000000; mpic 539 arch/powerpc/sysdev/mpic.c static void __init mpic_scan_ht_pics(struct mpic *mpic) mpic 547 arch/powerpc/sysdev/mpic.c mpic->fixups = kcalloc(128, sizeof(*mpic->fixups), GFP_KERNEL); mpic 548 arch/powerpc/sysdev/mpic.c BUG_ON(mpic->fixups == NULL); mpic 551 arch/powerpc/sysdev/mpic.c raw_spin_lock_init(&mpic->fixup_lock); mpic 579 arch/powerpc/sysdev/mpic.c mpic_scan_ht_pic(mpic, devbase, devfn, l); mpic 580 arch/powerpc/sysdev/mpic.c mpic_scan_ht_msi(mpic, devbase, devfn); mpic 591 arch/powerpc/sysdev/mpic.c static inline int mpic_is_ht_interrupt(struct mpic *mpic, unsigned int source) mpic 596 arch/powerpc/sysdev/mpic.c static void __init mpic_scan_ht_pics(struct mpic *mpic) mpic 603 arch/powerpc/sysdev/mpic.c static struct mpic *mpic_find(unsigned int irq) mpic 612 arch/powerpc/sysdev/mpic.c static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int src) mpic 614 arch/powerpc/sysdev/mpic.c return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]); mpic 618 arch/powerpc/sysdev/mpic.c static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int src) mpic 620 arch/powerpc/sysdev/mpic.c return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[7]); mpic 636 arch/powerpc/sysdev/mpic.c static inline struct mpic * mpic_from_ipi(struct irq_data *d) mpic 643 arch/powerpc/sysdev/mpic.c static inline struct mpic * mpic_from_irq(unsigned int irq) mpic 649 arch/powerpc/sysdev/mpic.c static inline struct mpic * mpic_from_irq_data(struct irq_data *d) mpic 655 arch/powerpc/sysdev/mpic.c static inline void mpic_eoi(struct mpic *mpic) mpic 668 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq_data(d); mpic 671 arch/powerpc/sysdev/mpic.c DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, d->irq, src); mpic 689 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq_data(d); mpic 692 arch/powerpc/sysdev/mpic.c DBG("%s: disable_irq: %d (src %d)\n", mpic->name, d->irq, src); mpic 710 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq_data(d); mpic 713 arch/powerpc/sysdev/mpic.c DBG("%s: end_irq: %d\n", mpic->name, d->irq); mpic 720 arch/powerpc/sysdev/mpic.c mpic_eoi(mpic); mpic 727 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq_data(d); mpic 733 arch/powerpc/sysdev/mpic.c mpic_ht_end_irq(mpic, src); mpic 738 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq_data(d); mpic 742 arch/powerpc/sysdev/mpic.c mpic_startup_ht_interrupt(mpic, src, irqd_is_level_type(d)); mpic 749 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq_data(d); mpic 752 arch/powerpc/sysdev/mpic.c mpic_shutdown_ht_interrupt(mpic, src); mpic 758 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq_data(d); mpic 762 arch/powerpc/sysdev/mpic.c DBG("%s: end_irq: %d\n", mpic->name, d->irq); mpic 770 arch/powerpc/sysdev/mpic.c mpic_ht_end_irq(mpic, src); mpic 771 arch/powerpc/sysdev/mpic.c mpic_eoi(mpic); mpic 779 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_ipi(d); mpic 780 arch/powerpc/sysdev/mpic.c unsigned int src = virq_to_hw(d->irq) - mpic->ipi_vecs[0]; mpic 782 arch/powerpc/sysdev/mpic.c DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, d->irq, src); mpic 793 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_ipi(d); mpic 800 arch/powerpc/sysdev/mpic.c mpic_eoi(mpic); mpic 807 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq_data(d); mpic 808 arch/powerpc/sysdev/mpic.c unsigned int src = virq_to_hw(d->irq) - mpic->timer_vecs[0]; mpic 810 arch/powerpc/sysdev/mpic.c DBG("%s: enable_tm: %d (tm %d)\n", mpic->name, d->irq, src); mpic 817 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq_data(d); mpic 818 arch/powerpc/sysdev/mpic.c unsigned int src = virq_to_hw(d->irq) - mpic->timer_vecs[0]; mpic 827 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq_data(d); mpic 830 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_SINGLE_DEST_CPU) { mpic 846 arch/powerpc/sysdev/mpic.c static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type) mpic 869 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq_data(d); mpic 874 arch/powerpc/sysdev/mpic.c mpic, d->irq, src, flow_type); mpic 876 arch/powerpc/sysdev/mpic.c if (src >= mpic->num_sources) mpic 912 arch/powerpc/sysdev/mpic.c if (mpic_is_ht_interrupt(mpic, src)) mpic 916 arch/powerpc/sysdev/mpic.c vecpri = mpic_type_to_vecpri(mpic, flow_type); mpic 929 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq(virq); mpic 934 arch/powerpc/sysdev/mpic.c mpic, virq, src, vector); mpic 936 arch/powerpc/sysdev/mpic.c if (src >= mpic->num_sources) mpic 947 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_from_irq(virq); mpic 951 arch/powerpc/sysdev/mpic.c mpic, virq, src, cpuid); mpic 953 arch/powerpc/sysdev/mpic.c if (src >= mpic->num_sources) mpic 1003 arch/powerpc/sysdev/mpic.c struct mpic *mpic = h->host_data; mpic 1008 arch/powerpc/sysdev/mpic.c if (hw == mpic->spurious_vec) mpic 1010 arch/powerpc/sysdev/mpic.c if (mpic->protected && test_bit(hw, mpic->protected)) { mpic 1017 arch/powerpc/sysdev/mpic.c else if (hw >= mpic->ipi_vecs[0]) { mpic 1018 arch/powerpc/sysdev/mpic.c WARN_ON(mpic->flags & MPIC_SECONDARY); mpic 1021 arch/powerpc/sysdev/mpic.c irq_set_chip_data(virq, mpic); mpic 1022 arch/powerpc/sysdev/mpic.c irq_set_chip_and_handler(virq, &mpic->hc_ipi, mpic 1028 arch/powerpc/sysdev/mpic.c if (hw >= mpic->timer_vecs[0] && hw <= mpic->timer_vecs[7]) { mpic 1029 arch/powerpc/sysdev/mpic.c WARN_ON(mpic->flags & MPIC_SECONDARY); mpic 1032 arch/powerpc/sysdev/mpic.c irq_set_chip_data(virq, mpic); mpic 1033 arch/powerpc/sysdev/mpic.c irq_set_chip_and_handler(virq, &mpic->hc_tm, mpic 1038 arch/powerpc/sysdev/mpic.c if (mpic_map_error_int(mpic, virq, hw)) mpic 1041 arch/powerpc/sysdev/mpic.c if (hw >= mpic->num_sources) { mpic 1047 arch/powerpc/sysdev/mpic.c mpic_msi_reserve_hwirq(mpic, hw); mpic 1050 arch/powerpc/sysdev/mpic.c chip = &mpic->hc_irq; mpic 1054 arch/powerpc/sysdev/mpic.c if (mpic_is_ht_interrupt(mpic, hw)) mpic 1055 arch/powerpc/sysdev/mpic.c chip = &mpic->hc_ht_irq; mpic 1060 arch/powerpc/sysdev/mpic.c irq_set_chip_data(virq, mpic); mpic 1070 arch/powerpc/sysdev/mpic.c if (!mpic_is_ipi(mpic, hw) && (mpic->flags & MPIC_NO_RESET)) { mpic 1074 arch/powerpc/sysdev/mpic.c cpu = mpic_processor_id(mpic); mpic 1090 arch/powerpc/sysdev/mpic.c struct mpic *mpic = h->host_data; mpic 1099 arch/powerpc/sysdev/mpic.c if (intsize >= 4 && (mpic->flags & MPIC_FSL)) { mpic 1111 arch/powerpc/sysdev/mpic.c if (!(mpic->flags & MPIC_FSL_HAS_EIMR)) mpic 1114 arch/powerpc/sysdev/mpic.c if (intspec[3] >= ARRAY_SIZE(mpic->err_int_vecs)) mpic 1117 arch/powerpc/sysdev/mpic.c *out_hwirq = mpic->err_int_vecs[intspec[3]]; mpic 1121 arch/powerpc/sysdev/mpic.c if (intspec[0] >= ARRAY_SIZE(mpic->ipi_vecs)) mpic 1124 arch/powerpc/sysdev/mpic.c *out_hwirq = mpic->ipi_vecs[intspec[0]]; mpic 1127 arch/powerpc/sysdev/mpic.c if (intspec[0] >= ARRAY_SIZE(mpic->timer_vecs)) mpic 1130 arch/powerpc/sysdev/mpic.c *out_hwirq = mpic->timer_vecs[intspec[0]]; mpic 1168 arch/powerpc/sysdev/mpic.c struct mpic *mpic = irq_desc_get_handler_data(desc); mpic 1171 arch/powerpc/sysdev/mpic.c BUG_ON(!(mpic->flags & MPIC_SECONDARY)); mpic 1173 arch/powerpc/sysdev/mpic.c virq = mpic_get_one_irq(mpic); mpic 1186 arch/powerpc/sysdev/mpic.c static u32 fsl_mpic_get_version(struct mpic *mpic) mpic 1190 arch/powerpc/sysdev/mpic.c if (!(mpic->flags & MPIC_FSL)) mpic 1193 arch/powerpc/sysdev/mpic.c brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs, mpic 1205 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_primary; mpic 1207 arch/powerpc/sysdev/mpic.c if (mpic) mpic 1208 arch/powerpc/sysdev/mpic.c return fsl_mpic_get_version(mpic); mpic 1213 arch/powerpc/sysdev/mpic.c struct mpic * __init mpic_alloc(struct device_node *node, mpic 1221 arch/powerpc/sysdev/mpic.c struct mpic *mpic; mpic 1273 arch/powerpc/sysdev/mpic.c mpic = kzalloc(sizeof(struct mpic), GFP_KERNEL); mpic 1274 arch/powerpc/sysdev/mpic.c if (mpic == NULL) mpic 1277 arch/powerpc/sysdev/mpic.c mpic->name = name; mpic 1278 arch/powerpc/sysdev/mpic.c mpic->node = node; mpic 1279 arch/powerpc/sysdev/mpic.c mpic->paddr = phys_addr; mpic 1280 arch/powerpc/sysdev/mpic.c mpic->flags = flags; mpic 1282 arch/powerpc/sysdev/mpic.c mpic->hc_irq = mpic_irq_chip; mpic 1283 arch/powerpc/sysdev/mpic.c mpic->hc_irq.name = name; mpic 1284 arch/powerpc/sysdev/mpic.c if (!(mpic->flags & MPIC_SECONDARY)) mpic 1285 arch/powerpc/sysdev/mpic.c mpic->hc_irq.irq_set_affinity = mpic_set_affinity; mpic 1287 arch/powerpc/sysdev/mpic.c mpic->hc_ht_irq = mpic_irq_ht_chip; mpic 1288 arch/powerpc/sysdev/mpic.c mpic->hc_ht_irq.name = name; mpic 1289 arch/powerpc/sysdev/mpic.c if (!(mpic->flags & MPIC_SECONDARY)) mpic 1290 arch/powerpc/sysdev/mpic.c mpic->hc_ht_irq.irq_set_affinity = mpic_set_affinity; mpic 1294 arch/powerpc/sysdev/mpic.c mpic->hc_ipi = mpic_ipi_chip; mpic 1295 arch/powerpc/sysdev/mpic.c mpic->hc_ipi.name = name; mpic 1298 arch/powerpc/sysdev/mpic.c mpic->hc_tm = mpic_tm_chip; mpic 1299 arch/powerpc/sysdev/mpic.c mpic->hc_tm.name = name; mpic 1301 arch/powerpc/sysdev/mpic.c mpic->num_sources = 0; /* so far */ mpic 1303 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_LARGE_VECTORS) mpic 1308 arch/powerpc/sysdev/mpic.c mpic->timer_vecs[0] = intvec_top - 12; mpic 1309 arch/powerpc/sysdev/mpic.c mpic->timer_vecs[1] = intvec_top - 11; mpic 1310 arch/powerpc/sysdev/mpic.c mpic->timer_vecs[2] = intvec_top - 10; mpic 1311 arch/powerpc/sysdev/mpic.c mpic->timer_vecs[3] = intvec_top - 9; mpic 1312 arch/powerpc/sysdev/mpic.c mpic->timer_vecs[4] = intvec_top - 8; mpic 1313 arch/powerpc/sysdev/mpic.c mpic->timer_vecs[5] = intvec_top - 7; mpic 1314 arch/powerpc/sysdev/mpic.c mpic->timer_vecs[6] = intvec_top - 6; mpic 1315 arch/powerpc/sysdev/mpic.c mpic->timer_vecs[7] = intvec_top - 5; mpic 1316 arch/powerpc/sysdev/mpic.c mpic->ipi_vecs[0] = intvec_top - 4; mpic 1317 arch/powerpc/sysdev/mpic.c mpic->ipi_vecs[1] = intvec_top - 3; mpic 1318 arch/powerpc/sysdev/mpic.c mpic->ipi_vecs[2] = intvec_top - 2; mpic 1319 arch/powerpc/sysdev/mpic.c mpic->ipi_vecs[3] = intvec_top - 1; mpic 1320 arch/powerpc/sysdev/mpic.c mpic->spurious_vec = intvec_top; mpic 1323 arch/powerpc/sysdev/mpic.c psrc = of_get_property(mpic->node, "protected-sources", &psize); mpic 1327 arch/powerpc/sysdev/mpic.c mpic->protected = kcalloc(mapsize, sizeof(long), GFP_KERNEL); mpic 1328 arch/powerpc/sysdev/mpic.c BUG_ON(mpic->protected == NULL); mpic 1332 arch/powerpc/sysdev/mpic.c __set_bit(psrc[i], mpic->protected); mpic 1337 arch/powerpc/sysdev/mpic.c mpic->hw_set = mpic_infos[MPIC_GET_REGSET(mpic->flags)]; mpic 1341 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_BIG_ENDIAN) mpic 1342 arch/powerpc/sysdev/mpic.c mpic->reg_type = mpic_access_mmio_be; mpic 1344 arch/powerpc/sysdev/mpic.c mpic->reg_type = mpic_access_mmio_le; mpic 1351 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_USES_DCR) mpic 1352 arch/powerpc/sysdev/mpic.c mpic->reg_type = mpic_access_dcr; mpic 1354 arch/powerpc/sysdev/mpic.c BUG_ON(mpic->flags & MPIC_USES_DCR); mpic 1358 arch/powerpc/sysdev/mpic.c mpic_map(mpic, mpic->paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000); mpic 1359 arch/powerpc/sysdev/mpic.c mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000); mpic 1361 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_FSL) { mpic 1369 arch/powerpc/sysdev/mpic.c mpic_map(mpic, mpic->paddr, &mpic->thiscpuregs, mpic 1372 arch/powerpc/sysdev/mpic.c fsl_version = fsl_mpic_get_version(mpic); mpic 1388 arch/powerpc/sysdev/mpic.c ret = mpic_setup_error_int(mpic, intvec_top - 13); mpic 1418 arch/powerpc/sysdev/mpic.c if (!(mpic->flags & MPIC_NO_RESET)) { mpic 1420 arch/powerpc/sysdev/mpic.c mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), mpic 1421 arch/powerpc/sysdev/mpic.c mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) mpic 1423 arch/powerpc/sysdev/mpic.c while( mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) mpic 1429 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_ENABLE_COREINT) mpic 1430 arch/powerpc/sysdev/mpic.c mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), mpic 1431 arch/powerpc/sysdev/mpic.c mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) mpic 1434 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_ENABLE_MCK) mpic 1435 arch/powerpc/sysdev/mpic.c mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), mpic 1436 arch/powerpc/sysdev/mpic.c mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) mpic 1449 arch/powerpc/sysdev/mpic.c mpic_map(mpic, mpic->paddr, &mpic->cpuregs[cpu], mpic 1458 arch/powerpc/sysdev/mpic.c greg_feature = mpic_read(mpic->gregs, MPIC_INFO(GREG_FEATURE_0)); mpic 1470 arch/powerpc/sysdev/mpic.c of_property_read_u32(mpic->node, "last-interrupt-source", &last_irq); mpic 1477 arch/powerpc/sysdev/mpic.c mpic->num_sources = isu_size; mpic 1478 arch/powerpc/sysdev/mpic.c mpic_map(mpic, mpic->paddr, &mpic->isus[0], mpic 1483 arch/powerpc/sysdev/mpic.c mpic->isu_size = isu_size; mpic 1484 arch/powerpc/sysdev/mpic.c mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1); mpic 1485 arch/powerpc/sysdev/mpic.c mpic->isu_mask = (1 << mpic->isu_shift) - 1; mpic 1487 arch/powerpc/sysdev/mpic.c mpic->irqhost = irq_domain_add_linear(mpic->node, mpic 1489 arch/powerpc/sysdev/mpic.c &mpic_host_ops, mpic); mpic 1495 arch/powerpc/sysdev/mpic.c if (mpic->irqhost == NULL) mpic 1515 arch/powerpc/sysdev/mpic.c name, vers, (unsigned long long)mpic->paddr, num_possible_cpus()); mpic 1517 arch/powerpc/sysdev/mpic.c mpic->isu_size, mpic->isu_shift, mpic->isu_mask); mpic 1519 arch/powerpc/sysdev/mpic.c mpic->next = mpics; mpic 1520 arch/powerpc/sysdev/mpic.c mpics = mpic; mpic 1522 arch/powerpc/sysdev/mpic.c if (!(mpic->flags & MPIC_SECONDARY)) { mpic 1523 arch/powerpc/sysdev/mpic.c mpic_primary = mpic; mpic 1524 arch/powerpc/sysdev/mpic.c irq_set_default_host(mpic->irqhost); mpic 1527 arch/powerpc/sysdev/mpic.c return mpic; mpic 1534 arch/powerpc/sysdev/mpic.c void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, mpic 1537 arch/powerpc/sysdev/mpic.c unsigned int isu_first = isu_num * mpic->isu_size; mpic 1541 arch/powerpc/sysdev/mpic.c mpic_map(mpic, mpic 1542 arch/powerpc/sysdev/mpic.c paddr, &mpic->isus[isu_num], 0, mpic 1543 arch/powerpc/sysdev/mpic.c MPIC_INFO(IRQ_STRIDE) * mpic->isu_size); mpic 1545 arch/powerpc/sysdev/mpic.c if ((isu_first + mpic->isu_size) > mpic->num_sources) mpic 1546 arch/powerpc/sysdev/mpic.c mpic->num_sources = isu_first + mpic->isu_size; mpic 1549 arch/powerpc/sysdev/mpic.c void __init mpic_init(struct mpic *mpic) mpic 1554 arch/powerpc/sysdev/mpic.c BUG_ON(mpic->num_sources == 0); mpic 1556 arch/powerpc/sysdev/mpic.c printk(KERN_INFO "mpic: Initializing for %d sources\n", mpic->num_sources); mpic 1561 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_FSL) { mpic 1562 arch/powerpc/sysdev/mpic.c u32 version = fsl_mpic_get_version(mpic); mpic 1576 arch/powerpc/sysdev/mpic.c unsigned int offset = mpic_tm_offset(mpic, i); mpic 1578 arch/powerpc/sysdev/mpic.c mpic_write(mpic->tmregs, mpic 1581 arch/powerpc/sysdev/mpic.c mpic_write(mpic->tmregs, mpic 1585 arch/powerpc/sysdev/mpic.c (mpic->timer_vecs[0] + i)); mpic 1589 arch/powerpc/sysdev/mpic.c mpic_test_broken_ipi(mpic); mpic 1594 arch/powerpc/sysdev/mpic.c (mpic->ipi_vecs[0] + i)); mpic 1598 arch/powerpc/sysdev/mpic.c DBG("MPIC flags: %x\n", mpic->flags); mpic 1599 arch/powerpc/sysdev/mpic.c if ((mpic->flags & MPIC_U3_HT_IRQS) && !(mpic->flags & MPIC_SECONDARY)) { mpic 1600 arch/powerpc/sysdev/mpic.c mpic_scan_ht_pics(mpic); mpic 1601 arch/powerpc/sysdev/mpic.c mpic_u3msi_init(mpic); mpic 1604 arch/powerpc/sysdev/mpic.c mpic_pasemi_msi_init(mpic); mpic 1606 arch/powerpc/sysdev/mpic.c cpu = mpic_processor_id(mpic); mpic 1608 arch/powerpc/sysdev/mpic.c if (!(mpic->flags & MPIC_NO_RESET)) { mpic 1609 arch/powerpc/sysdev/mpic.c for (i = 0; i < mpic->num_sources; i++) { mpic 1615 arch/powerpc/sysdev/mpic.c if (mpic->protected && test_bit(i, mpic->protected)) mpic 1624 arch/powerpc/sysdev/mpic.c mpic_write(mpic->gregs, MPIC_INFO(GREG_SPURIOUS), mpic->spurious_vec); mpic 1627 arch/powerpc/sysdev/mpic.c if (!(mpic->flags & MPIC_NO_PTHROU_DIS)) mpic 1628 arch/powerpc/sysdev/mpic.c mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), mpic 1629 arch/powerpc/sysdev/mpic.c mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) mpic 1632 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_NO_BIAS) mpic 1633 arch/powerpc/sysdev/mpic.c mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), mpic 1634 arch/powerpc/sysdev/mpic.c mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) mpic 1642 arch/powerpc/sysdev/mpic.c mpic->save_data = kmalloc_array(mpic->num_sources, mpic 1643 arch/powerpc/sysdev/mpic.c sizeof(*mpic->save_data), mpic 1645 arch/powerpc/sysdev/mpic.c BUG_ON(mpic->save_data == NULL); mpic 1649 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_SECONDARY) { mpic 1650 arch/powerpc/sysdev/mpic.c int virq = irq_of_parse_and_map(mpic->node, 0); mpic 1653 arch/powerpc/sysdev/mpic.c mpic->node, virq); mpic 1654 arch/powerpc/sysdev/mpic.c irq_set_handler_data(virq, mpic); mpic 1660 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_FSL_HAS_EIMR) mpic 1661 arch/powerpc/sysdev/mpic.c mpic_err_int_init(mpic, MPIC_FSL_ERR_INT); mpic 1666 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_find(irq); mpic 1671 arch/powerpc/sysdev/mpic.c if (!mpic) mpic 1675 arch/powerpc/sysdev/mpic.c if (mpic_is_ipi(mpic, src)) { mpic 1676 arch/powerpc/sysdev/mpic.c reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & mpic 1678 arch/powerpc/sysdev/mpic.c mpic_ipi_write(src - mpic->ipi_vecs[0], mpic 1680 arch/powerpc/sysdev/mpic.c } else if (mpic_is_tm(mpic, src)) { mpic 1681 arch/powerpc/sysdev/mpic.c reg = mpic_tm_read(src - mpic->timer_vecs[0]) & mpic 1683 arch/powerpc/sysdev/mpic.c mpic_tm_write(src - mpic->timer_vecs[0], mpic 1697 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_primary; mpic 1702 arch/powerpc/sysdev/mpic.c BUG_ON(mpic == NULL); mpic 1704 arch/powerpc/sysdev/mpic.c DBG("%s: setup_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); mpic 1713 arch/powerpc/sysdev/mpic.c if (distribute_irqs && !(mpic->flags & MPIC_SINGLE_DEST_CPU)) { mpic 1714 arch/powerpc/sysdev/mpic.c for (i = 0; i < mpic->num_sources ; i++) mpic 1728 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_primary; mpic 1735 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_primary; mpic 1743 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_primary; mpic 1748 arch/powerpc/sysdev/mpic.c BUG_ON(mpic == NULL); mpic 1750 arch/powerpc/sysdev/mpic.c DBG("%s: teardown_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); mpic 1754 arch/powerpc/sysdev/mpic.c for (i = 0; i < mpic->num_sources ; i++) mpic 1763 arch/powerpc/sysdev/mpic.c mpic_eoi(mpic); mpic 1769 arch/powerpc/sysdev/mpic.c static unsigned int _mpic_get_one_irq(struct mpic *mpic, int reg) mpic 1775 arch/powerpc/sysdev/mpic.c DBG("%s: get_one_irq(reg 0x%x): %d\n", mpic->name, reg, src); mpic 1777 arch/powerpc/sysdev/mpic.c if (unlikely(src == mpic->spurious_vec)) { mpic 1778 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_SPV_EOI) mpic 1779 arch/powerpc/sysdev/mpic.c mpic_eoi(mpic); mpic 1782 arch/powerpc/sysdev/mpic.c if (unlikely(mpic->protected && test_bit(src, mpic->protected))) { mpic 1784 arch/powerpc/sysdev/mpic.c mpic->name, (int)src); mpic 1785 arch/powerpc/sysdev/mpic.c mpic_eoi(mpic); mpic 1789 arch/powerpc/sysdev/mpic.c return irq_linear_revmap(mpic->irqhost, src); mpic 1792 arch/powerpc/sysdev/mpic.c unsigned int mpic_get_one_irq(struct mpic *mpic) mpic 1794 arch/powerpc/sysdev/mpic.c return _mpic_get_one_irq(mpic, MPIC_INFO(CPU_INTACK)); mpic 1799 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_primary; mpic 1801 arch/powerpc/sysdev/mpic.c BUG_ON(mpic == NULL); mpic 1803 arch/powerpc/sysdev/mpic.c return mpic_get_one_irq(mpic); mpic 1809 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_primary; mpic 1812 arch/powerpc/sysdev/mpic.c BUG_ON(mpic == NULL); mpic 1816 arch/powerpc/sysdev/mpic.c if (unlikely(src == mpic->spurious_vec)) { mpic 1817 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_SPV_EOI) mpic 1818 arch/powerpc/sysdev/mpic.c mpic_eoi(mpic); mpic 1821 arch/powerpc/sysdev/mpic.c if (unlikely(mpic->protected && test_bit(src, mpic->protected))) { mpic 1823 arch/powerpc/sysdev/mpic.c mpic->name, (int)src); mpic 1827 arch/powerpc/sysdev/mpic.c return irq_linear_revmap(mpic->irqhost, src); mpic 1835 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_primary; mpic 1837 arch/powerpc/sysdev/mpic.c BUG_ON(mpic == NULL); mpic 1839 arch/powerpc/sysdev/mpic.c return _mpic_get_one_irq(mpic, MPIC_INFO(CPU_MCACK)); mpic 1845 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_primary; mpic 1847 arch/powerpc/sysdev/mpic.c BUG_ON(mpic == NULL); mpic 1852 arch/powerpc/sysdev/mpic.c unsigned int vipi = irq_create_mapping(mpic->irqhost, mpic 1853 arch/powerpc/sysdev/mpic.c mpic->ipi_vecs[0] + i); mpic 1864 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_primary; mpic 1867 arch/powerpc/sysdev/mpic.c BUG_ON(mpic == NULL); mpic 1877 arch/powerpc/sysdev/mpic.c DBG("%s: send_ipi(ipi_no: %d)\n", mpic->name, msg); mpic 1907 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpic_primary; mpic 1913 arch/powerpc/sysdev/mpic.c pir = mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT)); mpic 1915 arch/powerpc/sysdev/mpic.c mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir); mpic 1916 arch/powerpc/sysdev/mpic.c mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT)); mpic 1920 arch/powerpc/sysdev/mpic.c mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir); mpic 1921 arch/powerpc/sysdev/mpic.c mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT)); mpic 1925 arch/powerpc/sysdev/mpic.c if (mpic->flags & MPIC_FSL) { mpic 1927 arch/powerpc/sysdev/mpic.c _mpic_write(mpic->reg_type, &mpic->cpuregs[cpuid], mpic 1935 arch/powerpc/sysdev/mpic.c static void mpic_suspend_one(struct mpic *mpic) mpic 1939 arch/powerpc/sysdev/mpic.c for (i = 0; i < mpic->num_sources; i++) { mpic 1940 arch/powerpc/sysdev/mpic.c mpic->save_data[i].vecprio = mpic 1942 arch/powerpc/sysdev/mpic.c mpic->save_data[i].dest = mpic 1949 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpics; mpic 1951 arch/powerpc/sysdev/mpic.c while (mpic) { mpic 1952 arch/powerpc/sysdev/mpic.c mpic_suspend_one(mpic); mpic 1953 arch/powerpc/sysdev/mpic.c mpic = mpic->next; mpic 1959 arch/powerpc/sysdev/mpic.c static void mpic_resume_one(struct mpic *mpic) mpic 1963 arch/powerpc/sysdev/mpic.c for (i = 0; i < mpic->num_sources; i++) { mpic 1965 arch/powerpc/sysdev/mpic.c mpic->save_data[i].vecprio); mpic 1967 arch/powerpc/sysdev/mpic.c mpic->save_data[i].dest); mpic 1970 arch/powerpc/sysdev/mpic.c if (mpic->fixups) { mpic 1971 arch/powerpc/sysdev/mpic.c struct mpic_irq_fixup *fixup = &mpic->fixups[i]; mpic 1975 arch/powerpc/sysdev/mpic.c if ((mpic->save_data[i].fixup_data & 1) == 0) mpic 1981 arch/powerpc/sysdev/mpic.c writel(mpic->save_data[i].fixup_data & ~1, mpic 1991 arch/powerpc/sysdev/mpic.c struct mpic *mpic = mpics; mpic 1993 arch/powerpc/sysdev/mpic.c while (mpic) { mpic 1994 arch/powerpc/sysdev/mpic.c mpic_resume_one(mpic); mpic 1995 arch/powerpc/sysdev/mpic.c mpic = mpic->next; mpic 10 arch/powerpc/sysdev/mpic.h extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq); mpic 11 arch/powerpc/sysdev/mpic.h extern int mpic_msi_init_allocator(struct mpic *mpic); mpic 12 arch/powerpc/sysdev/mpic.h extern int mpic_u3msi_init(struct mpic *mpic); mpic 14 arch/powerpc/sysdev/mpic.h static inline void mpic_msi_reserve_hwirq(struct mpic *mpic, mpic 20 arch/powerpc/sysdev/mpic.h static inline int mpic_u3msi_init(struct mpic *mpic) mpic 27 arch/powerpc/sysdev/mpic.h int mpic_pasemi_msi_init(struct mpic *mpic); mpic 29 arch/powerpc/sysdev/mpic.h static inline int mpic_pasemi_msi_init(struct mpic *mpic) { return -1; } mpic 39 arch/powerpc/sysdev/mpic.h extern int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw); mpic 40 arch/powerpc/sysdev/mpic.h extern void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum); mpic 41 arch/powerpc/sysdev/mpic.h extern int mpic_setup_error_int(struct mpic *mpic, int intvec); mpic 43 arch/powerpc/sysdev/mpic.h static inline int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw) mpic 49 arch/powerpc/sysdev/mpic.h static inline void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum) mpic 54 arch/powerpc/sysdev/mpic.h static inline int mpic_setup_error_int(struct mpic *mpic, int intvec) mpic 17 arch/powerpc/sysdev/mpic_msi.c void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) mpic 20 arch/powerpc/sysdev/mpic_msi.c if (!mpic->msi_bitmap.bitmap) mpic 23 arch/powerpc/sysdev/mpic_msi.c msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq); mpic 27 arch/powerpc/sysdev/mpic_msi.c static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic) mpic 30 arch/powerpc/sysdev/mpic_msi.c const struct irq_domain_ops *ops = mpic->irqhost->ops; mpic 44 arch/powerpc/sysdev/mpic_msi.c msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); mpic 47 arch/powerpc/sysdev/mpic_msi.c msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); mpic 50 arch/powerpc/sysdev/mpic_msi.c msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); mpic 52 arch/powerpc/sysdev/mpic_msi.c for (i = 124; i < mpic->num_sources; i++) mpic 53 arch/powerpc/sysdev/mpic_msi.c msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); mpic 62 arch/powerpc/sysdev/mpic_msi.c ops->xlate(mpic->irqhost, NULL, oirq.args, mpic 64 arch/powerpc/sysdev/mpic_msi.c msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq); mpic 71 arch/powerpc/sysdev/mpic_msi.c static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic) mpic 77 arch/powerpc/sysdev/mpic_msi.c int mpic_msi_init_allocator(struct mpic *mpic) mpic 81 arch/powerpc/sysdev/mpic_msi.c rc = msi_bitmap_alloc(&mpic->msi_bitmap, mpic->num_sources, mpic 82 arch/powerpc/sysdev/mpic_msi.c irq_domain_get_of_node(mpic->irqhost)); mpic 86 arch/powerpc/sysdev/mpic_msi.c rc = msi_bitmap_reserve_dt_hwirqs(&mpic->msi_bitmap); mpic 88 arch/powerpc/sysdev/mpic_msi.c if (mpic->flags & MPIC_U3_HT_IRQS) mpic 89 arch/powerpc/sysdev/mpic_msi.c rc = mpic_msi_reserve_u3_hwirqs(mpic); mpic 92 arch/powerpc/sysdev/mpic_msi.c msi_bitmap_free(&mpic->msi_bitmap); mpic 18 arch/powerpc/sysdev/mpic_u3msi.c static struct mpic *msi_mpic; mpic 177 arch/powerpc/sysdev/mpic_u3msi.c int mpic_u3msi_init(struct mpic *mpic) mpic 182 arch/powerpc/sysdev/mpic_u3msi.c rc = mpic_msi_init_allocator(mpic); mpic 191 arch/powerpc/sysdev/mpic_u3msi.c msi_mpic = mpic;