COND 36 arch/sparc/net/bpf_jit_comp_32.c #define CONDN COND(0x0) COND 37 arch/sparc/net/bpf_jit_comp_32.c #define CONDE COND(0x1) COND 38 arch/sparc/net/bpf_jit_comp_32.c #define CONDLE COND(0x2) COND 39 arch/sparc/net/bpf_jit_comp_32.c #define CONDL COND(0x3) COND 40 arch/sparc/net/bpf_jit_comp_32.c #define CONDLEU COND(0x4) COND 41 arch/sparc/net/bpf_jit_comp_32.c #define CONDCS COND(0x5) COND 42 arch/sparc/net/bpf_jit_comp_32.c #define CONDNEG COND(0x6) COND 43 arch/sparc/net/bpf_jit_comp_32.c #define CONDVC COND(0x7) COND 44 arch/sparc/net/bpf_jit_comp_32.c #define CONDA COND(0x8) COND 45 arch/sparc/net/bpf_jit_comp_32.c #define CONDNE COND(0x9) COND 46 arch/sparc/net/bpf_jit_comp_32.c #define CONDG COND(0xa) COND 47 arch/sparc/net/bpf_jit_comp_32.c #define CONDGE COND(0xb) COND 48 arch/sparc/net/bpf_jit_comp_32.c #define CONDGU COND(0xc) COND 49 arch/sparc/net/bpf_jit_comp_32.c #define CONDCC COND(0xd) COND 50 arch/sparc/net/bpf_jit_comp_32.c #define CONDPOS COND(0xe) COND 51 arch/sparc/net/bpf_jit_comp_32.c #define CONDVS COND(0xf) COND 67 arch/sparc/net/bpf_jit_comp_64.c #define CONDN COND(0x0) COND 68 arch/sparc/net/bpf_jit_comp_64.c #define CONDE COND(0x1) COND 69 arch/sparc/net/bpf_jit_comp_64.c #define CONDLE COND(0x2) COND 70 arch/sparc/net/bpf_jit_comp_64.c #define CONDL COND(0x3) COND 71 arch/sparc/net/bpf_jit_comp_64.c #define CONDLEU COND(0x4) COND 72 arch/sparc/net/bpf_jit_comp_64.c #define CONDCS COND(0x5) COND 73 arch/sparc/net/bpf_jit_comp_64.c #define CONDNEG COND(0x6) COND 74 arch/sparc/net/bpf_jit_comp_64.c #define CONDVC COND(0x7) COND 75 arch/sparc/net/bpf_jit_comp_64.c #define CONDA COND(0x8) COND 76 arch/sparc/net/bpf_jit_comp_64.c #define CONDNE COND(0x9) COND 77 arch/sparc/net/bpf_jit_comp_64.c #define CONDG COND(0xa) COND 78 arch/sparc/net/bpf_jit_comp_64.c #define CONDGE COND(0xb) COND 79 arch/sparc/net/bpf_jit_comp_64.c #define CONDGU COND(0xc) COND 80 arch/sparc/net/bpf_jit_comp_64.c #define CONDCC COND(0xd) COND 81 arch/sparc/net/bpf_jit_comp_64.c #define CONDPOS COND(0xe) COND 82 arch/sparc/net/bpf_jit_comp_64.c #define CONDVS COND(0xf) COND 590 arch/x86/kernel/uprobes.c COND(70, 71, XF(OF)) \ COND 591 arch/x86/kernel/uprobes.c COND(72, 73, XF(CF)) \ COND 592 arch/x86/kernel/uprobes.c COND(74, 75, XF(ZF)) \ COND 593 arch/x86/kernel/uprobes.c COND(78, 79, XF(SF)) \ COND 594 arch/x86/kernel/uprobes.c COND(7a, 7b, XF(PF)) \ COND 595 arch/x86/kernel/uprobes.c COND(76, 77, XF(CF) || XF(ZF)) \ COND 596 arch/x86/kernel/uprobes.c COND(7c, 7d, XF(SF) != XF(OF)) \ COND 597 arch/x86/kernel/uprobes.c COND(7e, 7f, XF(ZF) || XF(SF) != XF(OF)) COND 112 drivers/gpu/drm/gma500/cdv_intel_display.c #define _wait_for(COND, MS, W) ({ \ COND 115 drivers/gpu/drm/gma500/cdv_intel_display.c while (!(COND)) { \ COND 126 drivers/gpu/drm/gma500/cdv_intel_display.c #define wait_for(COND, MS) _wait_for(COND, MS, 1) COND 236 drivers/gpu/drm/gma500/cdv_intel_dp.c #define _wait_for(COND, MS, W) ({ \ COND 239 drivers/gpu/drm/gma500/cdv_intel_dp.c while (! (COND)) { \ COND 249 drivers/gpu/drm/gma500/cdv_intel_dp.c #define wait_for(COND, MS) _wait_for(COND, MS, 1) COND 39 drivers/gpu/drm/gma500/intel_gmbus.c #define _wait_for(COND, MS, W) ({ \ COND 42 drivers/gpu/drm/gma500/intel_gmbus.c while (! (COND)) { \ COND 52 drivers/gpu/drm/gma500/intel_gmbus.c #define wait_for(COND, MS) _wait_for(COND, MS, 1) COND 53 drivers/gpu/drm/gma500/intel_gmbus.c #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0) COND 1073 drivers/gpu/drm/i915/display/intel_display_power.c if (COND) COND 1081 drivers/gpu/drm/i915/display/intel_display_power.c if (wait_for(COND, 100)) COND 1652 drivers/gpu/drm/i915/display/intel_display_power.c if (COND) COND 1660 drivers/gpu/drm/i915/display/intel_display_power.c if (wait_for(COND, 100)) COND 303 drivers/gpu/drm/i915/i915_utils.h #define __wait_for(OP, COND, US, Wmin, Wmax) ({ \ COND 313 drivers/gpu/drm/i915/i915_utils.h if (COND) { \ COND 328 drivers/gpu/drm/i915/i915_utils.h #define _wait_for(COND, US, Wmin, Wmax) __wait_for(, (COND), (US), (Wmin), \ COND 330 drivers/gpu/drm/i915/i915_utils.h #define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000) COND 339 drivers/gpu/drm/i915/i915_utils.h #define _wait_for_atomic(COND, US, ATOMIC) \ COND 355 drivers/gpu/drm/i915/i915_utils.h if (COND) { \ COND 376 drivers/gpu/drm/i915/i915_utils.h #define wait_for_us(COND, US) \ COND 381 drivers/gpu/drm/i915/i915_utils.h ret__ = _wait_for((COND), (US), 10, 10); \ COND 383 drivers/gpu/drm/i915/i915_utils.h ret__ = _wait_for_atomic((COND), (US), 0); \ COND 387 drivers/gpu/drm/i915/i915_utils.h #define wait_for_atomic_us(COND, US) \ COND 391 drivers/gpu/drm/i915/i915_utils.h _wait_for_atomic((COND), (US), 1); \ COND 394 drivers/gpu/drm/i915/i915_utils.h #define wait_for_atomic(COND, MS) wait_for_atomic_us((COND), (MS) * 1000) COND 504 drivers/gpu/drm/i915/intel_sideband.c if (COND) { COND 508 drivers/gpu/drm/i915/intel_sideband.c ret = _wait_for(COND, timeout_base_ms * 1000, 10, 10); COND 525 drivers/gpu/drm/i915/intel_sideband.c ret = wait_for_atomic(COND, 50); COND 109 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE0_MIXER1); COND 115 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE1_MIXER1); COND 121 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE2_MIXER1); COND 127 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE3_MIXER1); COND 133 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE4_MIXER1); COND 139 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE5_MIXER1); COND 145 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h COND(mixer == 1, MDP4_LAYERMIXER_IN_CFG_PIPE6_MIXER1); COND 304 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) | COND 310 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT)); COND 714 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c COND(yuv, MDP5_PIPE_SCALE_CONFIG_SCALEX_FILTER_COMP_1_2(uv_filter)); COND 719 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c COND(yuv, MDP5_PIPE_SCALE_CONFIG_SCALEY_FILTER_COMP_1_2(uv_filter)); COND 859 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c COND(format->alpha_enable, MDP5_PIPE_SRC_FORMAT_ALPHA_ENABLE) | COND 862 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c COND(format->unpack_tight, MDP5_PIPE_SRC_FORMAT_UNPACK_TIGHT) | COND 875 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c COND(has_pe, MDP5_PIPE_SRC_OP_MODE_SW_PIX_EXT_OVERRIDE) | COND 158 drivers/gpu/drm/msm/hdmi/hdmi_audio.c COND(info->channels != 2, HDMI_AUDIO_PKT_CTRL2_LAYOUT) | COND 206 drivers/gpu/drm/msm/hdmi/hdmi_audio.c COND(enabled, HDMI_AUD_INT_AUD_FIFO_URUN_INT) | COND 207 drivers/gpu/drm/msm/hdmi/hdmi_audio.c COND(enabled, HDMI_AUD_INT_AUD_SAM_DROP_INT)); COND 264 drivers/gpu/drm/v3d/v3d_drv.h #define wait_for(COND, MS) ({ \ COND 267 drivers/gpu/drm/v3d/v3d_drv.h while (!(COND)) { \ COND 269 drivers/gpu/drm/v3d/v3d_drv.h if (!(COND)) \ COND 687 drivers/gpu/drm/vc4/vc4_drv.h #define _wait_for(COND, MS, W) ({ \ COND 690 drivers/gpu/drm/vc4/vc4_drv.h while (!(COND)) { \ COND 692 drivers/gpu/drm/vc4/vc4_drv.h if (!(COND)) \ COND 705 drivers/gpu/drm/vc4/vc4_drv.h #define wait_for(COND, MS) _wait_for(COND, MS, 1) COND 1816 net/core/dev.c #define net_timestamp_check(COND, SKB) \ COND 1818 net/core/dev.c if ((COND) && !(SKB)->tstamp) \ COND 51 tools/perf/util/perf_event_attr_fprintf.c bit_name(COND), bit_name(CALL_STACK), bit_name(IND_JUMP),