CON0_BASE_EN       59 drivers/clk/mediatek/clk-pll.c 	return (readl(pll->base_addr + REG_CON0) & CON0_BASE_EN) != 0;
CON0_BASE_EN      281 drivers/clk/mediatek/clk-pll.c 	r &= ~CON0_BASE_EN;