mmio_base 31 arch/arm/mach-pxa/pxa3xx-ulpi.c void __iomem *mmio_base; mmio_base 41 arch/arm/mach-pxa/pxa3xx-ulpi.c return __raw_readl(u2d->mmio_base + reg); mmio_base 46 arch/arm/mach-pxa/pxa3xx-ulpi.c __raw_writel(val, u2d->mmio_base + reg); mmio_base 225 arch/arm/mach-pxa/pxa3xx-ulpi.c u2d->otg->io_priv = u2d->mmio_base; mmio_base 311 arch/arm/mach-pxa/pxa3xx-ulpi.c u2d->mmio_base = ioremap(r->start, resource_size(r)); mmio_base 312 arch/arm/mach-pxa/pxa3xx-ulpi.c if (!u2d->mmio_base) { mmio_base 339 arch/arm/mach-pxa/pxa3xx-ulpi.c iounmap(u2d->mmio_base); mmio_base 363 arch/arm/mach-pxa/pxa3xx-ulpi.c iounmap(u2d->mmio_base); mmio_base 142 arch/arm/plat-pxa/ssp.c ssp->mmio_base = devm_ioremap(dev, res->start, resource_size(res)); mmio_base 143 arch/arm/plat-pxa/ssp.c if (ssp->mmio_base == NULL) { mmio_base 51 arch/ia64/include/asm/io.h unsigned long mmio_base; /* base in MMIO space */ mmio_base 128 arch/ia64/include/asm/io.h return (void *) (space->mmio_base | offset); mmio_base 450 arch/ia64/kernel/setup.c io_space[0].mmio_base = ia64_iobase; mmio_base 126 arch/ia64/pci/pci.c u64 mmio_base; mmio_base 132 arch/ia64/pci/pci.c mmio_base = (u64) ioremap(phys_base, 0); mmio_base 134 arch/ia64/pci/pci.c if (io_space[i].mmio_base == mmio_base && mmio_base 145 arch/ia64/pci/pci.c io_space[i].mmio_base = mmio_base; mmio_base 177 arch/ia64/pci/pci.c base = __pa(io_space[space_nr].mmio_base); mmio_base 159 arch/powerpc/kernel/udbg_16550.c unsigned char __iomem *mmio_base; mmio_base 188 arch/powerpc/kernel/udbg_16550.c return in_8(udbg_uart.mmio_base + (reg * udbg_uart_stride)); mmio_base 193 arch/powerpc/kernel/udbg_16550.c out_8(udbg_uart.mmio_base + (reg * udbg_uart_stride), data); mmio_base 201 arch/powerpc/kernel/udbg_16550.c udbg_uart.mmio_base = addr; mmio_base 94 drivers/acpi/acpi_lpss.c void __iomem *mmio_base; mmio_base 132 drivers/acpi/acpi_lpss.c val = readl(pdata->mmio_base + offset); mmio_base 133 drivers/acpi/acpi_lpss.c writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset); mmio_base 135 drivers/acpi/acpi_lpss.c val = readl(pdata->mmio_base + LPSS_UART_CPR); mmio_base 138 drivers/acpi/acpi_lpss.c val = readl(pdata->mmio_base + offset); mmio_base 140 drivers/acpi/acpi_lpss.c writel(val, pdata->mmio_base + offset); mmio_base 150 drivers/acpi/acpi_lpss.c val = readl(pdata->mmio_base + offset); mmio_base 152 drivers/acpi/acpi_lpss.c writel(val, pdata->mmio_base + offset); mmio_base 198 drivers/acpi/acpi_lpss.c if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset)) mmio_base 201 drivers/acpi/acpi_lpss.c writel(0, pdata->mmio_base + LPSS_I2C_ENABLE); mmio_base 409 drivers/acpi/acpi_lpss.c if (!pdata->mmio_base mmio_base 414 drivers/acpi/acpi_lpss.c prv_base = pdata->mmio_base + dev_desc->prv_offset; mmio_base 663 drivers/acpi/acpi_lpss.c pdata->mmio_base = ioremap(rentry->res->start, mmio_base 670 drivers/acpi/acpi_lpss.c if (!pdata->mmio_base) { mmio_base 717 drivers/acpi/acpi_lpss.c return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg); mmio_base 723 drivers/acpi/acpi_lpss.c writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg); mmio_base 743 drivers/acpi/acpi_lpss.c if (WARN_ON(!pdata || !pdata->mmio_base)) { mmio_base 1283 drivers/acpi/acpi_lpss.c if (pdata->mmio_base && mmio_base 1323 drivers/acpi/acpi_lpss.c if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR)) mmio_base 473 drivers/ata/pata_pdc2027x.c void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; mmio_base 479 drivers/ata/pata_pdc2027x.c bccrl = ioread32(mmio_base + PDC_BYTE_COUNT) & 0x7fff; mmio_base 480 drivers/ata/pata_pdc2027x.c bccrh = ioread32(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff; mmio_base 483 drivers/ata/pata_pdc2027x.c bccrlv = ioread32(mmio_base + PDC_BYTE_COUNT) & 0x7fff; mmio_base 484 drivers/ata/pata_pdc2027x.c bccrhv = ioread32(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff; mmio_base 514 drivers/ata/pata_pdc2027x.c void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; mmio_base 533 drivers/ata/pata_pdc2027x.c pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); mmio_base 573 drivers/ata/pata_pdc2027x.c iowrite16(pll_ctl, mmio_base + PDC_PLL_CTL); mmio_base 574 drivers/ata/pata_pdc2027x.c ioread16(mmio_base + PDC_PLL_CTL); /* flush */ mmio_base 584 drivers/ata/pata_pdc2027x.c pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); mmio_base 600 drivers/ata/pata_pdc2027x.c void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; mmio_base 607 drivers/ata/pata_pdc2027x.c scr = ioread32(mmio_base + PDC_SYS_CTL); mmio_base 609 drivers/ata/pata_pdc2027x.c iowrite32(scr | (0x01 << 14), mmio_base + PDC_SYS_CTL); mmio_base 610 drivers/ata/pata_pdc2027x.c ioread32(mmio_base + PDC_SYS_CTL); /* flush */ mmio_base 624 drivers/ata/pata_pdc2027x.c scr = ioread32(mmio_base + PDC_SYS_CTL); mmio_base 626 drivers/ata/pata_pdc2027x.c iowrite32(scr & ~(0x01 << 14), mmio_base + PDC_SYS_CTL); mmio_base 627 drivers/ata/pata_pdc2027x.c ioread32(mmio_base + PDC_SYS_CTL); /* flush */ mmio_base 705 drivers/ata/pata_pdc2027x.c void __iomem *mmio_base; mmio_base 729 drivers/ata/pata_pdc2027x.c mmio_base = host->iomap[PDC_MMIO_BAR]; mmio_base 734 drivers/ata/pata_pdc2027x.c pdc_ata_setup_port(&ap->ioaddr, mmio_base + cmd_offset[i]); mmio_base 735 drivers/ata/pata_pdc2027x.c ap->ioaddr.bmdma_addr = mmio_base + bmdma_offset[i]; mmio_base 343 drivers/ata/pata_sil680.c void __iomem *mmio_base; mmio_base 383 drivers/ata/pata_sil680.c mmio_base = host->iomap[SIL680_MMIO_BAR]; mmio_base 384 drivers/ata/pata_sil680.c host->ports[0]->ioaddr.bmdma_addr = mmio_base + 0x00; mmio_base 385 drivers/ata/pata_sil680.c host->ports[0]->ioaddr.cmd_addr = mmio_base + 0x80; mmio_base 386 drivers/ata/pata_sil680.c host->ports[0]->ioaddr.ctl_addr = mmio_base + 0x8a; mmio_base 387 drivers/ata/pata_sil680.c host->ports[0]->ioaddr.altstatus_addr = mmio_base + 0x8a; mmio_base 389 drivers/ata/pata_sil680.c host->ports[1]->ioaddr.bmdma_addr = mmio_base + 0x08; mmio_base 390 drivers/ata/pata_sil680.c host->ports[1]->ioaddr.cmd_addr = mmio_base + 0xc0; mmio_base 391 drivers/ata/pata_sil680.c host->ports[1]->ioaddr.ctl_addr = mmio_base + 0xca; mmio_base 392 drivers/ata/pata_sil680.c host->ports[1]->ioaddr.altstatus_addr = mmio_base + 0xca; mmio_base 581 drivers/ata/pdc_adma.c void __iomem *mmio_base; mmio_base 603 drivers/ata/pdc_adma.c mmio_base = host->iomap[ADMA_MMIO_BAR]; mmio_base 613 drivers/ata/pdc_adma.c void __iomem *port_base = ADMA_ATA_REGS(mmio_base, port_no); mmio_base 614 drivers/ata/pdc_adma.c unsigned int offset = port_base - mmio_base; mmio_base 234 drivers/ata/sata_inic162x.c void __iomem *mmio_base; mmio_base 268 drivers/ata/sata_inic162x.c return hpriv->mmio_base + ap->port_no * PORT_SIZE; mmio_base 426 drivers/ata/sata_inic162x.c host_irq_stat = readw(hpriv->mmio_base + HOST_IRQ_STAT); mmio_base 754 drivers/ata/sata_inic162x.c static int init_controller(void __iomem *mmio_base, u16 hctl) mmio_base 764 drivers/ata/sata_inic162x.c writew(hctl | HCTL_SOFTRST, mmio_base + HOST_CTL); mmio_base 765 drivers/ata/sata_inic162x.c readw(mmio_base + HOST_CTL); /* flush */ mmio_base 769 drivers/ata/sata_inic162x.c val = readw(mmio_base + HOST_CTL); mmio_base 779 drivers/ata/sata_inic162x.c void __iomem *port_base = mmio_base + i * PORT_SIZE; mmio_base 786 drivers/ata/sata_inic162x.c writew(hctl & ~HCTL_IRQOFF, mmio_base + HOST_CTL); mmio_base 787 drivers/ata/sata_inic162x.c val = readw(mmio_base + HOST_IRQ_MASK); mmio_base 789 drivers/ata/sata_inic162x.c writew(val, mmio_base + HOST_IRQ_MASK); mmio_base 806 drivers/ata/sata_inic162x.c rc = init_controller(hpriv->mmio_base, hpriv->cached_hctl); mmio_base 854 drivers/ata/sata_inic162x.c hpriv->mmio_base = iomap[mmio_bar]; mmio_base 855 drivers/ata/sata_inic162x.c hpriv->cached_hctl = readw(hpriv->mmio_base + HOST_CTL); mmio_base 871 drivers/ata/sata_inic162x.c rc = init_controller(hpriv->mmio_base, hpriv->cached_hctl); mmio_base 1280 drivers/ata/sata_mv.c static void mv_dump_all_regs(void __iomem *mmio_base, int port, mmio_base 1284 drivers/ata/sata_mv.c void __iomem *hc_base = mv_hc_base(mmio_base, mmio_base 1306 drivers/ata/sata_mv.c mv_dump_mem(mmio_base+0xc00, 0x3c); mmio_base 1307 drivers/ata/sata_mv.c mv_dump_mem(mmio_base+0xd00, 0x34); mmio_base 1308 drivers/ata/sata_mv.c mv_dump_mem(mmio_base+0xf00, 0x4); mmio_base 1309 drivers/ata/sata_mv.c mv_dump_mem(mmio_base+0x1d00, 0x6c); mmio_base 1311 drivers/ata/sata_mv.c hc_base = mv_hc_base(mmio_base, hc); mmio_base 1316 drivers/ata/sata_mv.c port_base = mv_port_base(mmio_base, p); mmio_base 1584 drivers/ata/sata_nv.c void __iomem *mmio_base = ap->host->iomap[NV_MMIO_BAR]; mmio_base 1588 drivers/ata/sata_nv.c mask = readb(mmio_base + NV_INT_ENABLE_CK804); mmio_base 1590 drivers/ata/sata_nv.c writeb(mask, mmio_base + NV_INT_ENABLE_CK804); mmio_base 1595 drivers/ata/sata_nv.c void __iomem *mmio_base = ap->host->iomap[NV_MMIO_BAR]; mmio_base 1599 drivers/ata/sata_nv.c writeb(NV_INT_ALL << shift, mmio_base + NV_INT_STATUS_CK804); mmio_base 1601 drivers/ata/sata_nv.c mask = readb(mmio_base + NV_INT_ENABLE_CK804); mmio_base 1603 drivers/ata/sata_nv.c writeb(mask, mmio_base + NV_INT_ENABLE_CK804); mmio_base 1608 drivers/ata/sata_nv.c void __iomem *mmio_base = ap->host->iomap[NV_MMIO_BAR]; mmio_base 1612 drivers/ata/sata_nv.c writel(NV_INT_ALL_MCP55 << shift, mmio_base + NV_INT_STATUS_MCP55); mmio_base 1614 drivers/ata/sata_nv.c mask = readl(mmio_base + NV_INT_ENABLE_MCP55); mmio_base 1616 drivers/ata/sata_nv.c writel(mask, mmio_base + NV_INT_ENABLE_MCP55); mmio_base 1621 drivers/ata/sata_nv.c void __iomem *mmio_base = ap->host->iomap[NV_MMIO_BAR]; mmio_base 1625 drivers/ata/sata_nv.c writel(NV_INT_ALL_MCP55 << shift, mmio_base + NV_INT_STATUS_MCP55); mmio_base 1627 drivers/ata/sata_nv.c mask = readl(mmio_base + NV_INT_ENABLE_MCP55); mmio_base 1629 drivers/ata/sata_nv.c writel(mask, mmio_base + NV_INT_ENABLE_MCP55); mmio_base 192 drivers/ata/sata_qstor.c u8 __iomem *mmio_base = qs_mmio_base(ap->host); mmio_base 194 drivers/ata/sata_qstor.c writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */ mmio_base 200 drivers/ata/sata_qstor.c u8 __iomem *mmio_base = qs_mmio_base(ap->host); mmio_base 203 drivers/ata/sata_qstor.c writeb(1, mmio_base + QS_HCT_CTRL); /* enable host interrupts */ mmio_base 359 drivers/ata/sata_qstor.c u8 __iomem *mmio_base = qs_mmio_base(host); mmio_base 362 drivers/ata/sata_qstor.c u32 sff0 = readl(mmio_base + QS_HST_SFF); mmio_base 363 drivers/ata/sata_qstor.c u32 sff1 = readl(mmio_base + QS_HST_SFF + 4); mmio_base 469 drivers/ata/sata_qstor.c void __iomem *mmio_base = qs_mmio_base(ap->host); mmio_base 470 drivers/ata/sata_qstor.c void __iomem *chan = mmio_base + (ap->port_no * 0x4000); mmio_base 491 drivers/ata/sata_qstor.c void __iomem *mmio_base = qs_mmio_base(host); mmio_base 493 drivers/ata/sata_qstor.c writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */ mmio_base 494 drivers/ata/sata_qstor.c writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */ mmio_base 499 drivers/ata/sata_qstor.c void __iomem *mmio_base = host->iomap[QS_MMIO_BAR]; mmio_base 502 drivers/ata/sata_qstor.c writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */ mmio_base 503 drivers/ata/sata_qstor.c writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */ mmio_base 507 drivers/ata/sata_qstor.c u8 __iomem *chan = mmio_base + (port_no * 0x4000); mmio_base 512 drivers/ata/sata_qstor.c writeb(QS_SERD3_PHY_ENA, mmio_base + QS_HVS_SERD3); /* enable phy */ mmio_base 515 drivers/ata/sata_qstor.c u8 __iomem *chan = mmio_base + (port_no * 0x4000); mmio_base 524 drivers/ata/sata_qstor.c writeb(1, mmio_base + QS_HCT_CTRL); /* enable host interrupts */ mmio_base 537 drivers/ata/sata_qstor.c static int qs_set_dma_masks(struct pci_dev *pdev, void __iomem *mmio_base) mmio_base 539 drivers/ata/sata_qstor.c u32 bus_info = readl(mmio_base + QS_HID_HPHY); mmio_base 254 drivers/ata/sata_sil.c void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; mmio_base 255 drivers/ata/sata_sil.c void __iomem *bmdma2 = mmio_base + sil_port[ap->port_no].bmdma2; mmio_base 280 drivers/ata/sata_sil.c void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; mmio_base 281 drivers/ata/sata_sil.c void __iomem *bmdma2 = mmio_base + sil_port[ap->port_no].bmdma2; mmio_base 347 drivers/ata/sata_sil.c void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; mmio_base 348 drivers/ata/sata_sil.c void __iomem *addr = mmio_base + sil_port[ap->port_no].xfer_mode; mmio_base 508 drivers/ata/sata_sil.c void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR]; mmio_base 516 drivers/ata/sata_sil.c u32 bmdma2 = readl(mmio_base + sil_port[ap->port_no].bmdma2); mmio_base 537 drivers/ata/sata_sil.c void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; mmio_base 541 drivers/ata/sata_sil.c writel(0, mmio_base + sil_port[ap->port_no].sien); mmio_base 544 drivers/ata/sata_sil.c tmp = readl(mmio_base + SIL_SYSCFG); mmio_base 546 drivers/ata/sata_sil.c writel(tmp, mmio_base + SIL_SYSCFG); mmio_base 547 drivers/ata/sata_sil.c readl(mmio_base + SIL_SYSCFG); /* flush */ mmio_base 565 drivers/ata/sata_sil.c void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; mmio_base 574 drivers/ata/sata_sil.c writel(SIL_SIEN_N, mmio_base + sil_port[ap->port_no].sien); mmio_base 577 drivers/ata/sata_sil.c tmp = readl(mmio_base + SIL_SYSCFG); mmio_base 579 drivers/ata/sata_sil.c writel(tmp, mmio_base + SIL_SYSCFG); mmio_base 652 drivers/ata/sata_sil.c void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR]; mmio_base 664 drivers/ata/sata_sil.c mmio_base + sil_port[i].fifo_cfg); mmio_base 674 drivers/ata/sata_sil.c tmp = readl(mmio_base + sil_port[i].sfis_cfg); mmio_base 680 drivers/ata/sata_sil.c writel(tmp & ~0x3, mmio_base + sil_port[i].sfis_cfg); mmio_base 687 drivers/ata/sata_sil.c tmp = readl(mmio_base + sil_port[2].bmdma); mmio_base 690 drivers/ata/sata_sil.c mmio_base + sil_port[2].bmdma); mmio_base 726 drivers/ata/sata_sil.c void __iomem *mmio_base; mmio_base 764 drivers/ata/sata_sil.c mmio_base = host->iomap[SIL_MMIO_BAR]; mmio_base 770 drivers/ata/sata_sil.c ioaddr->cmd_addr = mmio_base + sil_port[i].tf; mmio_base 772 drivers/ata/sata_sil.c ioaddr->ctl_addr = mmio_base + sil_port[i].ctl; mmio_base 773 drivers/ata/sata_sil.c ioaddr->bmdma_addr = mmio_base + sil_port[i].bmdma; mmio_base 774 drivers/ata/sata_sil.c ioaddr->scr_addr = mmio_base + sil_port[i].scr; mmio_base 414 drivers/ata/sata_svw.c void __iomem *mmio_base; mmio_base 459 drivers/ata/sata_svw.c mmio_base = host->iomap[bar_pos]; mmio_base 468 drivers/ata/sata_svw.c k2_sata_setup_port(&ap->ioaddr, mmio_base + offset); mmio_base 482 drivers/ata/sata_svw.c writel(readl(mmio_base + K2_SATA_SICR1_OFFSET) & ~0x00040000, mmio_base 483 drivers/ata/sata_svw.c mmio_base + K2_SATA_SICR1_OFFSET); mmio_base 486 drivers/ata/sata_svw.c writel(0xffffffff, mmio_base + K2_SATA_SCR_ERROR_OFFSET); mmio_base 487 drivers/ata/sata_svw.c writel(0x0, mmio_base + K2_SATA_SIM_OFFSET); mmio_base 780 drivers/ata/sata_sx4.c void __iomem *mmio_base; mmio_base 789 drivers/ata/sata_sx4.c mmio_base = host->iomap[PDC_MMIO_BAR]; mmio_base 792 drivers/ata/sata_sx4.c mmio_base += PDC_CHIP0_OFS; mmio_base 793 drivers/ata/sata_sx4.c mask = readl(mmio_base + PDC_20621_SEQMASK); mmio_base 824 drivers/ata/sata_sx4.c mmio_base); mmio_base 332 drivers/ata/sata_vsc.c void __iomem *mmio_base; mmio_base 359 drivers/ata/sata_vsc.c mmio_base = host->iomap[VSC_MMIO_BAR]; mmio_base 365 drivers/ata/sata_vsc.c vsc_sata_setup_port(&ap->ioaddr, mmio_base + offset); mmio_base 988 drivers/gpu/drm/i915/gem/i915_gem_context.c u32 base = engine->mmio_base; mmio_base 48 drivers/gpu/drm/i915/gt/intel_engine.h __ENGINE_REG_OP(op__, (engine__), reg__((engine__)->mmio_base)) mmio_base 58 drivers/gpu/drm/i915/gt/intel_engine.h lower_reg__((engine__)->mmio_base), \ mmio_base 59 drivers/gpu/drm/i915/gt/intel_engine.h upper_reg__((engine__)->mmio_base)) mmio_base 62 drivers/gpu/drm/i915/gt/intel_engine.h __ENGINE_REG_OP(read, (engine__), reg__((engine__)->mmio_base, (idx__))) mmio_base 65 drivers/gpu/drm/i915/gt/intel_engine.h __ENGINE_REG_OP(op__, (engine__), reg__((engine__)->mmio_base), (val__)) mmio_base 301 drivers/gpu/drm/i915/gt/intel_engine_cs.c engine->mmio_base = __engine_mmio_base(gt->i915, info->mmio_bases); mmio_base 857 drivers/gpu/drm/i915/gt/intel_engine_cs.c const u32 base = engine->mmio_base; mmio_base 952 drivers/gpu/drm/i915/gt/intel_engine_cs.c u32 mmio_base = engine->mmio_base; mmio_base 961 drivers/gpu/drm/i915/gt/intel_engine_cs.c intel_uncore_read(uncore, RING_INSTDONE(mmio_base)); mmio_base 979 drivers/gpu/drm/i915/gt/intel_engine_cs.c intel_uncore_read(uncore, RING_INSTDONE(mmio_base)); mmio_base 996 drivers/gpu/drm/i915/gt/intel_engine_cs.c intel_uncore_read(uncore, RING_INSTDONE(mmio_base)); mmio_base 1013 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (I915_SELFTEST_ONLY(!engine->mmio_base)) mmio_base 1405 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tMMIO base: 0x%08x\n", engine->mmio_base); mmio_base 308 drivers/gpu/drm/i915/gt/intel_engine_types.h u32 mmio_base; mmio_base 841 drivers/gpu/drm/i915/gt/intel_lrc.c u32 base = engine->mmio_base; mmio_base 1936 drivers/gpu/drm/i915/gt/intel_lrc.c u32 base = engine->mmio_base; mmio_base 3114 drivers/gpu/drm/i915/gt/intel_lrc.c u32 base = engine->mmio_base; mmio_base 3195 drivers/gpu/drm/i915/gt/intel_lrc.c u32 base = engine->mmio_base; mmio_base 447 drivers/gpu/drm/i915/gt/intel_reset.c const i915_reg_t reg = RING_RESET_CTL(engine->mmio_base); mmio_base 484 drivers/gpu/drm/i915/gt/intel_reset.c RING_RESET_CTL(engine->mmio_base), mmio_base 563 drivers/gpu/drm/i915/gt/intel_ringbuffer.c hwsp = RING_HWS_PGA_GEN6(engine->mmio_base); mmio_base 565 drivers/gpu/drm/i915/gt/intel_ringbuffer.c hwsp = RING_HWS_PGA(engine->mmio_base); mmio_base 586 drivers/gpu/drm/i915/gt/intel_ringbuffer.c RING_INSTPM(engine->mmio_base), mmio_base 609 drivers/gpu/drm/i915/gt/intel_ringbuffer.c RING_MI_MODE(engine->mmio_base), mmio_base 705 drivers/gpu/drm/i915/gt/intel_ringbuffer.c RING_CTL(engine->mmio_base), mmio_base 742 drivers/gpu/drm/i915/gt/intel_ringbuffer.c const u32 base = engine->mmio_base; mmio_base 1540 drivers/gpu/drm/i915/gt/intel_ringbuffer.c *cs++ = i915_mmio_reg_offset(RING_PP_DIR_DCLV(engine->mmio_base)); mmio_base 1544 drivers/gpu/drm/i915/gt/intel_ringbuffer.c *cs++ = i915_mmio_reg_offset(RING_PP_DIR_BASE(engine->mmio_base)); mmio_base 1563 drivers/gpu/drm/i915/gt/intel_ringbuffer.c *cs++ = i915_mmio_reg_offset(RING_PP_DIR_BASE(engine->mmio_base)); mmio_base 1619 drivers/gpu/drm/i915/gt/intel_ringbuffer.c RING_PSMI_CTL(signaller->mmio_base)); mmio_base 1672 drivers/gpu/drm/i915/gt/intel_ringbuffer.c last_reg = RING_PSMI_CTL(signaller->mmio_base); mmio_base 1183 drivers/gpu/drm/i915/gt/intel_workarounds.c whitelist_reg_ext(w, _MMIO(0x2000 + engine->mmio_base), mmio_base 1186 drivers/gpu/drm/i915/gt/intel_workarounds.c whitelist_reg_ext(w, _MMIO(0x2014 + engine->mmio_base), mmio_base 1189 drivers/gpu/drm/i915/gt/intel_workarounds.c whitelist_reg_ext(w, _MMIO(0x23B0 + engine->mmio_base), mmio_base 1237 drivers/gpu/drm/i915/gt/intel_workarounds.c const u32 base = engine->mmio_base; mmio_base 1381 drivers/gpu/drm/i915/gt/intel_workarounds.c RING_SEMA_WAIT_POLL(engine->mmio_base), mmio_base 76 drivers/gpu/drm/i915/gt/selftest_workarounds.c const u32 base = engine->mmio_base; mmio_base 160 drivers/gpu/drm/i915/gt/selftest_workarounds.c RING_NOPID(engine->mmio_base); mmio_base 851 drivers/gpu/drm/i915/gvt/cmd_parser.c ring_base = dev_priv->engine[s->ring_id]->mmio_base; mmio_base 43 drivers/gpu/drm/i915/gvt/execlist.c (gvt->dev_priv->engine[ring_id]->mmio_base + (offset)) mmio_base 160 drivers/gpu/drm/i915/gvt/handlers.c if (engine->mmio_base == offset) mmio_base 523 drivers/gpu/drm/i915/gvt/handlers.c ring_base = dev_priv->engine[ring_id]->mmio_base; mmio_base 1651 drivers/gpu/drm/i915/gvt/handlers.c ring_base = dev_priv->engine[ring_id]->mmio_base; mmio_base 215 drivers/gpu/drm/i915/gvt/scheduler.c u32 ring_base = dev_priv->engine[ring_id]->mmio_base; mmio_base 581 drivers/gpu/drm/i915/gvt/scheduler.c ring_base = dev_priv->engine[workload->ring_id]->mmio_base; mmio_base 830 drivers/gpu/drm/i915/gvt/scheduler.c ring_base = dev_priv->engine[workload->ring_id]->mmio_base; mmio_base 1129 drivers/gpu/drm/i915/i915_gpu_error.c mmio = RING_HWS_PGA_GEN6(engine->mmio_base); mmio_base 1132 drivers/gpu/drm/i915/i915_gpu_error.c mmio = RING_HWS_PGA(engine->mmio_base); mmio_base 1156 drivers/gpu/drm/i915/i915_gpu_error.c u32 base = engine->mmio_base; mmio_base 403 drivers/gpu/drm/i915/i915_reg.h #define GEN11_VCS_SFC_FORCED_LOCK(engine) _MMIO((engine)->mmio_base + 0x88C) mmio_base 405 drivers/gpu/drm/i915/i915_reg.h #define GEN11_VCS_SFC_LOCK_STATUS(engine) _MMIO((engine)->mmio_base + 0x890) mmio_base 409 drivers/gpu/drm/i915/i915_reg.h #define GEN11_VECS_SFC_FORCED_LOCK(engine) _MMIO((engine)->mmio_base + 0x201C) mmio_base 411 drivers/gpu/drm/i915/i915_reg.h #define GEN11_VECS_SFC_LOCK_ACK(engine) _MMIO((engine)->mmio_base + 0x2018) mmio_base 413 drivers/gpu/drm/i915/i915_reg.h #define GEN11_VECS_SFC_USAGE(engine) _MMIO((engine)->mmio_base + 0x2014) mmio_base 7172 drivers/gpu/drm/i915/intel_pm.c I915_WRITE(RING_MAX_IDLE(engine->mmio_base), 10); mmio_base 7253 drivers/gpu/drm/i915/intel_pm.c I915_WRITE(RING_MAX_IDLE(engine->mmio_base), 10); mmio_base 7331 drivers/gpu/drm/i915/intel_pm.c I915_WRITE(RING_MAX_IDLE(engine->mmio_base), 10); mmio_base 7414 drivers/gpu/drm/i915/intel_pm.c I915_WRITE(RING_MAX_IDLE(engine->mmio_base), 10); mmio_base 7922 drivers/gpu/drm/i915/intel_pm.c I915_WRITE(RING_MAX_IDLE(engine->mmio_base), 10); mmio_base 8015 drivers/gpu/drm/i915/intel_pm.c I915_WRITE(RING_MAX_IDLE(engine->mmio_base), 10); mmio_base 190 drivers/gpu/drm/i915/selftests/intel_uncore.c i915_reg_t mmio = _MMIO(engine->mmio_base + r->offset); mmio_base 191 drivers/gpu/drm/i915/selftests/intel_uncore.c u32 __iomem *reg = uncore->regs + engine->mmio_base + r->offset; mmio_base 424 drivers/gpu/drm/mga/mga_dma.c dev_priv->mmio_base = pci_resource_start(dev->pdev, 1); mmio_base 729 drivers/gpu/drm/mga/mga_dma.c err = drm_legacy_addmap(dev, dev_priv->mmio_base, dev_priv->mmio_size, mmio_base 131 drivers/gpu/drm/mga/mga_drv.h resource_size_t mmio_base; /**< Bus address of base of MMIO. */ mmio_base 681 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c void __iomem *mmio_base, struct mdp5_cfg_handler *cfg_hnd) mmio_base 18 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.h void __iomem *mmio_base, struct mdp5_cfg_handler *cfg_hnd); mmio_base 2894 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c u64 mmio_base, mmio_size; mmio_base 2919 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c mmio_base = device->func->resource_addr(device, 0); mmio_base 2924 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c map = ioremap(mmio_base, 0x102000); mmio_base 3120 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c device->pri = ioremap(mmio_base, mmio_size); mmio_base 575 drivers/gpu/drm/savage/savage_bci.c unsigned long mmio_base, fb_base, fb_size, aperture_base; mmio_base 587 drivers/gpu/drm/savage/savage_bci.c mmio_base = fb_base + SAVAGE_FB_SIZE_S3; mmio_base 609 drivers/gpu/drm/savage/savage_bci.c mmio_base = pci_resource_start(dev->pdev, 0); mmio_base 628 drivers/gpu/drm/savage/savage_bci.c mmio_base = pci_resource_start(dev->pdev, 0); mmio_base 637 drivers/gpu/drm/savage/savage_bci.c ret = drm_legacy_addmap(dev, mmio_base, SAVAGE_MMIO_SIZE, mmio_base 68 drivers/input/keyboard/ep93xx_keypad.c void __iomem *mmio_base; mmio_base 87 drivers/input/keyboard/ep93xx_keypad.c status = __raw_readl(keypad->mmio_base + KEY_REG); mmio_base 151 drivers/input/keyboard/ep93xx_keypad.c __raw_writel(val, keypad->mmio_base + KEY_INIT); mmio_base 270 drivers/input/keyboard/ep93xx_keypad.c keypad->mmio_base = ioremap(res->start, resource_size(res)); mmio_base 271 drivers/input/keyboard/ep93xx_keypad.c if (keypad->mmio_base == NULL) { mmio_base 333 drivers/input/keyboard/ep93xx_keypad.c iounmap(keypad->mmio_base); mmio_base 356 drivers/input/keyboard/ep93xx_keypad.c iounmap(keypad->mmio_base); mmio_base 48 drivers/input/keyboard/imx_keypad.c void __iomem *mmio_base; mmio_base 93 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPDR); mmio_base 95 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPDR); mmio_base 97 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPCR); mmio_base 99 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPCR); mmio_base 103 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPCR); mmio_base 105 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPCR); mmio_base 112 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPDR); mmio_base 114 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPDR); mmio_base 126 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPDR); mmio_base 134 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPDR); mmio_base 136 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPDR); mmio_base 258 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPSR); mmio_base 260 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPSR); mmio_base 262 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPSR); mmio_base 265 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPSR); mmio_base 276 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPSR); mmio_base 278 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPSR); mmio_base 280 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPSR); mmio_base 283 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPSR); mmio_base 292 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPSR); mmio_base 298 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPSR); mmio_base 320 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPCR); mmio_base 323 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPCR); mmio_base 326 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPDR); mmio_base 328 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPDR); mmio_base 331 drivers/input/keyboard/imx_keypad.c writew(0xff00, keypad->mmio_base + KDDR); mmio_base 337 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPSR); mmio_base 340 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPSR); mmio_base 345 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPSR); mmio_base 353 drivers/input/keyboard/imx_keypad.c reg_val = readw(keypad->mmio_base + KPSR); mmio_base 356 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPSR); mmio_base 360 drivers/input/keyboard/imx_keypad.c writew(reg_val, keypad->mmio_base + KPCR); mmio_base 398 drivers/input/keyboard/imx_keypad.c if ((readw(keypad->mmio_base + KPDR) & keypad->rows_en_mask) == 0) { mmio_base 455 drivers/input/keyboard/imx_keypad.c keypad->mmio_base = devm_platform_ioremap_resource(pdev, 0); mmio_base 456 drivers/input/keyboard/imx_keypad.c if (IS_ERR(keypad->mmio_base)) mmio_base 457 drivers/input/keyboard/imx_keypad.c return PTR_ERR(keypad->mmio_base); mmio_base 530 drivers/input/keyboard/imx_keypad.c unsigned short reg_val = readw(kbd->mmio_base + KPSR); mmio_base 545 drivers/input/keyboard/imx_keypad.c writew(reg_val, kbd->mmio_base + KPSR); mmio_base 90 drivers/input/keyboard/pxa27x_keypad.c #define keypad_readl(off) __raw_readl(keypad->mmio_base + (off)) mmio_base 91 drivers/input/keyboard/pxa27x_keypad.c #define keypad_writel(off, v) __raw_writel((v), keypad->mmio_base + (off)) mmio_base 101 drivers/input/keyboard/pxa27x_keypad.c void __iomem *mmio_base; mmio_base 752 drivers/input/keyboard/pxa27x_keypad.c keypad->mmio_base = devm_ioremap_resource(&pdev->dev, res); mmio_base 753 drivers/input/keyboard/pxa27x_keypad.c if (IS_ERR(keypad->mmio_base)) mmio_base 754 drivers/input/keyboard/pxa27x_keypad.c return PTR_ERR(keypad->mmio_base); mmio_base 23 drivers/input/keyboard/pxa930_rotary.c void __iomem *mmio_base; mmio_base 31 drivers/input/keyboard/pxa930_rotary.c uint32_t sbcr = __raw_readl(r->mmio_base + SBCR); mmio_base 33 drivers/input/keyboard/pxa930_rotary.c __raw_writel(sbcr | SBCR_ERSB, r->mmio_base + SBCR); mmio_base 34 drivers/input/keyboard/pxa930_rotary.c __raw_writel(sbcr & ~SBCR_ERSB, r->mmio_base + SBCR); mmio_base 43 drivers/input/keyboard/pxa930_rotary.c ercr = __raw_readl(r->mmio_base + ERCR) & 0xf; mmio_base 110 drivers/input/keyboard/pxa930_rotary.c r->mmio_base = ioremap_nocache(res->start, resource_size(res)); mmio_base 111 drivers/input/keyboard/pxa930_rotary.c if (r->mmio_base == NULL) { mmio_base 166 drivers/input/keyboard/pxa930_rotary.c iounmap(r->mmio_base); mmio_base 178 drivers/input/keyboard/pxa930_rotary.c iounmap(r->mmio_base); mmio_base 44 drivers/input/mouse/pxa930_trkball.c void __iomem *mmio_base; mmio_base 58 drivers/input/mouse/pxa930_trkball.c tbcntr = __raw_readl(trkball->mmio_base + TBCNTR); mmio_base 60 drivers/input/mouse/pxa930_trkball.c if (tbcntr == __raw_readl(trkball->mmio_base + TBCNTR)) { mmio_base 69 drivers/input/mouse/pxa930_trkball.c __raw_writel(TBSBC_TBSBC, trkball->mmio_base + TBSBC); mmio_base 70 drivers/input/mouse/pxa930_trkball.c __raw_writel(0, trkball->mmio_base + TBSBC); mmio_base 80 drivers/input/mouse/pxa930_trkball.c __raw_writel(v, trkball->mmio_base + TBCR); mmio_base 83 drivers/input/mouse/pxa930_trkball.c if (__raw_readl(trkball->mmio_base + TBCR) == v) mmio_base 101 drivers/input/mouse/pxa930_trkball.c tbcr = __raw_readl(trkball->mmio_base + TBCR); mmio_base 107 drivers/input/mouse/pxa930_trkball.c tbcr = __raw_readl(trkball->mmio_base + TBCR); mmio_base 111 drivers/input/mouse/pxa930_trkball.c __raw_writel(TBSBC_TBSBC, trkball->mmio_base + TBSBC); mmio_base 112 drivers/input/mouse/pxa930_trkball.c __raw_writel(0, trkball->mmio_base + TBSBC); mmio_base 115 drivers/input/mouse/pxa930_trkball.c __raw_readl(trkball->mmio_base + TBCR)); mmio_base 129 drivers/input/mouse/pxa930_trkball.c uint32_t tbcr = __raw_readl(trkball->mmio_base + TBCR); mmio_base 170 drivers/input/mouse/pxa930_trkball.c trkball->mmio_base = ioremap_nocache(res->start, resource_size(res)); mmio_base 171 drivers/input/mouse/pxa930_trkball.c if (!trkball->mmio_base) { mmio_base 221 drivers/input/mouse/pxa930_trkball.c iounmap(trkball->mmio_base); mmio_base 234 drivers/input/mouse/pxa930_trkball.c iounmap(trkball->mmio_base); mmio_base 645 drivers/iommu/amd_iommu.c head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); mmio_base 646 drivers/iommu/amd_iommu.c tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); mmio_base 653 drivers/iommu/amd_iommu.c writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); mmio_base 681 drivers/iommu/amd_iommu.c head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); mmio_base 682 drivers/iommu/amd_iommu.c tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); mmio_base 714 drivers/iommu/amd_iommu.c writel(head, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); mmio_base 720 drivers/iommu/amd_iommu.c head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); mmio_base 721 drivers/iommu/amd_iommu.c tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); mmio_base 743 drivers/iommu/amd_iommu.c head = readl(iommu->mmio_base + MMIO_GA_HEAD_OFFSET); mmio_base 744 drivers/iommu/amd_iommu.c tail = readl(iommu->mmio_base + MMIO_GA_TAIL_OFFSET); mmio_base 758 drivers/iommu/amd_iommu.c writel(head, iommu->mmio_base + MMIO_GA_HEAD_OFFSET); mmio_base 788 drivers/iommu/amd_iommu.c u32 status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); mmio_base 793 drivers/iommu/amd_iommu.c iommu->mmio_base + MMIO_STATUS_OFFSET); mmio_base 825 drivers/iommu/amd_iommu.c status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); mmio_base 872 drivers/iommu/amd_iommu.c writel(iommu->cmd_buf_tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); mmio_base 1051 drivers/iommu/amd_iommu.c iommu->cmd_buf_head = readl(iommu->mmio_base + mmio_base 274 drivers/iommu/amd_iommu_init.c ctrl = readq(iommu->mmio_base + MMIO_CONTROL_OFFSET); mmio_base 354 drivers/iommu/amd_iommu_init.c memcpy_toio(iommu->mmio_base + MMIO_EXCL_BASE_OFFSET, mmio_base 358 drivers/iommu/amd_iommu_init.c memcpy_toio(iommu->mmio_base + MMIO_EXCL_LIMIT_OFFSET, mmio_base 367 drivers/iommu/amd_iommu_init.c BUG_ON(iommu->mmio_base == NULL); mmio_base 371 drivers/iommu/amd_iommu_init.c memcpy_toio(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET, mmio_base 380 drivers/iommu/amd_iommu_init.c ctrl = readq(iommu->mmio_base + MMIO_CONTROL_OFFSET); mmio_base 382 drivers/iommu/amd_iommu_init.c writeq(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); mmio_base 389 drivers/iommu/amd_iommu_init.c ctrl = readq(iommu->mmio_base + MMIO_CONTROL_OFFSET); mmio_base 391 drivers/iommu/amd_iommu_init.c writeq(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); mmio_base 398 drivers/iommu/amd_iommu_init.c ctrl = readq(iommu->mmio_base + MMIO_CONTROL_OFFSET); mmio_base 401 drivers/iommu/amd_iommu_init.c writeq(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); mmio_base 412 drivers/iommu/amd_iommu_init.c if (!iommu->mmio_base) mmio_base 448 drivers/iommu/amd_iommu_init.c if (iommu->mmio_base) mmio_base 449 drivers/iommu/amd_iommu_init.c iounmap(iommu->mmio_base); mmio_base 612 drivers/iommu/amd_iommu_init.c writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); mmio_base 613 drivers/iommu/amd_iommu_init.c writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); mmio_base 633 drivers/iommu/amd_iommu_init.c memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET, mmio_base 669 drivers/iommu/amd_iommu_init.c memcpy_toio(iommu->mmio_base + MMIO_EVT_BUF_OFFSET, mmio_base 673 drivers/iommu/amd_iommu_init.c writel(0x00, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); mmio_base 674 drivers/iommu/amd_iommu_init.c writel(0x00, iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); mmio_base 710 drivers/iommu/amd_iommu_init.c memcpy_toio(iommu->mmio_base + MMIO_PPR_LOG_OFFSET, mmio_base 714 drivers/iommu/amd_iommu_init.c writel(0x00, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); mmio_base 715 drivers/iommu/amd_iommu_init.c writel(0x00, iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); mmio_base 749 drivers/iommu/amd_iommu_init.c status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); mmio_base 759 drivers/iommu/amd_iommu_init.c status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); mmio_base 789 drivers/iommu/amd_iommu_init.c memcpy_toio(iommu->mmio_base + MMIO_GA_LOG_BASE_OFFSET, mmio_base 793 drivers/iommu/amd_iommu_init.c memcpy_toio(iommu->mmio_base + MMIO_GA_LOG_TAIL_OFFSET, mmio_base 795 drivers/iommu/amd_iommu_init.c writel(0x00, iommu->mmio_base + MMIO_GA_HEAD_OFFSET); mmio_base 796 drivers/iommu/amd_iommu_init.c writel(0x00, iommu->mmio_base + MMIO_GA_TAIL_OFFSET); mmio_base 879 drivers/iommu/amd_iommu_init.c lo = readl(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET); mmio_base 880 drivers/iommu/amd_iommu_init.c hi = readl(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET + 4); mmio_base 1550 drivers/iommu/amd_iommu_init.c iommu->mmio_base = iommu_map_mmio_space(iommu->mmio_phys, mmio_base 1552 drivers/iommu/amd_iommu_init.c if (!iommu->mmio_base) mmio_base 1687 drivers/iommu/amd_iommu_init.c val = readl(iommu->mmio_base + MMIO_CNTR_CONF_OFFSET); mmio_base 1758 drivers/iommu/amd_iommu_init.c low = readl(iommu->mmio_base + MMIO_EXT_FEATURES); mmio_base 1759 drivers/iommu/amd_iommu_init.c high = readl(iommu->mmio_base + MMIO_EXT_FEATURES + 4); mmio_base 1959 drivers/iommu/amd_iommu_init.c u32 addr_lo = readl(iommu->mmio_base + MMIO_MSI_ADDR_LO_OFFSET); mmio_base 1960 drivers/iommu/amd_iommu_init.c u32 addr_hi = readl(iommu->mmio_base + MMIO_MSI_ADDR_HI_OFFSET); mmio_base 1961 drivers/iommu/amd_iommu_init.c u32 data = readl(iommu->mmio_base + MMIO_MSI_DATA_OFFSET); mmio_base 1977 drivers/iommu/amd_iommu_init.c writeq(val, iommu->mmio_base + MMIO_INTCAPXT_EVT_OFFSET); mmio_base 1978 drivers/iommu/amd_iommu_init.c writeq(val, iommu->mmio_base + MMIO_INTCAPXT_PPR_OFFSET); mmio_base 1979 drivers/iommu/amd_iommu_init.c writeq(val, iommu->mmio_base + MMIO_INTCAPXT_GALOG_OFFSET); mmio_base 3158 drivers/iommu/amd_iommu_init.c writel((u32)val, iommu->mmio_base + offset); mmio_base 3159 drivers/iommu/amd_iommu_init.c writel((val >> 32), iommu->mmio_base + offset + 4); mmio_base 3161 drivers/iommu/amd_iommu_init.c *value = readl(iommu->mmio_base + offset + 4); mmio_base 3163 drivers/iommu/amd_iommu_init.c *value |= readl(iommu->mmio_base + offset); mmio_base 508 drivers/iommu/amd_iommu_types.h u8 __iomem *mmio_base; mmio_base 2331 drivers/media/platform/omap3isp/isp.c isp->mmio_base[map_idx] = mmio_base 2333 drivers/media/platform/omap3isp/isp.c if (IS_ERR(isp->mmio_base[map_idx])) mmio_base 2334 drivers/media/platform/omap3isp/isp.c return PTR_ERR(isp->mmio_base[map_idx]); mmio_base 2377 drivers/media/platform/omap3isp/isp.c isp->mmio_base[i] = mmio_base 2378 drivers/media/platform/omap3isp/isp.c isp->mmio_base[0] + isp_res_maps[m].offset[i]; mmio_base 2381 drivers/media/platform/omap3isp/isp.c isp->mmio_base[i] = mmio_base 2382 drivers/media/platform/omap3isp/isp.c isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1] mmio_base 182 drivers/media/platform/omap3isp/isp.h void __iomem *mmio_base[OMAP3_ISP_IOMEM_LAST]; mmio_base 280 drivers/media/platform/omap3isp/isp.h return __raw_readl(isp->mmio_base[isp_mmio_range] + reg_offset); mmio_base 294 drivers/media/platform/omap3isp/isp.h __raw_writel(reg_value, isp->mmio_base[isp_mmio_range] + reg_offset); mmio_base 131 drivers/mtd/nand/raw/cs553x_nand.c void __iomem *mmio_base = this->legacy.IO_ADDR_R; mmio_base 134 drivers/mtd/nand/raw/cs553x_nand.c writeb(ctl, mmio_base + MM_NAND_CTL); mmio_base 142 drivers/mtd/nand/raw/cs553x_nand.c void __iomem *mmio_base = this->legacy.IO_ADDR_R; mmio_base 143 drivers/mtd/nand/raw/cs553x_nand.c unsigned char foo = readb(mmio_base + MM_NAND_STS); mmio_base 150 drivers/mtd/nand/raw/cs553x_nand.c void __iomem *mmio_base = this->legacy.IO_ADDR_R; mmio_base 152 drivers/mtd/nand/raw/cs553x_nand.c writeb(0x07, mmio_base + MM_NAND_ECC_CTL); mmio_base 159 drivers/mtd/nand/raw/cs553x_nand.c void __iomem *mmio_base = this->legacy.IO_ADDR_R; mmio_base 161 drivers/mtd/nand/raw/cs553x_nand.c ecc = readl(mmio_base + MM_NAND_STS); mmio_base 317 drivers/mtd/nand/raw/cs553x_nand.c void __iomem *mmio_base; mmio_base 323 drivers/mtd/nand/raw/cs553x_nand.c mmio_base = this->legacy.IO_ADDR_R; mmio_base 331 drivers/mtd/nand/raw/cs553x_nand.c iounmap(mmio_base); mmio_base 46 drivers/net/ethernet/broadcom/bgmac.c if (!ring->mmio_base) mmio_base 53 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, mmio_base 56 drivers/net/ethernet/broadcom/bgmac.c val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS); mmio_base 68 drivers/net/ethernet/broadcom/bgmac.c ring->mmio_base, val); mmio_base 71 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, 0); mmio_base 73 drivers/net/ethernet/broadcom/bgmac.c ring->mmio_base + BGMAC_DMA_TX_STATUS, mmio_base 77 drivers/net/ethernet/broadcom/bgmac.c ring->mmio_base); mmio_base 79 drivers/net/ethernet/broadcom/bgmac.c val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS); mmio_base 82 drivers/net/ethernet/broadcom/bgmac.c ring->mmio_base); mmio_base 91 drivers/net/ethernet/broadcom/bgmac.c ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL); mmio_base 107 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, ctl); mmio_base 200 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_INDEX, mmio_base 225 drivers/net/ethernet/broadcom/bgmac.c ring->mmio_base); mmio_base 242 drivers/net/ethernet/broadcom/bgmac.c empty_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS); mmio_base 294 drivers/net/ethernet/broadcom/bgmac.c if (!ring->mmio_base) mmio_base 297 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL, 0); mmio_base 299 drivers/net/ethernet/broadcom/bgmac.c ring->mmio_base + BGMAC_DMA_RX_STATUS, mmio_base 303 drivers/net/ethernet/broadcom/bgmac.c ring->mmio_base); mmio_base 311 drivers/net/ethernet/broadcom/bgmac.c ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL); mmio_base 330 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL, ctl); mmio_base 372 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_INDEX, mmio_base 418 drivers/net/ethernet/broadcom/bgmac.c end_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_STATUS); mmio_base 510 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO, mmio_base 512 drivers/net/ethernet/broadcom/bgmac.c if (bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO)) mmio_base 516 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO, mmio_base 518 drivers/net/ethernet/broadcom/bgmac.c if (bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO)) mmio_base 633 drivers/net/ethernet/broadcom/bgmac.c ring->mmio_base = ring_base[i]; mmio_base 642 drivers/net/ethernet/broadcom/bgmac.c ring->mmio_base); mmio_base 658 drivers/net/ethernet/broadcom/bgmac.c ring->mmio_base = ring_base[i]; mmio_base 667 drivers/net/ethernet/broadcom/bgmac.c ring->mmio_base); mmio_base 696 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO, mmio_base 698 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGHI, mmio_base 714 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO, mmio_base 716 drivers/net/ethernet/broadcom/bgmac.c bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGHI, mmio_base 467 drivers/net/ethernet/broadcom/bgmac.h u16 mmio_base; mmio_base 439 drivers/net/wireless/broadcom/b43/dma.c static int b43_dmacontroller_rx_reset(struct b43_wldev *dev, u16 mmio_base, mmio_base 449 drivers/net/wireless/broadcom/b43/dma.c b43_write32(dev, mmio_base + offset, 0); mmio_base 453 drivers/net/wireless/broadcom/b43/dma.c value = b43_read32(dev, mmio_base + offset); mmio_base 478 drivers/net/wireless/broadcom/b43/dma.c static int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, mmio_base 490 drivers/net/wireless/broadcom/b43/dma.c value = b43_read32(dev, mmio_base + offset); mmio_base 507 drivers/net/wireless/broadcom/b43/dma.c b43_write32(dev, mmio_base + offset, 0); mmio_base 511 drivers/net/wireless/broadcom/b43/dma.c value = b43_read32(dev, mmio_base + offset); mmio_base 756 drivers/net/wireless/broadcom/b43/dma.c b43_dmacontroller_tx_reset(ring->dev, ring->mmio_base, mmio_base 764 drivers/net/wireless/broadcom/b43/dma.c b43_dmacontroller_rx_reset(ring->dev, ring->mmio_base, mmio_base 803 drivers/net/wireless/broadcom/b43/dma.c u16 mmio_base; mmio_base 822 drivers/net/wireless/broadcom/b43/dma.c mmio_base = b43_dmacontroller_base(0, 0); mmio_base 823 drivers/net/wireless/broadcom/b43/dma.c b43_write32(dev, mmio_base + B43_DMA32_TXCTL, B43_DMA32_TXADDREXT_MASK); mmio_base 824 drivers/net/wireless/broadcom/b43/dma.c tmp = b43_read32(dev, mmio_base + B43_DMA32_TXCTL); mmio_base 858 drivers/net/wireless/broadcom/b43/dma.c ring->mmio_base = b43_dmacontroller_base(type, controller_index); mmio_base 1740 drivers/net/wireless/broadcom/b43/dma.c u16 mmio_base, bool enable) mmio_base 1745 drivers/net/wireless/broadcom/b43/dma.c ctl = b43_read32(dev, mmio_base + B43_DMA64_RXCTL); mmio_base 1749 drivers/net/wireless/broadcom/b43/dma.c b43_write32(dev, mmio_base + B43_DMA64_RXCTL, ctl); mmio_base 1751 drivers/net/wireless/broadcom/b43/dma.c ctl = b43_read32(dev, mmio_base + B43_DMA32_RXCTL); mmio_base 1755 drivers/net/wireless/broadcom/b43/dma.c b43_write32(dev, mmio_base + B43_DMA32_RXCTL, ctl); mmio_base 1765 drivers/net/wireless/broadcom/b43/dma.c u16 mmio_base; mmio_base 1769 drivers/net/wireless/broadcom/b43/dma.c mmio_base = b43_dmacontroller_base(type, engine_index); mmio_base 1770 drivers/net/wireless/broadcom/b43/dma.c direct_fifo_rx(dev, type, mmio_base, enable); mmio_base 251 drivers/net/wireless/broadcom/b43/dma.h u16 mmio_base; mmio_base 280 drivers/net/wireless/broadcom/b43/dma.h return b43_read32(ring->dev, ring->mmio_base + offset); mmio_base 285 drivers/net/wireless/broadcom/b43/dma.h b43_write32(ring->dev, ring->mmio_base + offset, value); mmio_base 135 drivers/net/wireless/broadcom/b43/pio.c q->mmio_base = index_to_pioqueue_base(dev, index) + mmio_base 169 drivers/net/wireless/broadcom/b43/pio.c q->mmio_base = index_to_pioqueue_base(dev, index) + mmio_base 330 drivers/net/wireless/broadcom/b43/pio.c q->mmio_base + B43_PIO_TXDATA, mmio_base 342 drivers/net/wireless/broadcom/b43/pio.c q->mmio_base + B43_PIO_TXDATA, mmio_base 384 drivers/net/wireless/broadcom/b43/pio.c q->mmio_base + B43_PIO8_TXDATA, mmio_base 412 drivers/net/wireless/broadcom/b43/pio.c q->mmio_base + B43_PIO8_TXDATA, mmio_base 658 drivers/net/wireless/broadcom/b43/pio.c q->mmio_base + B43_PIO8_RXDATA, mmio_base 662 drivers/net/wireless/broadcom/b43/pio.c q->mmio_base + B43_PIO_RXDATA, mmio_base 706 drivers/net/wireless/broadcom/b43/pio.c q->mmio_base + B43_PIO8_RXDATA, mmio_base 714 drivers/net/wireless/broadcom/b43/pio.c q->mmio_base + B43_PIO8_RXDATA, mmio_base 733 drivers/net/wireless/broadcom/b43/pio.c q->mmio_base + B43_PIO_RXDATA, mmio_base 741 drivers/net/wireless/broadcom/b43/pio.c q->mmio_base + B43_PIO_RXDATA, mmio_base 72 drivers/net/wireless/broadcom/b43/pio.h u16 mmio_base; mmio_base 101 drivers/net/wireless/broadcom/b43/pio.h u16 mmio_base; mmio_base 111 drivers/net/wireless/broadcom/b43/pio.h return b43_read16(q->dev, q->mmio_base + offset); mmio_base 116 drivers/net/wireless/broadcom/b43/pio.h return b43_read32(q->dev, q->mmio_base + offset); mmio_base 122 drivers/net/wireless/broadcom/b43/pio.h b43_write16(q->dev, q->mmio_base + offset, value); mmio_base 128 drivers/net/wireless/broadcom/b43/pio.h b43_write32(q->dev, q->mmio_base + offset, value); mmio_base 134 drivers/net/wireless/broadcom/b43/pio.h return b43_read16(q->dev, q->mmio_base + offset); mmio_base 139 drivers/net/wireless/broadcom/b43/pio.h return b43_read32(q->dev, q->mmio_base + offset); mmio_base 145 drivers/net/wireless/broadcom/b43/pio.h b43_write16(q->dev, q->mmio_base + offset, value); mmio_base 151 drivers/net/wireless/broadcom/b43/pio.h b43_write32(q->dev, q->mmio_base + offset, value); mmio_base 338 drivers/net/wireless/broadcom/b43legacy/dma.c u16 mmio_base, mmio_base 348 drivers/net/wireless/broadcom/b43legacy/dma.c b43legacy_write32(dev, mmio_base + offset, 0); mmio_base 351 drivers/net/wireless/broadcom/b43legacy/dma.c value = b43legacy_read32(dev, mmio_base + offset); mmio_base 369 drivers/net/wireless/broadcom/b43legacy/dma.c u16 mmio_base, mmio_base 380 drivers/net/wireless/broadcom/b43legacy/dma.c value = b43legacy_read32(dev, mmio_base + offset); mmio_base 389 drivers/net/wireless/broadcom/b43legacy/dma.c b43legacy_write32(dev, mmio_base + offset, 0); mmio_base 392 drivers/net/wireless/broadcom/b43legacy/dma.c value = b43legacy_read32(dev, mmio_base + offset); mmio_base 572 drivers/net/wireless/broadcom/b43legacy/dma.c b43legacy_dmacontroller_tx_reset(ring->dev, ring->mmio_base, mmio_base 576 drivers/net/wireless/broadcom/b43legacy/dma.c b43legacy_dmacontroller_rx_reset(ring->dev, ring->mmio_base, mmio_base 609 drivers/net/wireless/broadcom/b43legacy/dma.c u16 mmio_base; mmio_base 611 drivers/net/wireless/broadcom/b43legacy/dma.c mmio_base = b43legacy_dmacontroller_base(0, 0); mmio_base 613 drivers/net/wireless/broadcom/b43legacy/dma.c mmio_base + B43legacy_DMA32_TXCTL, mmio_base 615 drivers/net/wireless/broadcom/b43legacy/dma.c tmp = b43legacy_read32(dev, mmio_base + mmio_base 686 drivers/net/wireless/broadcom/b43legacy/dma.c ring->mmio_base = b43legacy_dmacontroller_base(type, controller_index); mmio_base 734 drivers/net/wireless/broadcom/b43legacy/dma.c " %d/%d\n", (unsigned int)(ring->type), ring->mmio_base, mmio_base 145 drivers/net/wireless/broadcom/b43legacy/dma.h u16 mmio_base; mmio_base 171 drivers/net/wireless/broadcom/b43legacy/dma.h return b43legacy_read32(ring->dev, ring->mmio_base + offset); mmio_base 178 drivers/net/wireless/broadcom/b43legacy/dma.h b43legacy_write32(ring->dev, ring->mmio_base + offset, value); mmio_base 113 drivers/net/wireless/broadcom/b43legacy/pio.c switch (queue->mmio_base) { mmio_base 328 drivers/net/wireless/broadcom/b43legacy/pio.c queue->mmio_base = pio_mmio_base; mmio_base 341 drivers/net/wireless/broadcom/b43legacy/pio.c qsize = b43legacy_read16(dev, queue->mmio_base mmio_base 546 drivers/net/wireless/broadcom/b43legacy/pio.c B43legacy_WARN_ON(queue->mmio_base != B43legacy_MMIO_PIO1_BASE); mmio_base 586 drivers/net/wireless/broadcom/b43legacy/pio.c if (unlikely(len == 0 && queue->mmio_base != mmio_base 592 drivers/net/wireless/broadcom/b43legacy/pio.c if (queue->mmio_base == B43legacy_MMIO_PIO4_BASE) mmio_base 604 drivers/net/wireless/broadcom/b43legacy/pio.c (queue->mmio_base == B43legacy_MMIO_PIO1_BASE), mmio_base 608 drivers/net/wireless/broadcom/b43legacy/pio.c if (queue->mmio_base == B43legacy_MMIO_PIO4_BASE) { mmio_base 53 drivers/net/wireless/broadcom/b43legacy/pio.h u16 mmio_base; mmio_base 87 drivers/net/wireless/broadcom/b43legacy/pio.h return b43legacy_read16(queue->dev, queue->mmio_base + offset); mmio_base 94 drivers/net/wireless/broadcom/b43legacy/pio.h b43legacy_write16(queue->dev, queue->mmio_base + offset, value); mmio_base 298 drivers/pci/controller/pci-hyperv.c u64 mmio_base; mmio_base 2625 drivers/pci/controller/pci-hyperv.c d0_entry->mmio_base = hbus->mem_config->start; mmio_base 103 drivers/pci/hotplug/shpchp.h unsigned long mmio_base; mmio_base 597 drivers/pci/hotplug/shpchp_hpc.c release_mem_region(ctrl->mmio_base, ctrl->mmio_size); mmio_base 933 drivers/pci/hotplug/shpchp_hpc.c ctrl->mmio_base = pci_resource_start(pdev, 0); mmio_base 967 drivers/pci/hotplug/shpchp_hpc.c ctrl->mmio_base = mmio_base 982 drivers/pci/hotplug/shpchp_hpc.c if (!request_mem_region(ctrl->mmio_base, ctrl->mmio_size, MY_NAME)) { mmio_base 988 drivers/pci/hotplug/shpchp_hpc.c ctrl->creg = ioremap(ctrl->mmio_base, ctrl->mmio_size); mmio_base 991 drivers/pci/hotplug/shpchp_hpc.c ctrl->mmio_size, ctrl->mmio_base); mmio_base 992 drivers/pci/hotplug/shpchp_hpc.c release_mem_region(ctrl->mmio_base, ctrl->mmio_size); mmio_base 3751 drivers/pci/quirks.c void __iomem *mmio_base; mmio_base 3758 drivers/pci/quirks.c mmio_base = pci_iomap(dev, 0, 0); mmio_base 3759 drivers/pci/quirks.c if (!mmio_base) mmio_base 3762 drivers/pci/quirks.c iowrite32(0x00000002, mmio_base + MSG_CTL); mmio_base 3770 drivers/pci/quirks.c iowrite32(0x00000005, mmio_base + SOUTH_CHICKEN2); mmio_base 3772 drivers/pci/quirks.c val = ioread32(mmio_base + PCH_PP_CONTROL) & 0xfffffffe; mmio_base 3773 drivers/pci/quirks.c iowrite32(val, mmio_base + PCH_PP_CONTROL); mmio_base 3777 drivers/pci/quirks.c val = ioread32(mmio_base + PCH_PP_STATUS); mmio_base 3785 drivers/pci/quirks.c iowrite32(0x00000002, mmio_base + NSDE_PWR_STATE); mmio_base 3787 drivers/pci/quirks.c pci_iounmap(dev, mmio_base); mmio_base 83 drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c u32 mmio_base, pcu_base; mmio_base 95 drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c ret = pci_read_config_dword(pdev, 0xD0, &mmio_base); mmio_base 104 drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c base_addr = (u64)mmio_base << 23 | (u64) pcu_base << 12; mmio_base 31 drivers/pwm/pwm-imx1.c void __iomem *mmio_base; mmio_base 86 drivers/pwm/pwm-imx1.c max = readl(imx->mmio_base + MX1_PWMP); mmio_base 89 drivers/pwm/pwm-imx1.c writel(max - p, imx->mmio_base + MX1_PWMS); mmio_base 104 drivers/pwm/pwm-imx1.c value = readl(imx->mmio_base + MX1_PWMC); mmio_base 106 drivers/pwm/pwm-imx1.c writel(value, imx->mmio_base + MX1_PWMC); mmio_base 116 drivers/pwm/pwm-imx1.c value = readl(imx->mmio_base + MX1_PWMC); mmio_base 118 drivers/pwm/pwm-imx1.c writel(value, imx->mmio_base + MX1_PWMC); mmio_base 172 drivers/pwm/pwm-imx1.c imx->mmio_base = devm_ioremap_resource(&pdev->dev, r); mmio_base 173 drivers/pwm/pwm-imx1.c if (IS_ERR(imx->mmio_base)) mmio_base 174 drivers/pwm/pwm-imx1.c return PTR_ERR(imx->mmio_base); mmio_base 86 drivers/pwm/pwm-imx27.c void __iomem *mmio_base; mmio_base 130 drivers/pwm/pwm-imx27.c val = readl(imx->mmio_base + MX3_PWMCR); mmio_base 151 drivers/pwm/pwm-imx27.c val = readl(imx->mmio_base + MX3_PWMPR); mmio_base 160 drivers/pwm/pwm-imx27.c val = readl(imx->mmio_base + MX3_PWMSAR); mmio_base 178 drivers/pwm/pwm-imx27.c writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR); mmio_base 181 drivers/pwm/pwm-imx27.c cr = readl(imx->mmio_base + MX3_PWMCR); mmio_base 198 drivers/pwm/pwm-imx27.c sr = readl(imx->mmio_base + MX3_PWMSR); mmio_base 205 drivers/pwm/pwm-imx27.c sr = readl(imx->mmio_base + MX3_PWMSR); mmio_base 261 drivers/pwm/pwm-imx27.c writel(duty_cycles, imx->mmio_base + MX3_PWMSAR); mmio_base 262 drivers/pwm/pwm-imx27.c writel(period_cycles, imx->mmio_base + MX3_PWMPR); mmio_base 273 drivers/pwm/pwm-imx27.c writel(cr, imx->mmio_base + MX3_PWMCR); mmio_base 275 drivers/pwm/pwm-imx27.c writel(0, imx->mmio_base + MX3_PWMCR); mmio_base 332 drivers/pwm/pwm-imx27.c imx->mmio_base = devm_platform_ioremap_resource(pdev, 0); mmio_base 333 drivers/pwm/pwm-imx27.c if (IS_ERR(imx->mmio_base)) mmio_base 334 drivers/pwm/pwm-imx27.c return PTR_ERR(imx->mmio_base); mmio_base 48 drivers/pwm/pwm-pxa.c void __iomem *mmio_base; mmio_base 96 drivers/pwm/pwm-pxa.c writel(prescale, pc->mmio_base + offset + PWMCR); mmio_base 97 drivers/pwm/pwm-pxa.c writel(dc, pc->mmio_base + offset + PWMDCR); mmio_base 98 drivers/pwm/pwm-pxa.c writel(pv, pc->mmio_base + offset + PWMPCR); mmio_base 197 drivers/pwm/pwm-pxa.c pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r); mmio_base 198 drivers/pwm/pwm-pxa.c if (IS_ERR(pwm->mmio_base)) mmio_base 199 drivers/pwm/pwm-pxa.c return PTR_ERR(pwm->mmio_base); mmio_base 54 drivers/pwm/pwm-spear.c void __iomem *mmio_base; mmio_base 67 drivers/pwm/pwm-spear.c return readl_relaxed(chip->mmio_base + (num << 4) + offset); mmio_base 74 drivers/pwm/pwm-spear.c writel_relaxed(val, chip->mmio_base + (num << 4) + offset); mmio_base 186 drivers/pwm/pwm-spear.c pc->mmio_base = devm_ioremap_resource(&pdev->dev, r); mmio_base 187 drivers/pwm/pwm-spear.c if (IS_ERR(pc->mmio_base)) mmio_base 188 drivers/pwm/pwm-spear.c return PTR_ERR(pc->mmio_base); mmio_base 215 drivers/pwm/pwm-spear.c val = readl_relaxed(pc->mmio_base + PWMMCR); mmio_base 217 drivers/pwm/pwm-spear.c writel_relaxed(val, pc->mmio_base + PWMMCR); mmio_base 37 drivers/pwm/pwm-tiecap.c void __iomem *mmio_base; mmio_base 78 drivers/pwm/pwm-tiecap.c value = readw(pc->mmio_base + ECCTL2); mmio_base 83 drivers/pwm/pwm-tiecap.c writew(value, pc->mmio_base + ECCTL2); mmio_base 87 drivers/pwm/pwm-tiecap.c writel(duty_cycles, pc->mmio_base + CAP2); mmio_base 88 drivers/pwm/pwm-tiecap.c writel(period_cycles, pc->mmio_base + CAP1); mmio_base 95 drivers/pwm/pwm-tiecap.c writel(duty_cycles, pc->mmio_base + CAP4); mmio_base 96 drivers/pwm/pwm-tiecap.c writel(period_cycles, pc->mmio_base + CAP3); mmio_base 100 drivers/pwm/pwm-tiecap.c value = readw(pc->mmio_base + ECCTL2); mmio_base 103 drivers/pwm/pwm-tiecap.c writew(value, pc->mmio_base + ECCTL2); mmio_base 119 drivers/pwm/pwm-tiecap.c value = readw(pc->mmio_base + ECCTL2); mmio_base 128 drivers/pwm/pwm-tiecap.c writew(value, pc->mmio_base + ECCTL2); mmio_base 147 drivers/pwm/pwm-tiecap.c value = readw(pc->mmio_base + ECCTL2); mmio_base 149 drivers/pwm/pwm-tiecap.c writew(value, pc->mmio_base + ECCTL2); mmio_base 163 drivers/pwm/pwm-tiecap.c value = readw(pc->mmio_base + ECCTL2); mmio_base 165 drivers/pwm/pwm-tiecap.c writew(value, pc->mmio_base + ECCTL2); mmio_base 234 drivers/pwm/pwm-tiecap.c pc->mmio_base = devm_ioremap_resource(&pdev->dev, r); mmio_base 235 drivers/pwm/pwm-tiecap.c if (IS_ERR(pc->mmio_base)) mmio_base 236 drivers/pwm/pwm-tiecap.c return PTR_ERR(pc->mmio_base); mmio_base 263 drivers/pwm/pwm-tiecap.c pc->ctx.ecctl2 = readw(pc->mmio_base + ECCTL2); mmio_base 264 drivers/pwm/pwm-tiecap.c pc->ctx.cap4 = readl(pc->mmio_base + CAP4); mmio_base 265 drivers/pwm/pwm-tiecap.c pc->ctx.cap3 = readl(pc->mmio_base + CAP3); mmio_base 271 drivers/pwm/pwm-tiecap.c writel(pc->ctx.cap3, pc->mmio_base + CAP3); mmio_base 272 drivers/pwm/pwm-tiecap.c writel(pc->ctx.cap4, pc->mmio_base + CAP4); mmio_base 273 drivers/pwm/pwm-tiecap.c writew(pc->ctx.ecctl2, pc->mmio_base + ECCTL2); mmio_base 110 drivers/pwm/pwm-tiehrpwm.c void __iomem *mmio_base; mmio_base 211 drivers/pwm/pwm-tiehrpwm.c ehrpwm_modify(pc->mmio_base, aqctl_reg, aqctl_mask, aqctl_val); mmio_base 278 drivers/pwm/pwm-tiehrpwm.c ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_CLKDIV_MASK, tb_divval); mmio_base 285 drivers/pwm/pwm-tiehrpwm.c ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_PRDLD_MASK, TBCTL_PRDLD_SHDW); mmio_base 287 drivers/pwm/pwm-tiehrpwm.c ehrpwm_write(pc->mmio_base, TBPRD, period_cycles); mmio_base 290 drivers/pwm/pwm-tiehrpwm.c ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_CTRMODE_MASK, mmio_base 300 drivers/pwm/pwm-tiehrpwm.c ehrpwm_write(pc->mmio_base, cmp_reg, duty_cycles); mmio_base 338 drivers/pwm/pwm-tiehrpwm.c ehrpwm_modify(pc->mmio_base, AQSFRC, AQSFRC_RLDCSF_MASK, mmio_base 341 drivers/pwm/pwm-tiehrpwm.c ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val); mmio_base 372 drivers/pwm/pwm-tiehrpwm.c ehrpwm_modify(pc->mmio_base, AQSFRC, AQSFRC_RLDCSF_MASK, mmio_base 374 drivers/pwm/pwm-tiehrpwm.c ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val); mmio_base 379 drivers/pwm/pwm-tiehrpwm.c ehrpwm_modify(pc->mmio_base, AQSFRC, AQSFRC_RLDCSF_MASK, mmio_base 382 drivers/pwm/pwm-tiehrpwm.c ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val); mmio_base 459 drivers/pwm/pwm-tiehrpwm.c pc->mmio_base = devm_ioremap_resource(&pdev->dev, r); mmio_base 460 drivers/pwm/pwm-tiehrpwm.c if (IS_ERR(pc->mmio_base)) mmio_base 461 drivers/pwm/pwm-tiehrpwm.c return PTR_ERR(pc->mmio_base); mmio_base 509 drivers/pwm/pwm-tiehrpwm.c pc->ctx.tbctl = ehrpwm_read(pc->mmio_base, TBCTL); mmio_base 510 drivers/pwm/pwm-tiehrpwm.c pc->ctx.tbprd = ehrpwm_read(pc->mmio_base, TBPRD); mmio_base 511 drivers/pwm/pwm-tiehrpwm.c pc->ctx.cmpa = ehrpwm_read(pc->mmio_base, CMPA); mmio_base 512 drivers/pwm/pwm-tiehrpwm.c pc->ctx.cmpb = ehrpwm_read(pc->mmio_base, CMPB); mmio_base 513 drivers/pwm/pwm-tiehrpwm.c pc->ctx.aqctla = ehrpwm_read(pc->mmio_base, AQCTLA); mmio_base 514 drivers/pwm/pwm-tiehrpwm.c pc->ctx.aqctlb = ehrpwm_read(pc->mmio_base, AQCTLB); mmio_base 515 drivers/pwm/pwm-tiehrpwm.c pc->ctx.aqsfrc = ehrpwm_read(pc->mmio_base, AQSFRC); mmio_base 516 drivers/pwm/pwm-tiehrpwm.c pc->ctx.aqcsfrc = ehrpwm_read(pc->mmio_base, AQCSFRC); mmio_base 523 drivers/pwm/pwm-tiehrpwm.c ehrpwm_write(pc->mmio_base, TBPRD, pc->ctx.tbprd); mmio_base 524 drivers/pwm/pwm-tiehrpwm.c ehrpwm_write(pc->mmio_base, CMPA, pc->ctx.cmpa); mmio_base 525 drivers/pwm/pwm-tiehrpwm.c ehrpwm_write(pc->mmio_base, CMPB, pc->ctx.cmpb); mmio_base 526 drivers/pwm/pwm-tiehrpwm.c ehrpwm_write(pc->mmio_base, AQCTLA, pc->ctx.aqctla); mmio_base 527 drivers/pwm/pwm-tiehrpwm.c ehrpwm_write(pc->mmio_base, AQCTLB, pc->ctx.aqctlb); mmio_base 528 drivers/pwm/pwm-tiehrpwm.c ehrpwm_write(pc->mmio_base, AQSFRC, pc->ctx.aqsfrc); mmio_base 529 drivers/pwm/pwm-tiehrpwm.c ehrpwm_write(pc->mmio_base, AQCSFRC, pc->ctx.aqcsfrc); mmio_base 530 drivers/pwm/pwm-tiehrpwm.c ehrpwm_write(pc->mmio_base, TBCTL, pc->ctx.tbctl); mmio_base 29 drivers/rtc/rtc-ep93xx.c void __iomem *mmio_base; mmio_base 39 drivers/rtc/rtc-ep93xx.c comp = readl(ep93xx_rtc->mmio_base + EP93XX_RTC_SWCOMP); mmio_base 57 drivers/rtc/rtc-ep93xx.c time = readl(ep93xx_rtc->mmio_base + EP93XX_RTC_DATA); mmio_base 68 drivers/rtc/rtc-ep93xx.c writel(secs + 1, ep93xx_rtc->mmio_base + EP93XX_RTC_LOAD); mmio_base 133 drivers/rtc/rtc-ep93xx.c ep93xx_rtc->mmio_base = devm_ioremap_resource(&pdev->dev, res); mmio_base 134 drivers/rtc/rtc-ep93xx.c if (IS_ERR(ep93xx_rtc->mmio_base)) mmio_base 135 drivers/rtc/rtc-ep93xx.c return PTR_ERR(ep93xx_rtc->mmio_base); mmio_base 75 drivers/scsi/megaraid.c #define RDINDOOR(adapter) readl((adapter)->mmio_base + 0x20) mmio_base 76 drivers/scsi/megaraid.c #define RDOUTDOOR(adapter) readl((adapter)->mmio_base + 0x2C) mmio_base 77 drivers/scsi/megaraid.c #define WRINDOOR(adapter,value) writel(value, (adapter)->mmio_base + 0x20) mmio_base 78 drivers/scsi/megaraid.c #define WROUTDOOR(adapter,value) writel(value, (adapter)->mmio_base + 0x2C) mmio_base 4254 drivers/scsi/megaraid.c adapter->mmio_base = (void __iomem *) mega_baseport; mmio_base 771 drivers/scsi/megaraid.h void __iomem *mmio_base; mmio_base 1243 drivers/scsi/myrb.c if (cb->mmio_base) { mmio_base 1245 drivers/scsi/myrb.c iounmap(cb->mmio_base); mmio_base 3534 drivers/scsi/myrb.c cb->mmio_base = ioremap_nocache(cb->pci_addr & PAGE_MASK, mmio_size); mmio_base 3535 drivers/scsi/myrb.c if (cb->mmio_base == NULL) { mmio_base 3541 drivers/scsi/myrb.c cb->io_base = cb->mmio_base + (cb->pci_addr & ~PAGE_MASK); mmio_base 740 drivers/scsi/myrb.h void __iomem *mmio_base; mmio_base 2274 drivers/scsi/myrs.c if (cs->mmio_base) { mmio_base 2276 drivers/scsi/myrs.c iounmap(cs->mmio_base); mmio_base 2282 drivers/scsi/myrs.c iounmap(cs->mmio_base); mmio_base 2314 drivers/scsi/myrs.c cs->mmio_base = ioremap_nocache(cs->pci_addr & PAGE_MASK, mmio_size); mmio_base 2315 drivers/scsi/myrs.c if (cs->mmio_base == NULL) { mmio_base 2321 drivers/scsi/myrs.c cs->io_base = cs->mmio_base + (cs->pci_addr & ~PAGE_MASK); mmio_base 889 drivers/scsi/myrs.h void __iomem *mmio_base; mmio_base 720 drivers/scsi/pcmcia/nsp_cs.c unsigned long mmio_base = SCpnt->device->host->base; mmio_base 773 drivers/scsi/pcmcia/nsp_cs.c nsp_mmio_fifo32_read(mmio_base, SCpnt->SCp.ptr, res >> 2); mmio_base 819 drivers/scsi/pcmcia/nsp_cs.c unsigned long mmio_base = SCpnt->device->host->base; mmio_base 872 drivers/scsi/pcmcia/nsp_cs.c nsp_mmio_fifo32_write(mmio_base, SCpnt->SCp.ptr, res >> 2); mmio_base 310 drivers/scsi/stex.c void __iomem *mmio_base; /* iomapped PCI memory space */ mmio_base 525 drivers/scsi/stex.c writel(hba->req_head, hba->mmio_base + IMR0); mmio_base 526 drivers/scsi/stex.c writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL); mmio_base 527 drivers/scsi/stex.c readl(hba->mmio_base + IDBL); /* flush */ mmio_base 555 drivers/scsi/stex.c writel((addr >> 16) >> 16, hba->mmio_base + YH2I_REQ_HI); mmio_base 556 drivers/scsi/stex.c writel(addr, hba->mmio_base + YH2I_REQ); mmio_base 558 drivers/scsi/stex.c writel((addr >> 16) >> 16, hba->mmio_base + YH2I_REQ_HI); mmio_base 559 drivers/scsi/stex.c readl(hba->mmio_base + YH2I_REQ_HI); /* flush */ mmio_base 560 drivers/scsi/stex.c writel(addr, hba->mmio_base + YH2I_REQ); mmio_base 561 drivers/scsi/stex.c readl(hba->mmio_base + YH2I_REQ); /* flush */ mmio_base 797 drivers/scsi/stex.c void __iomem *base = hba->mmio_base; mmio_base 885 drivers/scsi/stex.c void __iomem *base = hba->mmio_base; mmio_base 986 drivers/scsi/stex.c void __iomem *base = hba->mmio_base; mmio_base 1026 drivers/scsi/stex.c void __iomem *base = hba->mmio_base; mmio_base 1110 drivers/scsi/stex.c void __iomem *base = hba->mmio_base; mmio_base 1258 drivers/scsi/stex.c base = hba->mmio_base; mmio_base 1352 drivers/scsi/stex.c base = hba->mmio_base; mmio_base 1379 drivers/scsi/stex.c writel(SS_H2I_INT_RESET, hba->mmio_base + YH2I_INT); mmio_base 1380 drivers/scsi/stex.c readl(hba->mmio_base + YH2I_INT); mmio_base 1386 drivers/scsi/stex.c writel(SS_H2I_INT_RESET, hba->mmio_base + YH2I_INT); mmio_base 1688 drivers/scsi/stex.c hba->mmio_base = pci_ioremap_bar(pdev, 0); mmio_base 1689 drivers/scsi/stex.c if ( !hba->mmio_base) { mmio_base 1841 drivers/scsi/stex.c iounmap(hba->mmio_base); mmio_base 1920 drivers/scsi/stex.c iounmap(hba->mmio_base); mmio_base 1290 drivers/scsi/sym53c8xx_2/sym_glue.c np->mmio_ba = (u32)dev->mmio_base; mmio_base 1518 drivers/scsi/sym53c8xx_2/sym_glue.c device->mmio_base = bus_addr.start; mmio_base 1533 drivers/scsi/sym53c8xx_2/sym_glue.c if (device->mmio_base) mmio_base 193 drivers/scsi/sym53c8xx_2/sym_glue.h unsigned long mmio_base; mmio_base 93 drivers/scsi/ufs/tc-dwc-g210-pci.c void __iomem *mmio_base; mmio_base 122 drivers/scsi/ufs/tc-dwc-g210-pci.c mmio_base = pcim_iomap_table(pdev)[0]; mmio_base 132 drivers/scsi/ufs/tc-dwc-g210-pci.c err = ufshcd_init(hba, mmio_base, pdev->irq); mmio_base 1163 drivers/scsi/ufs/ufs-qcom.c host->dev_ref_clk_ctrl_mmio = hba->mmio_base + REG_UFS_CFG1; mmio_base 151 drivers/scsi/ufs/ufshcd-pci.c void __iomem *mmio_base; mmio_base 168 drivers/scsi/ufs/ufshcd-pci.c mmio_base = pcim_iomap_table(pdev)[0]; mmio_base 178 drivers/scsi/ufs/ufshcd-pci.c err = ufshcd_init(hba, mmio_base, pdev->irq); mmio_base 393 drivers/scsi/ufs/ufshcd-pltfrm.c void __iomem *mmio_base; mmio_base 397 drivers/scsi/ufs/ufshcd-pltfrm.c mmio_base = devm_platform_ioremap_resource(pdev, 0); mmio_base 398 drivers/scsi/ufs/ufshcd-pltfrm.c if (IS_ERR(mmio_base)) { mmio_base 399 drivers/scsi/ufs/ufshcd-pltfrm.c err = PTR_ERR(mmio_base); mmio_base 433 drivers/scsi/ufs/ufshcd-pltfrm.c err = ufshcd_init(hba, mmio_base, irq); mmio_base 8267 drivers/scsi/ufs/ufshcd.c int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) mmio_base 8273 drivers/scsi/ufs/ufshcd.c if (!mmio_base) { mmio_base 8280 drivers/scsi/ufs/ufshcd.c hba->mmio_base = mmio_base; mmio_base 532 drivers/scsi/ufs/ufshcd.h void __iomem *mmio_base; mmio_base 781 drivers/scsi/ufs/ufshcd.h writel((val), (hba)->mmio_base + (reg)) mmio_base 783 drivers/scsi/ufs/ufshcd.h readl((hba)->mmio_base + (reg)) mmio_base 87 drivers/soundwire/intel_init.c caps = ioread32(res->mmio_base + SDW_SHIM_BASE + SDW_SHIM_LCAP); mmio_base 126 drivers/soundwire/intel_init.c link->res.registers = res->mmio_base + SDW_LINK_BASE mmio_base 128 drivers/soundwire/intel_init.c link->res.shim = res->mmio_base + SDW_SHIM_BASE; mmio_base 129 drivers/soundwire/intel_init.c link->res.alh = res->mmio_base + SDW_ALH_BASE; mmio_base 233 drivers/spi/spi-pxa2xx-pci.c ssp->mmio_base = pcim_iomap_table(dev)[0]; mmio_base 1586 drivers/spi/spi-pxa2xx.c ssp->mmio_base = devm_ioremap_resource(&pdev->dev, res); mmio_base 1587 drivers/spi/spi-pxa2xx.c if (IS_ERR(ssp->mmio_base)) mmio_base 1671 drivers/spi/spi-pxa2xx.c if (!ssp->mmio_base) { mmio_base 1711 drivers/spi/spi-pxa2xx.c drv_data->ioaddr = ssp->mmio_base; mmio_base 3083 drivers/staging/emxx_udc/emxx_udc.c void __iomem *mmio_base; mmio_base 3092 drivers/staging/emxx_udc/emxx_udc.c mmio_base = devm_ioremap_resource(&pdev->dev, r); mmio_base 3093 drivers/staging/emxx_udc/emxx_udc.c if (IS_ERR(mmio_base)) mmio_base 3094 drivers/staging/emxx_udc/emxx_udc.c return PTR_ERR(mmio_base); mmio_base 3103 drivers/staging/emxx_udc/emxx_udc.c udc->p_regs = (struct fc_regs __iomem *)mmio_base; mmio_base 62 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c void __iomem *mmio_base; mmio_base 542 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c proc_priv->mmio_base = pcim_iomap_table(pdev)[MCHBAR]; mmio_base 548 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c (u64)proc_priv->mmio_base + mmio_base 552 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c rapl_mmio_priv.reg_unit = (u64)proc_priv->mmio_base + rapl_regs->reg_unit; mmio_base 92 drivers/thermal/st/st_thermal.h void __iomem *mmio_base; mmio_base 132 drivers/thermal/st/st_thermal_memmap.c sensor->mmio_base = devm_ioremap_resource(dev, res); mmio_base 133 drivers/thermal/st/st_thermal_memmap.c if (IS_ERR(sensor->mmio_base)) { mmio_base 135 drivers/thermal/st/st_thermal_memmap.c return PTR_ERR(sensor->mmio_base); mmio_base 138 drivers/thermal/st/st_thermal_memmap.c sensor->regmap = devm_regmap_init_mmio(dev, sensor->mmio_base, mmio_base 12 drivers/thermal/thermal_mmio.c void __iomem *mmio_base; mmio_base 13 drivers/thermal/thermal_mmio.c u32 (*read_mmio)(void __iomem *mmio_base); mmio_base 18 drivers/thermal/thermal_mmio.c static u32 thermal_mmio_readb(void __iomem *mmio_base) mmio_base 20 drivers/thermal/thermal_mmio.c return readb(mmio_base); mmio_base 29 drivers/thermal/thermal_mmio.c t = sensor->read_mmio(sensor->mmio_base) & sensor->mask; mmio_base 56 drivers/thermal/thermal_mmio.c sensor->mmio_base = devm_ioremap_resource(&pdev->dev, resource); mmio_base 57 drivers/thermal/thermal_mmio.c if (IS_ERR(sensor->mmio_base)) { mmio_base 59 drivers/thermal/thermal_mmio.c PTR_ERR(sensor->mmio_base)); mmio_base 60 drivers/thermal/thermal_mmio.c return PTR_ERR(sensor->mmio_base); mmio_base 124 drivers/usb/host/ohci-pxa27x.c void __iomem *mmio_base; mmio_base 143 drivers/usb/host/ohci-pxa27x.c uint32_t uhcrhda = __raw_readl(pxa_ohci->mmio_base + UHCRHDA); mmio_base 144 drivers/usb/host/ohci-pxa27x.c uint32_t uhcrhdb = __raw_readl(pxa_ohci->mmio_base + UHCRHDB); mmio_base 168 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA); mmio_base 169 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhcrhdb, pxa_ohci->mmio_base + UHCRHDB); mmio_base 224 drivers/usb/host/ohci-pxa27x.c uint32_t uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR); mmio_base 225 drivers/usb/host/ohci-pxa27x.c uint32_t uhcrhda = __raw_readl(pxa_ohci->mmio_base + UHCRHDA); mmio_base 257 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR); mmio_base 258 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA); mmio_base 263 drivers/usb/host/ohci-pxa27x.c uint32_t uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR); mmio_base 265 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhchr | UHCHR_FHR, pxa_ohci->mmio_base + UHCHR); mmio_base 267 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhchr & ~UHCHR_FHR, pxa_ohci->mmio_base + UHCHR); mmio_base 291 drivers/usb/host/ohci-pxa27x.c uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR) | UHCHR_FSBIR; mmio_base 292 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR); mmio_base 294 drivers/usb/host/ohci-pxa27x.c while (__raw_readl(pxa_ohci->mmio_base + UHCHR) & UHCHR_FSBIR) mmio_base 310 drivers/usb/host/ohci-pxa27x.c uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR) & ~UHCHR_SSE; mmio_base 311 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR); mmio_base 312 drivers/usb/host/ohci-pxa27x.c __raw_writel(UHCHIE_UPRIE | UHCHIE_RWIE, pxa_ohci->mmio_base + UHCHIE); mmio_base 336 drivers/usb/host/ohci-pxa27x.c uhccoms = __raw_readl(pxa_ohci->mmio_base + UHCCOMS) | 0x01; mmio_base 337 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhccoms, pxa_ohci->mmio_base + UHCCOMS); mmio_base 466 drivers/usb/host/ohci-pxa27x.c pxa_ohci->mmio_base = (void __iomem *)hcd->regs; mmio_base 51 drivers/video/fbdev/asiliantfb.c writeb((num), mmio_base + (ap)); writeb((val), mmio_base + (dp)); \ mmio_base 86 drivers/video/fbdev/asiliantfb.c readb(mmio_base + 0x7b4); mmio_base 219 drivers/video/fbdev/asiliantfb.c writeb(0xc7, mmio_base + 0x784); /* set misc output reg */ mmio_base 221 drivers/video/fbdev/asiliantfb.c writeb(0x07, mmio_base + 0x784); /* set misc output reg */ mmio_base 316 drivers/video/fbdev/asiliantfb.c writeb(regno, mmio_base + 0x790); mmio_base 318 drivers/video/fbdev/asiliantfb.c writeb(red, mmio_base + 0x791); mmio_base 319 drivers/video/fbdev/asiliantfb.c writeb(green, mmio_base + 0x791); mmio_base 320 drivers/video/fbdev/asiliantfb.c writeb(blue, mmio_base + 0x791); mmio_base 470 drivers/video/fbdev/asiliantfb.c writeb(0x20, mmio_base + 0x780); mmio_base 533 drivers/video/fbdev/asiliantfb.c writeb(0xff, mmio_base + 0x78c); mmio_base 2344 drivers/video/fbdev/aty/radeon_base.c rinfo->mmio_base = ioremap(rinfo->mmio_base_phys, RADEON_REGSIZE); mmio_base 2345 drivers/video/fbdev/aty/radeon_base.c if (!rinfo->mmio_base) { mmio_base 2522 drivers/video/fbdev/aty/radeon_base.c iounmap(rinfo->mmio_base); mmio_base 2567 drivers/video/fbdev/aty/radeon_base.c iounmap(rinfo->mmio_base); mmio_base 299 drivers/video/fbdev/aty/radeonfb.h void __iomem *mmio_base; mmio_base 376 drivers/video/fbdev/aty/radeonfb.h #define INREG8(addr) readb((rinfo->mmio_base)+addr) mmio_base 377 drivers/video/fbdev/aty/radeonfb.h #define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr) mmio_base 378 drivers/video/fbdev/aty/radeonfb.h #define INREG16(addr) readw((rinfo->mmio_base)+addr) mmio_base 379 drivers/video/fbdev/aty/radeonfb.h #define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr) mmio_base 380 drivers/video/fbdev/aty/radeonfb.h #define INREG(addr) readl((rinfo->mmio_base)+addr) mmio_base 381 drivers/video/fbdev/aty/radeonfb.h #define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr) mmio_base 113 drivers/video/fbdev/ep93xx-fb.c void __iomem *mmio_base; mmio_base 125 drivers/video/fbdev/ep93xx-fb.c return __raw_readl(fbi->mmio_base + off); mmio_base 131 drivers/video/fbdev/ep93xx-fb.c __raw_writel(val, fbi->mmio_base + off); mmio_base 506 drivers/video/fbdev/ep93xx-fb.c fbi->mmio_base = devm_ioremap(&pdev->dev, res->start, mmio_base 508 drivers/video/fbdev/ep93xx-fb.c if (!fbi->mmio_base) { mmio_base 299 drivers/video/fbdev/intelfb/intelfb.h u8 __iomem *mmio_base; mmio_base 448 drivers/video/fbdev/intelfb/intelfbdrv.c if (dinfo->mmio_base) mmio_base 449 drivers/video/fbdev/intelfb/intelfbdrv.c iounmap((void __iomem *)dinfo->mmio_base); mmio_base 656 drivers/video/fbdev/intelfb/intelfbdrv.c dinfo->mmio_base = mmio_base 659 drivers/video/fbdev/intelfb/intelfbdrv.c if (!dinfo->mmio_base) { mmio_base 751 drivers/video/fbdev/intelfb/intelfbdrv.c dinfo->mmio_base); mmio_base 523 drivers/video/fbdev/intelfb/intelfbhw.h #define INREG8(addr) readb((u8 __iomem *)(dinfo->mmio_base + (addr))) mmio_base 524 drivers/video/fbdev/intelfb/intelfbhw.h #define INREG16(addr) readw((u16 __iomem *)(dinfo->mmio_base + (addr))) mmio_base 525 drivers/video/fbdev/intelfb/intelfbhw.h #define INREG(addr) readl((u32 __iomem *)(dinfo->mmio_base + (addr))) mmio_base 526 drivers/video/fbdev/intelfb/intelfbhw.h #define OUTREG8(addr, val) writeb((val),(u8 __iomem *)(dinfo->mmio_base + \ mmio_base 528 drivers/video/fbdev/intelfb/intelfbhw.h #define OUTREG16(addr, val) writew((val),(u16 __iomem *)(dinfo->mmio_base + \ mmio_base 530 drivers/video/fbdev/intelfb/intelfbhw.h #define OUTREG(addr, val) writel((val),(u32 __iomem *)(dinfo->mmio_base + \ mmio_base 59 drivers/video/fbdev/mb862xx/mb862xxfb.h void __iomem *mmio_base; /* remapped registers */ mmio_base 631 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->host = par->mmio_base; mmio_base 632 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->i2c = par->mmio_base + MB862XX_I2C_BASE; mmio_base 633 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->disp = par->mmio_base + MB862XX_DISP_BASE; mmio_base 634 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->cap = par->mmio_base + MB862XX_CAP_BASE; mmio_base 635 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->draw = par->mmio_base + MB862XX_DRAW_BASE; mmio_base 636 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->geo = par->mmio_base + MB862XX_GEO_BASE; mmio_base 637 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->pio = par->mmio_base + MB862XX_PIO_BASE; mmio_base 723 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->mmio_base = ioremap(par->mmio_base_phys, par->mmio_len); mmio_base 724 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c if (par->mmio_base == NULL) { mmio_base 770 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c iounmap(par->mmio_base); mmio_base 807 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c iounmap(par->mmio_base); mmio_base 845 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->host = par->mmio_base; mmio_base 846 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->i2c = par->mmio_base + MB862XX_I2C_BASE; mmio_base 847 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->disp = par->mmio_base + MB862XX_DISP_BASE; mmio_base 848 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->cap = par->mmio_base + MB862XX_CAP_BASE; mmio_base 849 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->draw = par->mmio_base + MB862XX_DRAW_BASE; mmio_base 850 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->geo = par->mmio_base + MB862XX_GEO_BASE; mmio_base 851 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->pio = par->mmio_base + MB862XX_PIO_BASE; mmio_base 926 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->ctrl = par->mmio_base + MB86297_CTRL_BASE; mmio_base 927 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->i2c = par->mmio_base + MB86297_I2C_BASE; mmio_base 928 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->disp = par->mmio_base + MB86297_DISP0_BASE; mmio_base 929 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->disp1 = par->mmio_base + MB86297_DISP1_BASE; mmio_base 930 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->cap = par->mmio_base + MB86297_CAP0_BASE; mmio_base 931 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->cap1 = par->mmio_base + MB86297_CAP1_BASE; mmio_base 932 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->draw = par->mmio_base + MB86297_DRAW_BASE; mmio_base 933 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->dram_ctrl = par->mmio_base + MB86297_DRAMCTRL_BASE; mmio_base 934 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->wrback = par->mmio_base + MB86297_WRBACK_BASE; mmio_base 1057 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->mmio_base = ioremap(par->mmio_base_phys, par->mmio_len); mmio_base 1058 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c if (par->mmio_base == NULL) { mmio_base 1114 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c iounmap(par->mmio_base); mmio_base 1155 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c iounmap(par->mmio_base); mmio_base 81 drivers/video/fbdev/pvr2fb.c #define DISP_BASE par->mmio_base mmio_base 143 drivers/video/fbdev/pvr2fb.c void __iomem *mmio_base; /* MMIO base */ mmio_base 233 drivers/video/fbdev/pvr2fb.c fb_writel(type, par->mmio_base + 0x108); mmio_base 240 drivers/video/fbdev/pvr2fb.c fb_writel(val, par->mmio_base + 0x1000 + (4 * regno)); mmio_base 781 drivers/video/fbdev/pvr2fb.c par->mmio_base = ioremap_nocache(pvr2_fix.mmio_start, mmio_base 783 drivers/video/fbdev/pvr2fb.c if (!par->mmio_base) { mmio_base 820 drivers/video/fbdev/pvr2fb.c rev = fb_readl(par->mmio_base + 0x04); mmio_base 848 drivers/video/fbdev/pvr2fb.c if (par->mmio_base) mmio_base 849 drivers/video/fbdev/pvr2fb.c iounmap(par->mmio_base); mmio_base 915 drivers/video/fbdev/pvr2fb.c if (currentpar->mmio_base) { mmio_base 916 drivers/video/fbdev/pvr2fb.c iounmap(currentpar->mmio_base); mmio_base 917 drivers/video/fbdev/pvr2fb.c currentpar->mmio_base = NULL; mmio_base 965 drivers/video/fbdev/pvr2fb.c if (currentpar->mmio_base) { mmio_base 966 drivers/video/fbdev/pvr2fb.c iounmap(currentpar->mmio_base); mmio_base 967 drivers/video/fbdev/pvr2fb.c currentpar->mmio_base = NULL; mmio_base 87 drivers/video/fbdev/pxa3xx-gcu.c void __iomem *mmio_base; mmio_base 107 drivers/video/fbdev/pxa3xx-gcu.c return __raw_readl(priv->mmio_base + off); mmio_base 113 drivers/video/fbdev/pxa3xx-gcu.c __raw_writel(val, priv->mmio_base + off); mmio_base 604 drivers/video/fbdev/pxa3xx-gcu.c priv->mmio_base = devm_ioremap_resource(dev, r); mmio_base 605 drivers/video/fbdev/pxa3xx-gcu.c if (IS_ERR(priv->mmio_base)) mmio_base 606 drivers/video/fbdev/pxa3xx-gcu.c return PTR_ERR(priv->mmio_base); mmio_base 98 drivers/video/fbdev/pxafb.c return __raw_readl(fbi->mmio_base + off); mmio_base 104 drivers/video/fbdev/pxafb.c __raw_writel(val, fbi->mmio_base + off); mmio_base 2313 drivers/video/fbdev/pxafb.c fbi->mmio_base = devm_ioremap_resource(&dev->dev, r); mmio_base 2314 drivers/video/fbdev/pxafb.c if (IS_ERR(fbi->mmio_base)) { mmio_base 114 drivers/video/fbdev/pxafb.h void __iomem *mmio_base; mmio_base 516 drivers/video/fbdev/sis/sis.h unsigned long mmio_base; mmio_base 1888 drivers/video/fbdev/sis/sis_main.c fix->mmio_start = ivideo->mmio_base; mmio_base 6038 drivers/video/fbdev/sis/sis_main.c ivideo->mmio_base = pci_resource_start(pdev, 1); mmio_base 6221 drivers/video/fbdev/sis/sis_main.c if(!request_mem_region(ivideo->mmio_base, ivideo->mmio_size, "sisfb MMIO")) { mmio_base 6235 drivers/video/fbdev/sis/sis_main.c ivideo->mmio_vbase = ioremap(ivideo->mmio_base, ivideo->mmio_size); mmio_base 6241 drivers/video/fbdev/sis/sis_main.c error_2: release_mem_region(ivideo->mmio_base, ivideo->mmio_size); mmio_base 6260 drivers/video/fbdev/sis/sis_main.c ivideo->mmio_base, (unsigned long)ivideo->mmio_vbase, ivideo->mmio_size / 1024); mmio_base 6532 drivers/video/fbdev/sis/sis_main.c release_mem_region(ivideo->mmio_base, ivideo->mmio_size); mmio_base 1523 drivers/video/fbdev/sm712fb.c unsigned long mmio_base; mmio_base 1561 drivers/video/fbdev/sm712fb.c mmio_base = pci_resource_start(pdev, 0); mmio_base 1571 drivers/video/fbdev/sm712fb.c sfb->fb->fix.mmio_start = mmio_base + 0x00400000; mmio_base 1573 drivers/video/fbdev/sm712fb.c sfb->lfb = ioremap(mmio_base, mmio_addr); mmio_base 1602 drivers/video/fbdev/sm712fb.c sfb->fb->fix.mmio_start = mmio_base; mmio_base 1604 drivers/video/fbdev/sm712fb.c sfb->dp_regs = ioremap(mmio_base, 0x00200000 + smem_size); mmio_base 30 drivers/video/fbdev/vt8623fb.c char __iomem *mmio_base; mmio_base 708 drivers/video/fbdev/vt8623fb.c par->mmio_base = pci_iomap(dev, 1, 0); mmio_base 709 drivers/video/fbdev/vt8623fb.c if (! par->mmio_base) { mmio_base 783 drivers/video/fbdev/vt8623fb.c pci_iounmap(dev, par->mmio_base); mmio_base 809 drivers/video/fbdev/vt8623fb.c pci_iounmap(dev, par->mmio_base); mmio_base 213 include/linux/pxa2xx_ssp.h void __iomem *mmio_base; mmio_base 234 include/linux/pxa2xx_ssp.h __raw_writel(val, dev->mmio_base + reg); mmio_base 245 include/linux/pxa2xx_ssp.h return __raw_readl(dev->mmio_base + reg); mmio_base 28 include/linux/soundwire/sdw_intel.h void __iomem *mmio_base; mmio_base 549 sound/soc/intel/skylake/bxt-sst.c int bxt_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, mmio_base 566 sound/soc/intel/skylake/bxt-sst.c sst->addr.lpe = mmio_base; mmio_base 567 sound/soc/intel/skylake/bxt-sst.c sst->addr.shim = mmio_base; mmio_base 97 sound/soc/intel/skylake/cnl-sst-dsp.h int cnl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, mmio_base 415 sound/soc/intel/skylake/cnl-sst.c int cnl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, mmio_base 432 sound/soc/intel/skylake/cnl-sst.c sst->addr.lpe = mmio_base; mmio_base 433 sound/soc/intel/skylake/cnl-sst.c sst->addr.shim = mmio_base; mmio_base 253 sound/soc/intel/skylake/skl-messages.c void __iomem *mmio_base; mmio_base 266 sound/soc/intel/skylake/skl-messages.c mmio_base = pci_ioremap_bar(skl->pci, 4); mmio_base 267 sound/soc/intel/skylake/skl-messages.c if (mmio_base == NULL) { mmio_base 279 sound/soc/intel/skylake/skl-messages.c ret = ops->init(bus->dev, mmio_base, irq, mmio_base 311 sound/soc/intel/skylake/skl-messages.c iounmap(mmio_base); mmio_base 223 sound/soc/intel/skylake/skl-sst-dsp.h int skl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, mmio_base 226 sound/soc/intel/skylake/skl-sst-dsp.h int bxt_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, mmio_base 519 sound/soc/intel/skylake/skl-sst.c int skl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, mmio_base 535 sound/soc/intel/skylake/skl-sst.c sst->addr.lpe = mmio_base; mmio_base 536 sound/soc/intel/skylake/skl-sst.c sst->addr.shim = mmio_base; mmio_base 157 sound/soc/intel/skylake/skl.h int (*init)(struct device *dev, void __iomem *mmio_base, mmio_base 41 sound/soc/pxa/mmp-sspa.c __raw_writel(val, sspa->mmio_base + reg); mmio_base 46 sound/soc/pxa/mmp-sspa.c return __raw_readl(sspa->mmio_base + reg); mmio_base 419 sound/soc/pxa/mmp-sspa.c priv->sspa->mmio_base = devm_platform_ioremap_resource(pdev, 0); mmio_base 420 sound/soc/pxa/mmp-sspa.c if (IS_ERR(priv->sspa->mmio_base)) mmio_base 421 sound/soc/pxa/mmp-sspa.c return PTR_ERR(priv->sspa->mmio_base); mmio_base 68 sound/soc/pxa/pxa-ssp.c sscr0 = __raw_readl(ssp->mmio_base + SSCR0) | SSCR0_SSE; mmio_base 69 sound/soc/pxa/pxa-ssp.c __raw_writel(sscr0, ssp->mmio_base + SSCR0); mmio_base 76 sound/soc/pxa/pxa-ssp.c sscr0 = __raw_readl(ssp->mmio_base + SSCR0) & ~SSCR0_SSE; mmio_base 77 sound/soc/pxa/pxa-ssp.c __raw_writel(sscr0, ssp->mmio_base + SSCR0); mmio_base 144 sound/soc/pxa/pxa-ssp.c priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0); mmio_base 145 sound/soc/pxa/pxa-ssp.c priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1); mmio_base 146 sound/soc/pxa/pxa-ssp.c priv->to = __raw_readl(ssp->mmio_base + SSTO); mmio_base 147 sound/soc/pxa/pxa-ssp.c priv->psp = __raw_readl(ssp->mmio_base + SSPSP); mmio_base 162 sound/soc/pxa/pxa-ssp.c __raw_writel(sssr, ssp->mmio_base + SSSR); mmio_base 163 sound/soc/pxa/pxa-ssp.c __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0); mmio_base 164 sound/soc/pxa/pxa-ssp.c __raw_writel(priv->cr1, ssp->mmio_base + SSCR1); mmio_base 165 sound/soc/pxa/pxa-ssp.c __raw_writel(priv->to, ssp->mmio_base + SSTO); mmio_base 166 sound/soc/pxa/pxa-ssp.c __raw_writel(priv->psp, ssp->mmio_base + SSPSP); mmio_base 245 sound/soc/xilinx/xlnx_formatter_pcm.c static int xlnx_formatter_pcm_reset(void __iomem *mmio_base) mmio_base 249 sound/soc/xilinx/xlnx_formatter_pcm.c val = readl(mmio_base + XLNX_AUD_CTRL); mmio_base 251 sound/soc/xilinx/xlnx_formatter_pcm.c writel(val, mmio_base + XLNX_AUD_CTRL); mmio_base 253 sound/soc/xilinx/xlnx_formatter_pcm.c val = readl(mmio_base + XLNX_AUD_CTRL); mmio_base 258 sound/soc/xilinx/xlnx_formatter_pcm.c val = readl(mmio_base + XLNX_AUD_CTRL); mmio_base 266 sound/soc/xilinx/xlnx_formatter_pcm.c static void xlnx_formatter_disable_irqs(void __iomem *mmio_base, int stream) mmio_base 270 sound/soc/xilinx/xlnx_formatter_pcm.c val = readl(mmio_base + XLNX_AUD_CTRL); mmio_base 275 sound/soc/xilinx/xlnx_formatter_pcm.c writel(val, mmio_base + XLNX_AUD_CTRL);