mm_pool32axf_op    69 arch/mips/kernel/branch.c 		    mm_pool32axf_op) {
mm_pool32axf_op   306 arch/mips/kernel/process.c 			ip->r_format.func != mm_pool32axf_op)
mm_pool32axf_op    61 arch/mips/mm/uasm-micromips.c 	[insn_di]	= {M(mm_pool32a_op, 0, 0, 0, mm_di_op, mm_pool32axf_op), RS},
mm_pool32axf_op    62 arch/mips/mm/uasm-micromips.c 	[insn_divu]	= {M(mm_pool32a_op, 0, 0, 0, mm_divu_op, mm_pool32axf_op), RT | RS},
mm_pool32axf_op    73 arch/mips/mm/uasm-micromips.c 	[insn_eret]	= {M(mm_pool32a_op, 0, 0, 0, mm_eret_op, mm_pool32axf_op), 0},
mm_pool32axf_op    78 arch/mips/mm/uasm-micromips.c 	[insn_jalr]	= {M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RT | RS},
mm_pool32axf_op    79 arch/mips/mm/uasm-micromips.c 	[insn_jr]	= {M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RS},
mm_pool32axf_op    87 arch/mips/mm/uasm-micromips.c 	[insn_mfc0]	= {M(mm_pool32a_op, 0, 0, 0, mm_mfc0_op, mm_pool32axf_op), RT | RS | RD},
mm_pool32axf_op    88 arch/mips/mm/uasm-micromips.c 	[insn_mfhi]	= {M(mm_pool32a_op, 0, 0, 0, mm_mfhi32_op, mm_pool32axf_op), RS},
mm_pool32axf_op    89 arch/mips/mm/uasm-micromips.c 	[insn_mflo]	= {M(mm_pool32a_op, 0, 0, 0, mm_mflo32_op, mm_pool32axf_op), RS},
mm_pool32axf_op    90 arch/mips/mm/uasm-micromips.c 	[insn_mtc0]	= {M(mm_pool32a_op, 0, 0, 0, mm_mtc0_op, mm_pool32axf_op), RT | RS | RD},
mm_pool32axf_op    91 arch/mips/mm/uasm-micromips.c 	[insn_mthi]	= {M(mm_pool32a_op, 0, 0, 0, mm_mthi32_op, mm_pool32axf_op), RS},
mm_pool32axf_op    92 arch/mips/mm/uasm-micromips.c 	[insn_mtlo]	= {M(mm_pool32a_op, 0, 0, 0, mm_mtlo32_op, mm_pool32axf_op), RS},
mm_pool32axf_op   113 arch/mips/mm/uasm-micromips.c 	[insn_sync]	= {M(mm_pool32a_op, 0, 0, 0, mm_sync_op, mm_pool32axf_op), RS},
mm_pool32axf_op   114 arch/mips/mm/uasm-micromips.c 	[insn_tlbp]	= {M(mm_pool32a_op, 0, 0, 0, mm_tlbp_op, mm_pool32axf_op), 0},
mm_pool32axf_op   115 arch/mips/mm/uasm-micromips.c 	[insn_tlbr]	= {M(mm_pool32a_op, 0, 0, 0, mm_tlbr_op, mm_pool32axf_op), 0},
mm_pool32axf_op   116 arch/mips/mm/uasm-micromips.c 	[insn_tlbwi]	= {M(mm_pool32a_op, 0, 0, 0, mm_tlbwi_op, mm_pool32axf_op), 0},
mm_pool32axf_op   117 arch/mips/mm/uasm-micromips.c 	[insn_tlbwr]	= {M(mm_pool32a_op, 0, 0, 0, mm_tlbwr_op, mm_pool32axf_op), 0},
mm_pool32axf_op   118 arch/mips/mm/uasm-micromips.c 	[insn_wait]	= {M(mm_pool32a_op, 0, 0, 0, mm_wait_op, mm_pool32axf_op), SCIMM},
mm_pool32axf_op   119 arch/mips/mm/uasm-micromips.c 	[insn_wsbh]	= {M(mm_pool32a_op, 0, 0, 0, mm_wsbh_op, mm_pool32axf_op), RT | RS},
mm_pool32axf_op   124 arch/mips/mm/uasm-micromips.c 	[insn_syscall]	= {M(mm_pool32a_op, 0, 0, 0, mm_syscall_op, mm_pool32axf_op), SCIMM},