mm_i_format      1081 arch/mips/include/uapi/asm/inst.h 	struct mm_i_format mm_i_format;
mm_i_format        66 arch/mips/kernel/branch.c 	switch (insn.mm_i_format.opcode) {
mm_i_format        68 arch/mips/kernel/branch.c 		if ((insn.mm_i_format.simmediate & MM_POOL32A_MINOR_MASK) ==
mm_i_format        70 arch/mips/kernel/branch.c 			switch (insn.mm_i_format.simmediate >>
mm_i_format        76 arch/mips/kernel/branch.c 				if (insn.mm_i_format.rt != 0)	/* Not mm_jr */
mm_i_format        77 arch/mips/kernel/branch.c 					regs->regs[insn.mm_i_format.rt] =
mm_i_format        81 arch/mips/kernel/branch.c 				*contpc = regs->regs[insn.mm_i_format.rs];
mm_i_format        87 arch/mips/kernel/branch.c 		switch (insn.mm_i_format.rt) {
mm_i_format        95 arch/mips/kernel/branch.c 			if ((long)regs->regs[insn.mm_i_format.rs] < 0)
mm_i_format        98 arch/mips/kernel/branch.c 					(insn.mm_i_format.simmediate << 1);
mm_i_format       111 arch/mips/kernel/branch.c 			if ((long)regs->regs[insn.mm_i_format.rs] >= 0)
mm_i_format       114 arch/mips/kernel/branch.c 					(insn.mm_i_format.simmediate << 1);
mm_i_format       121 arch/mips/kernel/branch.c 			if ((long)regs->regs[insn.mm_i_format.rs] <= 0)
mm_i_format       124 arch/mips/kernel/branch.c 					(insn.mm_i_format.simmediate << 1);
mm_i_format       131 arch/mips/kernel/branch.c 			if ((long)regs->regs[insn.mm_i_format.rs] <= 0)
mm_i_format       134 arch/mips/kernel/branch.c 					(insn.mm_i_format.simmediate << 1);
mm_i_format       160 arch/mips/kernel/branch.c 			bit = (insn.mm_i_format.rs >> 2);
mm_i_format       166 arch/mips/kernel/branch.c 					(insn.mm_i_format.simmediate << 1);
mm_i_format       176 arch/mips/kernel/branch.c 		switch (insn.mm_i_format.rt) {
mm_i_format       183 arch/mips/kernel/branch.c 			*contpc = regs->regs[insn.mm_i_format.rs];
mm_i_format       210 arch/mips/kernel/branch.c 		if (regs->regs[insn.mm_i_format.rs] ==
mm_i_format       211 arch/mips/kernel/branch.c 		    regs->regs[insn.mm_i_format.rt])
mm_i_format       214 arch/mips/kernel/branch.c 				(insn.mm_i_format.simmediate << 1);
mm_i_format       221 arch/mips/kernel/branch.c 		if (regs->regs[insn.mm_i_format.rs] !=
mm_i_format       222 arch/mips/kernel/branch.c 		    regs->regs[insn.mm_i_format.rt])
mm_i_format       225 arch/mips/kernel/branch.c 				(insn.mm_i_format.simmediate << 1);
mm_i_format       352 arch/mips/kernel/process.c 	if (ip->mm_i_format.opcode == mm_addiu32_op &&
mm_i_format       353 arch/mips/kernel/process.c 	    ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29) {
mm_i_format      1449 arch/mips/kernel/unaligned.c 	switch (insn.mm_i_format.opcode) {
mm_i_format      1756 arch/mips/kernel/unaligned.c 		reg = insn.mm_i_format.rt;
mm_i_format      1760 arch/mips/kernel/unaligned.c 		reg = insn.mm_i_format.rt;
mm_i_format      1764 arch/mips/kernel/unaligned.c 		reg = insn.mm_i_format.rt;
mm_i_format      1768 arch/mips/kernel/unaligned.c 		reg = insn.mm_i_format.rt;
mm_i_format      1772 arch/mips/kernel/unaligned.c 		reg = insn.mm_i_format.rt;
mm_i_format      1776 arch/mips/kernel/unaligned.c 		reg = insn.mm_i_format.rt;
mm_i_format      1780 arch/mips/kernel/unaligned.c 		reg = insn.mm_i_format.rt;
mm_i_format        88 arch/mips/math-emu/cp1emu.c 	switch (insn.mm_i_format.opcode) {
mm_i_format        90 arch/mips/math-emu/cp1emu.c 		mips32_insn.mm_i_format.opcode = ldc1_op;
mm_i_format        91 arch/mips/math-emu/cp1emu.c 		mips32_insn.mm_i_format.rt = insn.mm_i_format.rs;
mm_i_format        92 arch/mips/math-emu/cp1emu.c 		mips32_insn.mm_i_format.rs = insn.mm_i_format.rt;
mm_i_format        95 arch/mips/math-emu/cp1emu.c 		mips32_insn.mm_i_format.opcode = lwc1_op;
mm_i_format        96 arch/mips/math-emu/cp1emu.c 		mips32_insn.mm_i_format.rt = insn.mm_i_format.rs;
mm_i_format        97 arch/mips/math-emu/cp1emu.c 		mips32_insn.mm_i_format.rs = insn.mm_i_format.rt;
mm_i_format       100 arch/mips/math-emu/cp1emu.c 		mips32_insn.mm_i_format.opcode = sdc1_op;
mm_i_format       101 arch/mips/math-emu/cp1emu.c 		mips32_insn.mm_i_format.rt = insn.mm_i_format.rs;
mm_i_format       102 arch/mips/math-emu/cp1emu.c 		mips32_insn.mm_i_format.rs = insn.mm_i_format.rt;
mm_i_format       105 arch/mips/math-emu/cp1emu.c 		mips32_insn.mm_i_format.opcode = swc1_op;
mm_i_format       106 arch/mips/math-emu/cp1emu.c 		mips32_insn.mm_i_format.rt = insn.mm_i_format.rs;
mm_i_format       107 arch/mips/math-emu/cp1emu.c 		mips32_insn.mm_i_format.rs = insn.mm_i_format.rt;
mm_i_format       111 arch/mips/math-emu/cp1emu.c 		if ((insn.mm_i_format.rt == mm_bc1f_op) ||
mm_i_format       112 arch/mips/math-emu/cp1emu.c 		    (insn.mm_i_format.rt == mm_bc1t_op)) {
mm_i_format       116 arch/mips/math-emu/cp1emu.c 				(insn.mm_i_format.rt == mm_bc1t_op) ? 1 : 0;