mmVCE_VCPU_CACHE_OFFSET1  192 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 	WREG32(mmVCE_VCPU_CACHE_OFFSET1, offset & 0x7fffffff);
mmVCE_VCPU_CACHE_OFFSET1  554 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 		WREG32(mmVCE_VCPU_CACHE_OFFSET1, offset & 0x7fffffff);
mmVCE_VCPU_CACHE_OFFSET1  563 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 		WREG32(mmVCE_VCPU_CACHE_OFFSET1, offset & 0xfffffff);
mmVCE_VCPU_CACHE_OFFSET1  288 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_OFFSET1),
mmVCE_VCPU_CACHE_OFFSET1  643 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 	WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_OFFSET1), (offset & ~0x0f000000) | (1 << 24));