mmVCE_UENC_DMA_DCLK_CTRL  201 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 		data = RREG32(mmVCE_UENC_DMA_DCLK_CTRL);
mmVCE_UENC_DMA_DCLK_CTRL  206 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 		WREG32(mmVCE_UENC_DMA_DCLK_CTRL, data);
mmVCE_UENC_DMA_DCLK_CTRL  225 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 		data = RREG32(mmVCE_UENC_DMA_DCLK_CTRL);
mmVCE_UENC_DMA_DCLK_CTRL  230 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 		WREG32(mmVCE_UENC_DMA_DCLK_CTRL, data);
mmVCE_UENC_DMA_DCLK_CTRL  840 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_DMA_DCLK_CTRL));
mmVCE_UENC_DMA_DCLK_CTRL  845 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_DMA_DCLK_CTRL), data);
mmVCE_UENC_DMA_DCLK_CTRL  864 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_DMA_DCLK_CTRL));
mmVCE_UENC_DMA_DCLK_CTRL  869 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_DMA_DCLK_CTRL), data);