mmVCE_UENC_CLOCK_GATING  157 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 	tmp = RREG32(mmVCE_UENC_CLOCK_GATING);
mmVCE_UENC_CLOCK_GATING  160 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 	WREG32(mmVCE_UENC_CLOCK_GATING, tmp);
mmVCE_UENC_CLOCK_GATING  173 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 	WREG32_P(mmVCE_UENC_CLOCK_GATING, 0x1FF000, ~0xFF9FF000);
mmVCE_UENC_CLOCK_GATING  319 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 		tmp = RREG32(mmVCE_UENC_CLOCK_GATING);
mmVCE_UENC_CLOCK_GATING  321 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 		WREG32(mmVCE_UENC_CLOCK_GATING, tmp);
mmVCE_UENC_CLOCK_GATING  334 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 		tmp = RREG32(mmVCE_UENC_CLOCK_GATING);
mmVCE_UENC_CLOCK_GATING  337 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 		WREG32(mmVCE_UENC_CLOCK_GATING, tmp);
mmVCE_UENC_CLOCK_GATING  365 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 	orig = tmp = RREG32(mmVCE_UENC_CLOCK_GATING);
mmVCE_UENC_CLOCK_GATING  369 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 		WREG32(mmVCE_UENC_CLOCK_GATING, tmp);
mmVCE_UENC_CLOCK_GATING  187 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 		data = RREG32(mmVCE_UENC_CLOCK_GATING);
mmVCE_UENC_CLOCK_GATING  190 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 		WREG32(mmVCE_UENC_CLOCK_GATING, data);
mmVCE_UENC_CLOCK_GATING  213 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 		data = RREG32(mmVCE_UENC_CLOCK_GATING);
mmVCE_UENC_CLOCK_GATING  215 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 		WREG32(mmVCE_UENC_CLOCK_GATING, data);
mmVCE_UENC_CLOCK_GATING  529 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 	WREG32_P(mmVCE_UENC_CLOCK_GATING, 0x1FF000, ~0xFF9FF000);
mmVCE_UENC_CLOCK_GATING  764 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 			data = RREG32(mmVCE_UENC_CLOCK_GATING);
mmVCE_UENC_CLOCK_GATING  767 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 			WREG32(mmVCE_UENC_CLOCK_GATING, data);
mmVCE_UENC_CLOCK_GATING  608 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 	WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING), 0x1FF000, ~0xFF9FF000);
mmVCE_UENC_CLOCK_GATING  826 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING));
mmVCE_UENC_CLOCK_GATING  829 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING), data);
mmVCE_UENC_CLOCK_GATING  852 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING));
mmVCE_UENC_CLOCK_GATING  854 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING), data);
mmVCE_UENC_CLOCK_GATING  917 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 			data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING);
mmVCE_UENC_CLOCK_GATING  920 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 			WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING, data);