mmVCE_STATUS      122 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 			uint32_t status = RREG32(mmVCE_STATUS);
mmVCE_STATUS      236 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 	WREG32_P(mmVCE_STATUS, 1, ~1);
mmVCE_STATUS      265 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 	WREG32_P(mmVCE_STATUS, 0, ~1);
mmVCE_STATUS      305 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 	WREG32(mmVCE_STATUS, 0);
mmVCE_STATUS      241 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 			uint32_t status = RREG32(mmVCE_STATUS);
mmVCE_STATUS      351 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 		WREG32(mmVCE_STATUS, 0);
mmVCE_STATUS      624 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 	if (RREG32(mmVCE_STATUS) & AMDGPU_VCE_STATUS_BUSY_MASK) {
mmVCE_STATUS      629 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 	if (RREG32(mmVCE_STATUS) & AMDGPU_VCE_STATUS_BUSY_MASK) {
mmVCE_STATUS      131 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 				RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS));
mmVCE_STATUS      304 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS),
mmVCE_STATUS      311 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		MMSCH_V1_0_INSERT_DIRECT_POLL(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS),
mmVCE_STATUS      316 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS),
mmVCE_STATUS      365 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 	WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS), VCE_STATUS__JOB_BUSY_MASK,
mmVCE_STATUS      377 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 	WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS), 0, ~VCE_STATUS__JOB_BUSY_MASK);
mmVCE_STATUS      399 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 	WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS), 0);
mmVCE_STATUS      716 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 	if (RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS) & AMDGPU_VCE_STATUS_BUSY_MASK) {
mmVCE_STATUS      721 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 	if (RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS) & AMDGPU_VCE_STATUS_BUSY_MASK) {