mmVCE_RB_BASE_LO  246 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c 	WREG32(mmVCE_RB_BASE_LO, ring->gpu_addr);
mmVCE_RB_BASE_LO  283 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 			WREG32(mmVCE_RB_BASE_LO, ring->gpu_addr);
mmVCE_RB_BASE_LO  233 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_BASE_LO),
mmVCE_RB_BASE_LO  344 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 	WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_BASE_LO), ring->gpu_addr);