mmVCE_MMSCH_VF_MAILBOX_RESP  733 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 	WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_RESP, 0);
mmVCE_MMSCH_VF_MAILBOX_RESP  746 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 	data = RREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_RESP);
mmVCE_MMSCH_VF_MAILBOX_RESP  750 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		data = RREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_RESP);
mmVCE_MMSCH_VF_MAILBOX_RESP  176 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 	WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_RESP), 0);
mmVCE_MMSCH_VF_MAILBOX_RESP  186 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 	data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_RESP));
mmVCE_MMSCH_VF_MAILBOX_RESP  190 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 		data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_RESP));