mmUVD_VCPU_CACHE_SIZE2  561 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 	WREG32(mmUVD_VCPU_CACHE_SIZE2, size);
mmUVD_VCPU_CACHE_SIZE2  278 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 	WREG32(mmUVD_VCPU_CACHE_SIZE2, size);
mmUVD_VCPU_CACHE_SIZE2  604 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 	WREG32(mmUVD_VCPU_CACHE_SIZE2, size);
mmUVD_VCPU_CACHE_SIZE2  694 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE2,
mmUVD_VCPU_CACHE_SIZE2  837 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 			MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_VCPU_CACHE_SIZE2),
mmUVD_VCPU_CACHE_SIZE2  333 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);
mmUVD_VCPU_CACHE_SIZE2  407 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE,
mmUVD_VCPU_CACHE_SIZE2  402 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);
mmUVD_VCPU_CACHE_SIZE2  484 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		UVD, 0, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect);
mmUVD_VCPU_CACHE_SIZE2  418 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);