mmUVD_VCPU_CACHE_OFFSET1  554 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 	WREG32(mmUVD_VCPU_CACHE_OFFSET1, addr);
mmUVD_VCPU_CACHE_OFFSET1  271 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 	WREG32(mmUVD_VCPU_CACHE_OFFSET1, offset >> 3);
mmUVD_VCPU_CACHE_OFFSET1  597 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 	WREG32(mmUVD_VCPU_CACHE_OFFSET1, offset >> 3);
mmUVD_VCPU_CACHE_OFFSET1  686 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET1, (1 << 21));
mmUVD_VCPU_CACHE_OFFSET1  829 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 			MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_VCPU_CACHE_OFFSET1), (1 << 21));
mmUVD_VCPU_CACHE_OFFSET1  324 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0);
mmUVD_VCPU_CACHE_OFFSET1  394 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0,
mmUVD_VCPU_CACHE_OFFSET1  393 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0);
mmUVD_VCPU_CACHE_OFFSET1  462 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 			UVD, 0, mmUVD_VCPU_CACHE_OFFSET1), 0, 0, indirect);
mmUVD_VCPU_CACHE_OFFSET1  469 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 			UVD, 0, mmUVD_VCPU_CACHE_OFFSET1), 0, 0, indirect);
mmUVD_VCPU_CACHE_OFFSET1  409 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET1, 0);