mmUVD_SOFT_RESET  308 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 	WREG32_P(mmUVD_SOFT_RESET, 0, ~UVD_SOFT_RESET__LMI_SOFT_RESET_MASK);
mmUVD_SOFT_RESET  310 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 	WREG32_P(mmUVD_SOFT_RESET, 0, ~UVD_SOFT_RESET__LMI_UMC_SOFT_RESET_MASK);
mmUVD_SOFT_RESET  312 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 	WREG32_P(mmUVD_SOFT_RESET, 0, ~UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
mmUVD_SOFT_RESET  329 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 		WREG32_P(mmUVD_SOFT_RESET, UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK,
mmUVD_SOFT_RESET  332 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 		WREG32_P(mmUVD_SOFT_RESET, 0, ~UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
mmUVD_SOFT_RESET  429 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 	WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__LMI_SOFT_RESET_MASK |
mmUVD_SOFT_RESET  317 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 	WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__LMI_SOFT_RESET_MASK |
mmUVD_SOFT_RESET  348 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 	WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
mmUVD_SOFT_RESET  358 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 	WREG32(mmUVD_SOFT_RESET, 0);
mmUVD_SOFT_RESET  374 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 		WREG32_P(mmUVD_SOFT_RESET, UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK,
mmUVD_SOFT_RESET  377 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 		WREG32_P(mmUVD_SOFT_RESET, 0, ~UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
mmUVD_SOFT_RESET  443 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 	WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
mmUVD_SOFT_RESET  724 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 	WREG32(mmUVD_SOFT_RESET,
mmUVD_SOFT_RESET  764 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 	WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
mmUVD_SOFT_RESET  774 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 	WREG32(mmUVD_SOFT_RESET, 0);
mmUVD_SOFT_RESET  876 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 	WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
mmUVD_SOFT_RESET  857 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 			MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_SOFT_RESET),
mmUVD_SOFT_RESET  877 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 			MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_SOFT_RESET),
mmUVD_SOFT_RESET  906 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 			MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_SOFT_RESET), 0);
mmUVD_SOFT_RESET  971 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		WREG32_SOC15(UVD, k, mmUVD_SOFT_RESET,
mmUVD_SOFT_RESET 1007 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		WREG32_SOC15(UVD, k, mmUVD_SOFT_RESET,
mmUVD_SOFT_RESET 1020 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		WREG32_SOC15(UVD, k, mmUVD_SOFT_RESET, 0);
mmUVD_SOFT_RESET 1037 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 			WREG32_P(SOC15_REG_OFFSET(UVD, k, mmUVD_SOFT_RESET),
mmUVD_SOFT_RESET 1041 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 			WREG32_P(SOC15_REG_OFFSET(UVD, k, mmUVD_SOFT_RESET), 0,
mmUVD_SOFT_RESET 1134 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		WREG32_SOC15(UVD, i, mmUVD_SOFT_RESET,
mmUVD_SOFT_RESET  850 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET), 0,
mmUVD_SOFT_RESET  857 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	tmp = RREG32_SOC15(UVD, 0, mmUVD_SOFT_RESET);
mmUVD_SOFT_RESET  860 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15(UVD, 0, mmUVD_SOFT_RESET, tmp);
mmUVD_SOFT_RESET  876 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
mmUVD_SOFT_RESET  880 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET), 0,
mmUVD_SOFT_RESET 1044 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_SOFT_RESET, 0, 0xFFFFFFFF, 0);
mmUVD_SOFT_RESET 1152 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
mmUVD_SOFT_RESET 1165 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
mmUVD_SOFT_RESET 1169 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
mmUVD_SOFT_RESET 1003 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		UVD, 0, mmUVD_SOFT_RESET), 0, 0, indirect);
mmUVD_SOFT_RESET 1125 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET), 0,
mmUVD_SOFT_RESET 1132 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	tmp = RREG32_SOC15(VCN, 0, mmUVD_SOFT_RESET);
mmUVD_SOFT_RESET 1135 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_SOC15(VCN, 0, mmUVD_SOFT_RESET, tmp);
mmUVD_SOFT_RESET 1159 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
mmUVD_SOFT_RESET 1163 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET), 0,
mmUVD_SOFT_RESET 1304 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
mmUVD_SOFT_RESET 1309 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
mmUVD_SOFT_RESET 1314 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),