mmUVD_RB_WPTR2    128 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 		return RREG32(mmUVD_RB_WPTR2);
mmUVD_RB_WPTR2    160 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 		WREG32(mmUVD_RB_WPTR2,
mmUVD_RB_WPTR2    850 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 		WREG32(mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_WPTR2    126 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		return RREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR2);
mmUVD_RB_WPTR2    165 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR2,
mmUVD_RB_WPTR2   1102 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		WREG32_SOC15(UVD, k, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_WPTR2    946 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_WPTR2   1194 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	tmp = RREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2);
mmUVD_RB_WPTR2   1272 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 				WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_WPTR2   1621 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		return RREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2);
mmUVD_RB_WPTR2   1639 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2,
mmUVD_RB_WPTR2   1216 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_WPTR2   1240 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	tmp = RREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2);
mmUVD_RB_WPTR2   1373 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 				WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_WPTR2   1686 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 			return RREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2);
mmUVD_RB_WPTR2   1713 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 			WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_WPTR2    876 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		WREG32_SOC15(UVD, i, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_WPTR2   1067 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 			return RREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR2);
mmUVD_RB_WPTR2   1094 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 			WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));