mmUVD_RB_RPTR2     98 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 		return RREG32(mmUVD_RB_RPTR2);
mmUVD_RB_RPTR2    849 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 		WREG32(mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR2     92 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		return RREG32_SOC15(UVD, ring->me, mmUVD_RB_RPTR2);
mmUVD_RB_RPTR2   1101 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		WREG32_SOC15(UVD, k, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR2    945 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR2   1195 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR2, tmp, 0xFFFFFFFF, ret_code);
mmUVD_RB_RPTR2   1271 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 				WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR2   1604 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		return RREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2);
mmUVD_RB_RPTR2   1215 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR2   1241 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR2, tmp, 0xFFFFFFFF, ret_code);
mmUVD_RB_RPTR2   1372 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 				WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR2   1663 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		return RREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2);
mmUVD_RB_RPTR2    875 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		WREG32_SOC15(UVD, i, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR2   1044 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		return RREG32_SOC15(UVD, ring->me, mmUVD_RB_RPTR2);