mmUVD_RB_RPTR      96 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 		return RREG32(mmUVD_RB_RPTR);
mmUVD_RB_RPTR     842 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 		WREG32(mmUVD_RB_RPTR, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR      90 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		return RREG32_SOC15(UVD, ring->me, mmUVD_RB_RPTR);
mmUVD_RB_RPTR    1094 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		WREG32_SOC15(UVD, k, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR     938 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR    1192 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF, ret_code);
mmUVD_RB_RPTR    1264 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 				WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR    1602 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		return RREG32_SOC15(UVD, 0, mmUVD_RB_RPTR);
mmUVD_RB_RPTR    1208 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR    1238 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF, ret_code);
mmUVD_RB_RPTR    1365 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 				WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR    1661 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		return RREG32_SOC15(UVD, 0, mmUVD_RB_RPTR);
mmUVD_RB_RPTR     868 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		WREG32_SOC15(UVD, i, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));
mmUVD_RB_RPTR    1042 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		return RREG32_SOC15(UVD, ring->me, mmUVD_RB_RPTR);