mmUVD_RB_BASE_HI2  852 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 		WREG32(mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));
mmUVD_RB_BASE_HI2 1104 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		WREG32_SOC15(UVD, k, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));
mmUVD_RB_BASE_HI2  948 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));
mmUVD_RB_BASE_HI2 1269 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 				WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));
mmUVD_RB_BASE_HI2 1218 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));
mmUVD_RB_BASE_HI2 1370 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 				WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));
mmUVD_RB_BASE_HI2  878 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		WREG32_SOC15(UVD, i, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));