mmUVD_MPC_CNTL    290 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 	tmp = RREG32(mmUVD_MPC_CNTL);
mmUVD_MPC_CNTL    291 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 	WREG32(mmUVD_MPC_CNTL, tmp | 0x10);
mmUVD_MPC_CNTL    818 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	tmp = RREG32_SOC15(UVD, 0, mmUVD_MPC_CNTL);
mmUVD_MPC_CNTL    821 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15(UVD, 0, mmUVD_MPC_CNTL, tmp);
mmUVD_MPC_CNTL   1018 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_MPC_CNTL,
mmUVD_MPC_CNTL    971 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		UVD, 0, mmUVD_MPC_CNTL),
mmUVD_MPC_CNTL   1097 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	tmp = RREG32_SOC15(UVD, 0, mmUVD_MPC_CNTL);
mmUVD_MPC_CNTL   1100 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_SOC15(VCN, 0, mmUVD_MPC_CNTL, tmp);
mmUVD_MPC_CNTL    753 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		tmp = RREG32_SOC15(UVD, i, mmUVD_MPC_CNTL);
mmUVD_MPC_CNTL    756 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		WREG32_SOC15(VCN, i, mmUVD_MPC_CNTL, tmp);