mmUVD_LMI_CTRL    288 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 	WREG32(mmUVD_LMI_CTRL, 0x203108);
mmUVD_LMI_CTRL    329 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 	WREG32(mmUVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) |
mmUVD_LMI_CTRL    740 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 	WREG32(mmUVD_LMI_CTRL,
mmUVD_LMI_CTRL    868 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 			MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_LMI_CTRL),
mmUVD_LMI_CTRL    983 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 		WREG32_SOC15(UVD, k, mmUVD_LMI_CTRL,
mmUVD_LMI_CTRL    805 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	tmp = RREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL);
mmUVD_LMI_CTRL    806 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL, tmp		|
mmUVD_LMI_CTRL   1002 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_LMI_CTRL,
mmUVD_LMI_CTRL   1057 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_LMI_CTRL,
mmUVD_LMI_CTRL    968 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		UVD, 0, mmUVD_LMI_CTRL), tmp, 0, indirect);
mmUVD_LMI_CTRL   1089 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	tmp = RREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL);
mmUVD_LMI_CTRL   1090 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL, tmp |
mmUVD_LMI_CTRL    744 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		tmp = RREG32_SOC15(UVD, i, mmUVD_LMI_CTRL);
mmUVD_LMI_CTRL    746 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		WREG32_SOC15(UVD, i, mmUVD_LMI_CTRL, tmp | 0x8|