mmSDMA0_RLC0_RB_CNTL 78 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 97 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 147 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 198 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, data); mmSDMA0_RLC0_RB_CNTL 217 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) mmSDMA0_RLC0_RB_CNTL 245 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c sdma_rlc_rb_cntl = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 266 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 268 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, temp); mmSDMA0_RLC0_RB_CNTL 280 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 281 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) | mmSDMA0_RLC0_RB_CNTL 315 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 323 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL mmSDMA0_RLC0_RB_CNTL 328 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 505 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 556 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, data); mmSDMA0_RLC0_RB_CNTL 578 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) mmSDMA0_RLC0_RB_CNTL 628 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c sdma_rlc_rb_cntl = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 757 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 759 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, temp); mmSDMA0_RLC0_RB_CNTL 771 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 772 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) | mmSDMA0_RLC0_RB_CNTL 422 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 469 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, data); mmSDMA0_RLC0_RB_CNTL 489 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) mmSDMA0_RLC0_RB_CNTL 533 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c sdma_rlc_rb_cntl = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 655 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 657 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, temp); mmSDMA0_RLC0_RB_CNTL 669 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 670 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) | mmSDMA0_RLC0_RB_CNTL 406 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 453 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, data); mmSDMA0_RLC0_RB_CNTL 473 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) mmSDMA0_RLC0_RB_CNTL 526 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c sdma_rlc_rb_cntl = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 651 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 653 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, temp); mmSDMA0_RLC0_RB_CNTL 665 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 666 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) | mmSDMA0_RLC0_RB_CNTL 235 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 242 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 404 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 455 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, data); mmSDMA0_RLC0_RB_CNTL 474 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) mmSDMA0_RLC0_RB_CNTL 524 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c sdma_rlc_rb_cntl = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 595 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL); mmSDMA0_RLC0_RB_CNTL 597 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, temp); mmSDMA0_RLC0_RB_CNTL 609 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL, mmSDMA0_RLC0_RB_CNTL 610 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c RREG32(sdma_base_addr + mmSDMA0_RLC0_RB_CNTL) | mmSDMA0_RLC0_RB_CNTL 565 drivers/gpu/drm/amd/amdgpu/cikd.h #define KFD_CIK_SDMA_QUEUE_OFFSET (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL)