mmSDMA0_GFX_RB_WPTR_POLL_CNTL  722 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 		wptr_poll_cntl = RREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i]);
mmSDMA0_GFX_RB_WPTR_POLL_CNTL  734 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 		WREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i], wptr_poll_cntl);
mmSDMA0_GFX_RB_WPTR_POLL_CNTL   90 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
mmSDMA0_GFX_RB_WPTR_POLL_CNTL  134 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
mmSDMA0_GFX_RB_WPTR_POLL_CNTL  155 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
mmSDMA0_GFX_RB_WPTR_POLL_CNTL  252 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
mmSDMA0_GFX_RB_WPTR_POLL_CNTL 1043 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	wptr_poll_cntl = RREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL);
mmSDMA0_GFX_RB_WPTR_POLL_CNTL 1047 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, wptr_poll_cntl);
mmSDMA0_GFX_RB_WPTR_POLL_CNTL   66 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
mmSDMA0_GFX_RB_WPTR_POLL_CNTL  664 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c 							 mmSDMA0_GFX_RB_WPTR_POLL_CNTL));
mmSDMA0_GFX_RB_WPTR_POLL_CNTL  668 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c 		WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL),