mmLB_INTERRUPT_MASK 2965 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);
mmLB_INTERRUPT_MASK 2968 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);
mmLB_INTERRUPT_MASK 2971 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);
mmLB_INTERRUPT_MASK 2974 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);
mmLB_INTERRUPT_MASK 2994 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);
mmLB_INTERRUPT_MASK 2997 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);
mmLB_INTERRUPT_MASK 3000 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);
mmLB_INTERRUPT_MASK 3003 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);
mmLB_INTERRUPT_MASK 3091 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);
mmLB_INTERRUPT_MASK 3094 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);
mmLB_INTERRUPT_MASK 3097 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);
mmLB_INTERRUPT_MASK 3100 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);
mmLB_INTERRUPT_MASK 3120 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);
mmLB_INTERRUPT_MASK 3123 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);
mmLB_INTERRUPT_MASK 3126 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);
mmLB_INTERRUPT_MASK 3129 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);
mmLB_INTERRUPT_MASK 2877 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block);
mmLB_INTERRUPT_MASK 2879 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 		WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);
mmLB_INTERRUPT_MASK 2882 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block);
mmLB_INTERRUPT_MASK 2884 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 		WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);
mmLB_INTERRUPT_MASK 2928 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block);
mmLB_INTERRUPT_MASK 2930 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 		WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);
mmLB_INTERRUPT_MASK 2933 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block);
mmLB_INTERRUPT_MASK 2935 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 		WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);