mmIH_RB_CNTL_RING1   64 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 		ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);
mmIH_RB_CNTL_RING1   74 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 			WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl);
mmIH_RB_CNTL_RING1  125 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 		ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);
mmIH_RB_CNTL_RING1  135 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 			WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl);
mmIH_RB_CNTL_RING1  280 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 		ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);
mmIH_RB_CNTL_RING1  293 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 			WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl);
mmIH_RB_CNTL_RING1  413 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 		reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL_RING1);