mmIH_RB_CNTL 63 drivers/gpu/drm/amd/amdgpu/cik_ih.c u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); mmIH_RB_CNTL 68 drivers/gpu/drm/amd/amdgpu/cik_ih.c WREG32(mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 81 drivers/gpu/drm/amd/amdgpu/cik_ih.c u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); mmIH_RB_CNTL 86 drivers/gpu/drm/amd/amdgpu/cik_ih.c WREG32(mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 139 drivers/gpu/drm/amd/amdgpu/cik_ih.c WREG32(mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 203 drivers/gpu/drm/amd/amdgpu/cik_ih.c tmp = RREG32(mmIH_RB_CNTL); mmIH_RB_CNTL 205 drivers/gpu/drm/amd/amdgpu/cik_ih.c WREG32(mmIH_RB_CNTL, tmp); mmIH_RB_CNTL 63 drivers/gpu/drm/amd/amdgpu/cz_ih.c u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); mmIH_RB_CNTL 68 drivers/gpu/drm/amd/amdgpu/cz_ih.c WREG32(mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 81 drivers/gpu/drm/amd/amdgpu/cz_ih.c u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); mmIH_RB_CNTL 86 drivers/gpu/drm/amd/amdgpu/cz_ih.c WREG32(mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 141 drivers/gpu/drm/amd/amdgpu/cz_ih.c WREG32(mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 205 drivers/gpu/drm/amd/amdgpu/cz_ih.c tmp = RREG32(mmIH_RB_CNTL); mmIH_RB_CNTL 207 drivers/gpu/drm/amd/amdgpu/cz_ih.c WREG32(mmIH_RB_CNTL, tmp); mmIH_RB_CNTL 63 drivers/gpu/drm/amd/amdgpu/iceland_ih.c u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); mmIH_RB_CNTL 68 drivers/gpu/drm/amd/amdgpu/iceland_ih.c WREG32(mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 81 drivers/gpu/drm/amd/amdgpu/iceland_ih.c u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); mmIH_RB_CNTL 86 drivers/gpu/drm/amd/amdgpu/iceland_ih.c WREG32(mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 141 drivers/gpu/drm/amd/amdgpu/iceland_ih.c WREG32(mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 205 drivers/gpu/drm/amd/amdgpu/iceland_ih.c tmp = RREG32(mmIH_RB_CNTL); mmIH_RB_CNTL 207 drivers/gpu/drm/amd/amdgpu/iceland_ih.c WREG32(mmIH_RB_CNTL, tmp); mmIH_RB_CNTL 47 drivers/gpu/drm/amd/amdgpu/navi10_ih.c u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); mmIH_RB_CNTL 51 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 64 drivers/gpu/drm/amd/amdgpu/navi10_ih.c u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); mmIH_RB_CNTL 68 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 126 drivers/gpu/drm/amd/amdgpu/navi10_ih.c ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); mmIH_RB_CNTL 140 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 236 drivers/gpu/drm/amd/amdgpu/navi10_ih.c reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL); mmIH_RB_CNTL 62 drivers/gpu/drm/amd/amdgpu/tonga_ih.c u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); mmIH_RB_CNTL 66 drivers/gpu/drm/amd/amdgpu/tonga_ih.c WREG32(mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 79 drivers/gpu/drm/amd/amdgpu/tonga_ih.c u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); mmIH_RB_CNTL 83 drivers/gpu/drm/amd/amdgpu/tonga_ih.c WREG32(mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 135 drivers/gpu/drm/amd/amdgpu/tonga_ih.c WREG32(mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 207 drivers/gpu/drm/amd/amdgpu/tonga_ih.c tmp = RREG32(mmIH_RB_CNTL); mmIH_RB_CNTL 209 drivers/gpu/drm/amd/amdgpu/tonga_ih.c WREG32(mmIH_RB_CNTL, tmp); mmIH_RB_CNTL 49 drivers/gpu/drm/amd/amdgpu/vega10_ih.c u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); mmIH_RB_CNTL 59 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 105 drivers/gpu/drm/amd/amdgpu/vega10_ih.c u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); mmIH_RB_CNTL 115 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 236 drivers/gpu/drm/amd/amdgpu/vega10_ih.c ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); mmIH_RB_CNTL 253 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); mmIH_RB_CNTL 411 drivers/gpu/drm/amd/amdgpu/vega10_ih.c reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL);