mmGRPH_INTERRUPT_CONTROL 3100 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	reg = RREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type]);
mmGRPH_INTERRUPT_CONTROL 3102 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],
mmGRPH_INTERRUPT_CONTROL 3105 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],
mmGRPH_INTERRUPT_CONTROL 3226 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	reg = RREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type]);
mmGRPH_INTERRUPT_CONTROL 3228 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],
mmGRPH_INTERRUPT_CONTROL 3231 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],
mmGRPH_INTERRUPT_CONTROL 2977 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	reg = RREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type]);
mmGRPH_INTERRUPT_CONTROL 2979 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 		WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],
mmGRPH_INTERRUPT_CONTROL 2982 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 		WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],
mmGRPH_INTERRUPT_CONTROL 3069 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	reg = RREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type]);
mmGRPH_INTERRUPT_CONTROL 3071 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 		WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],
mmGRPH_INTERRUPT_CONTROL 3074 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 		WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],