mmDC_HPD_INT_CONTROL 313 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); mmDC_HPD_INT_CONTROL 318 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); mmDC_HPD_INT_CONTROL 348 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); mmDC_HPD_INT_CONTROL 350 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); mmDC_HPD_INT_CONTROL 3024 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); mmDC_HPD_INT_CONTROL 3026 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); mmDC_HPD_INT_CONTROL 3029 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); mmDC_HPD_INT_CONTROL 3031 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); mmDC_HPD_INT_CONTROL 3174 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); mmDC_HPD_INT_CONTROL 3176 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); mmDC_HPD_INT_CONTROL 331 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); mmDC_HPD_INT_CONTROL 336 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); mmDC_HPD_INT_CONTROL 366 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]); mmDC_HPD_INT_CONTROL 368 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp); mmDC_HPD_INT_CONTROL 3150 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); mmDC_HPD_INT_CONTROL 3152 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); mmDC_HPD_INT_CONTROL 3155 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); mmDC_HPD_INT_CONTROL 3157 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp); mmDC_HPD_INT_CONTROL 3300 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd]); mmDC_HPD_INT_CONTROL 3302 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp);