mmDCP_GSL_CONTROL 1220 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	uint32_t address = DCP_REG(mmDCP_GSL_CONTROL);
mmDCP_GSL_CONTROL 1248 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	dm_write_reg(tg->ctx, CRTC_REG(mmDCP_GSL_CONTROL), value);
mmDCP_GSL_CONTROL 1321 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	uint32_t address = DCP_REG(mmDCP_GSL_CONTROL);