mmDCP0_GRPH_CONTROL  109 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		.dcp =  (mmDCP0_GRPH_CONTROL - mmGRPH_CONTROL),
mmDCP0_GRPH_CONTROL   49 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	.dcp_offset = (mmDCP0_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
mmDCP0_GRPH_CONTROL   55 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	.dcp_offset = (mmDCP1_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
mmDCP0_GRPH_CONTROL   61 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	.dcp_offset = (mmDCP2_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
mmDCP0_GRPH_CONTROL  120 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		.dcp =  (mmDCP0_GRPH_CONTROL - mmGRPH_CONTROL),
mmDCP0_GRPH_CONTROL   48 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	.dcp_offset = (mmDCP0_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
mmDCP0_GRPH_CONTROL   54 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	.dcp_offset = (mmDCP1_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
mmDCP0_GRPH_CONTROL   60 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	.dcp_offset = (mmDCP2_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
mmDCP0_GRPH_CONTROL  119 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		.dcp =  (mmDCP0_GRPH_CONTROL - mmGRPH_CONTROL),
mmDCP0_GRPH_CONTROL   54 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c 	.dcp = (mmDCP0_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
mmDCP0_GRPH_CONTROL   58 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c 	.dcp = (mmDCP1_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
mmDCP0_GRPH_CONTROL   62 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c 	.dcp = (mmDCP2_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
mmDCP0_GRPH_CONTROL   66 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c 	.dcp = (mmDCP3_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
mmDCP0_GRPH_CONTROL   70 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c 	.dcp = (mmDCP4_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),
mmDCP0_GRPH_CONTROL   74 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c 	.dcp = (mmDCP5_GRPH_CONTROL - mmDCP0_GRPH_CONTROL),