mmCRTC_CONTROL 414 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmCRTC_CONTROL + crtc_offsets[i]); mmCRTC_CONTROL 485 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c crtc_enabled = REG_GET_FIELD(RREG32(mmCRTC_CONTROL + crtc_offsets[i]), mmCRTC_CONTROL 489 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmCRTC_CONTROL + crtc_offsets[i]); mmCRTC_CONTROL 491 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmCRTC_CONTROL + crtc_offsets[i], tmp); mmCRTC_CONTROL 430 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmCRTC_CONTROL + crtc_offsets[i]); mmCRTC_CONTROL 511 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c crtc_enabled = REG_GET_FIELD(RREG32(mmCRTC_CONTROL + crtc_offsets[i]), mmCRTC_CONTROL 515 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmCRTC_CONTROL + crtc_offsets[i]); mmCRTC_CONTROL 517 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmCRTC_CONTROL + crtc_offsets[i], tmp); mmCRTC_CONTROL 382 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c crtc_enabled = RREG32(mmCRTC_CONTROL + crtc_offsets[i]) & mmCRTC_CONTROL 386 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c tmp = RREG32(mmCRTC_CONTROL + crtc_offsets[i]); mmCRTC_CONTROL 388 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmCRTC_CONTROL + crtc_offsets[i], tmp); mmCRTC_CONTROL 348 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (RREG32(mmCRTC_CONTROL + crtc_offsets[i]) & CRTC_CONTROL__CRTC_MASTER_EN_MASK) { mmCRTC_CONTROL 425 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c crtc_enabled = REG_GET_FIELD(RREG32(mmCRTC_CONTROL + crtc_offsets[i]), mmCRTC_CONTROL 429 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c tmp = RREG32(mmCRTC_CONTROL + crtc_offsets[i]); mmCRTC_CONTROL 431 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmCRTC_CONTROL + crtc_offsets[i], tmp); mmCRTC_CONTROL 108 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 112 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 116 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 120 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 124 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c .crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 128 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c .crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 119 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 123 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 127 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 131 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 135 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c .crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 139 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c .crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 111 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t address = CRTC_REG(mmCRTC_CONTROL); mmCRTC_CONTROL 2092 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c addr = CRTC_REG(mmCRTC_CONTROL); mmCRTC_CONTROL 595 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c uint32_t address = mmCRTC_CONTROL; mmCRTC_CONTROL 118 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 122 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 126 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 130 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 134 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c .crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 138 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c .crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 113 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 119 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 125 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 131 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 137 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c .crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL), mmCRTC_CONTROL 143 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c .crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL),