mmCP_INT_CNTL_RING0 1774 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	u32 tmp = RREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 1785 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	WREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0, tmp);
mmCP_INT_CNTL_RING0 4863 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 			cp_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 2260 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	u32 tmp = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 2270 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	WREG32(mmCP_INT_CNTL_RING0, tmp);
mmCP_INT_CNTL_RING0 3243 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 3245 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
mmCP_INT_CNTL_RING0 3248 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 3250 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
mmCP_INT_CNTL_RING0 3306 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 3308 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
mmCP_INT_CNTL_RING0 3311 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 3313 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
mmCP_INT_CNTL_RING0 3331 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 3333 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
mmCP_INT_CNTL_RING0 3336 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 3338 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
mmCP_INT_CNTL_RING0 3170 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	u32 tmp = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 3178 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	WREG32(mmCP_INT_CNTL_RING0, tmp);
mmCP_INT_CNTL_RING0 4709 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 4711 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
mmCP_INT_CNTL_RING0 4714 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 4716 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
mmCP_INT_CNTL_RING0 4783 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 4785 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
mmCP_INT_CNTL_RING0 4788 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 4790 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
mmCP_INT_CNTL_RING0 4808 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 4810 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
mmCP_INT_CNTL_RING0 4813 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 4815 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
mmCP_INT_CNTL_RING0 3908 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	u32 tmp = RREG32(mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 3915 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	WREG32(mmCP_INT_CNTL_RING0, tmp);
mmCP_INT_CNTL_RING0 2587 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	u32 tmp = RREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0);
mmCP_INT_CNTL_RING0 2594 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	WREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0, tmp);