mmCP_HQD_PQ_WPTR_HI  392 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 	     reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++)
mmCP_HQD_PQ_WPTR_HI  430 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 		WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI),
mmCP_HQD_PQ_WPTR_HI  475 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 	     reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++)
mmCP_HQD_PQ_WPTR_HI  293 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 	     reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++)
mmCP_HQD_PQ_WPTR_HI  331 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 		WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI),
mmCP_HQD_PQ_WPTR_HI  375 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 	     reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++)
mmCP_HQD_PQ_WPTR_HI 3428 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 		WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI,
mmCP_HQD_PQ_WPTR_HI 3478 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI,
mmCP_HQD_PQ_WPTR_HI 3588 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI,
mmCP_HQD_PQ_WPTR_HI 3638 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI,
mmCP_HQD_PQ_WPTR_HI 3690 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI, 0);