mmCP_HQD_PQ_DOORBELL_CONTROL  399 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 	WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL), data);
mmCP_HQD_PQ_DOORBELL_CONTROL  354 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 	WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, data);
mmCP_HQD_PQ_DOORBELL_CONTROL  556 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 	WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, 0);
mmCP_HQD_PQ_DOORBELL_CONTROL  339 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 	WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, data);
mmCP_HQD_PQ_DOORBELL_CONTROL  300 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 	WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL), data);
mmCP_HQD_PQ_DOORBELL_CONTROL 3287 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL);
mmCP_HQD_PQ_DOORBELL_CONTROL 3355 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 		tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL);
mmCP_HQD_PQ_DOORBELL_CONTROL 3411 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,
mmCP_HQD_PQ_DOORBELL_CONTROL 3472 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,
mmCP_HQD_PQ_DOORBELL_CONTROL 2947 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
mmCP_HQD_PQ_DOORBELL_CONTROL 3002 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 			RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
mmCP_HQD_PQ_DOORBELL_CONTROL 4487 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	tmp = REG_SET_FIELD(RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL),
mmCP_HQD_PQ_DOORBELL_CONTROL 4537 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
mmCP_HQD_PQ_DOORBELL_CONTROL 3448 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL);
mmCP_HQD_PQ_DOORBELL_CONTROL 3516 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL);
mmCP_HQD_PQ_DOORBELL_CONTROL 3571 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,
mmCP_HQD_PQ_DOORBELL_CONTROL 3632 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,
mmCP_HQD_PQ_DOORBELL_CONTROL 3687 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0x40000000);
mmCP_HQD_PQ_DOORBELL_CONTROL 3688 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0);