mmCPC_INT_CNTL    300 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 	WREG32(SOC15_REG_OFFSET(GC, 0, mmCPC_INT_CNTL),
mmCPC_INT_CNTL    298 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 	WREG32(mmCPC_INT_CNTL, CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK |
mmCPC_INT_CNTL    255 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 	WREG32(mmCPC_INT_CNTL, CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK |
mmCPC_INT_CNTL    220 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 	WREG32(SOC15_REG_OFFSET(GC, 0, mmCPC_INT_CNTL),
mmCPC_INT_CNTL   5131 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 			tmp = RREG32_SOC15(GC, 0, mmCPC_INT_CNTL);
mmCPC_INT_CNTL   5134 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 			WREG32_SOC15(GC, 0, mmCPC_INT_CNTL, tmp);
mmCPC_INT_CNTL   5141 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 			tmp = RREG32_SOC15(GC, 0, mmCPC_INT_CNTL);
mmCPC_INT_CNTL   5144 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 			WREG32_SOC15(GC, 0, mmCPC_INT_CNTL, tmp);