mfdcri 673 arch/powerpc/platforms/4xx/pci.c val = mfdcri(SDR0, port->sdr_base + sdr_offset); mfdcri 735 arch/powerpc/platforms/4xx/pci.c if (!(mfdcri(SDR0, PESDR0_PLLLCT1) & 0x01000000)) { mfdcri 748 arch/powerpc/platforms/4xx/pci.c valPE0 = mfdcri(SDR0, PESDR0_440SPE_RCSSET); mfdcri 749 arch/powerpc/platforms/4xx/pci.c valPE1 = mfdcri(SDR0, PESDR1_440SPE_RCSSET); mfdcri 750 arch/powerpc/platforms/4xx/pci.c valPE2 = mfdcri(SDR0, PESDR2_440SPE_RCSSET); mfdcri 815 arch/powerpc/platforms/4xx/pci.c if (!(mfdcri(SDR0, PESDR0_PLLLCT2) & 0x10000)) { mfdcri 818 arch/powerpc/platforms/4xx/pci.c mfdcri(SDR0, PESDR0_PLLLCT2)); mfdcri 827 arch/powerpc/platforms/4xx/pci.c if (!(mfdcri(SDR0, PESDR0_PLLLCT3) & 0x10000000)) { mfdcri 997 arch/powerpc/platforms/4xx/pci.c mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) | mfdcri 1004 arch/powerpc/platforms/4xx/pci.c while (!(mfdcri(SDR0, PESDR0_460EX_RSTSTA) & 0x1)) mfdcri 1008 arch/powerpc/platforms/4xx/pci.c while (!(mfdcri(SDR0, PESDR1_460EX_RSTSTA) & 0x1)) mfdcri 1014 arch/powerpc/platforms/4xx/pci.c (mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) & mfdcri 1093 arch/powerpc/platforms/4xx/pci.c mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) | mfdcri 1103 arch/powerpc/platforms/4xx/pci.c (mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) & mfdcri 1195 arch/powerpc/platforms/4xx/pci.c if (((mfdcri(SDR0, PESDR1_460SX_HSSCTLSET) & 0x00000001) == mfdcri 1292 arch/powerpc/platforms/4xx/pci.c while (!(mfdcri(SDR0, port->sdr_base + PESDRn_405EX_PHYSTA) & 0x00001000)) mfdcri 1323 arch/powerpc/platforms/4xx/pci.c val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP); mfdcri 1389 drivers/crypto/amcc/crypto4xx_core.c mfdcri(SDR0, PPC460EX_SDR0_SRST) | PPC460EX_CE_RESET); mfdcri 1391 drivers/crypto/amcc/crypto4xx_core.c mfdcri(SDR0, PPC460EX_SDR0_SRST) & ~PPC460EX_CE_RESET); mfdcri 1395 drivers/crypto/amcc/crypto4xx_core.c mfdcri(SDR0, PPC405EX_SDR0_SRST) | PPC405EX_CE_RESET); mfdcri 1397 drivers/crypto/amcc/crypto4xx_core.c mfdcri(SDR0, PPC405EX_SDR0_SRST) & ~PPC405EX_CE_RESET); mfdcri 1402 drivers/crypto/amcc/crypto4xx_core.c mfdcri(SDR0, PPC460SX_SDR0_SRST) | PPC460SX_CE_RESET); mfdcri 1404 drivers/crypto/amcc/crypto4xx_core.c mfdcri(SDR0, PPC460SX_SDR0_SRST) & ~PPC460SX_CE_RESET); mfdcri 284 drivers/net/ethernet/ibm/emac/mal.c (mfdcri(SDR0, DCRN_SDR_ICINTSTAT) | ICINTSTAT_ICTX)); mfdcri 304 drivers/net/ethernet/ibm/emac/mal.c (mfdcri(SDR0, DCRN_SDR_ICINTSTAT) | ICINTSTAT_ICRX));