meson_crtc 40 drivers/gpu/drm/meson/meson_crtc.c #define to_meson_crtc(x) container_of(x, struct meson_crtc, base) meson_crtc 46 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); meson_crtc 47 drivers/gpu/drm/meson/meson_crtc.c struct meson_drm *priv = meson_crtc->priv; meson_crtc 56 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); meson_crtc 57 drivers/gpu/drm/meson/meson_crtc.c struct meson_drm *priv = meson_crtc->priv; meson_crtc 77 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); meson_crtc 79 drivers/gpu/drm/meson/meson_crtc.c struct meson_drm *priv = meson_crtc->priv; meson_crtc 113 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); meson_crtc 115 drivers/gpu/drm/meson/meson_crtc.c struct meson_drm *priv = meson_crtc->priv; meson_crtc 141 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); meson_crtc 142 drivers/gpu/drm/meson/meson_crtc.c struct meson_drm *priv = meson_crtc->priv; meson_crtc 166 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); meson_crtc 167 drivers/gpu/drm/meson/meson_crtc.c struct meson_drm *priv = meson_crtc->priv; meson_crtc 196 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); meson_crtc 203 drivers/gpu/drm/meson/meson_crtc.c meson_crtc->event = crtc->state->event; meson_crtc 212 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); meson_crtc 213 drivers/gpu/drm/meson/meson_crtc.c struct meson_drm *priv = meson_crtc->priv; meson_crtc 277 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(priv->crtc); meson_crtc 321 drivers/gpu/drm/meson/meson_crtc.c if (meson_crtc->enable_osd1) meson_crtc 322 drivers/gpu/drm/meson/meson_crtc.c meson_crtc->enable_osd1(priv); meson_crtc 363 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 366 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 369 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 372 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 375 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 378 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 381 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 384 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 387 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 390 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 393 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 396 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 399 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 402 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 405 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 408 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 411 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 414 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 417 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 420 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 423 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 426 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 429 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 432 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 435 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 438 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 441 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 444 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 447 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 450 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 453 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 456 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 459 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 462 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 465 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 468 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 471 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 473 drivers/gpu/drm/meson/meson_crtc.c writel_relaxed(0, priv->io_base + meson_crtc->viu_offset + meson_crtc 475 drivers/gpu/drm/meson/meson_crtc.c writel_relaxed(0, priv->io_base + meson_crtc->viu_offset + meson_crtc 477 drivers/gpu/drm/meson/meson_crtc.c writel_relaxed(0, priv->io_base + meson_crtc->viu_offset + meson_crtc 479 drivers/gpu/drm/meson/meson_crtc.c writel_relaxed(0, priv->io_base + meson_crtc->viu_offset + meson_crtc 482 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 485 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 488 drivers/gpu/drm/meson/meson_crtc.c priv->io_base + meson_crtc->viu_offset + meson_crtc 540 drivers/gpu/drm/meson/meson_crtc.c if (meson_crtc->enable_vd1) meson_crtc 541 drivers/gpu/drm/meson/meson_crtc.c meson_crtc->enable_vd1(priv); meson_crtc 549 drivers/gpu/drm/meson/meson_crtc.c if (meson_crtc->event) { meson_crtc 550 drivers/gpu/drm/meson/meson_crtc.c drm_crtc_send_vblank_event(priv->crtc, meson_crtc->event); meson_crtc 552 drivers/gpu/drm/meson/meson_crtc.c meson_crtc->event = NULL; meson_crtc 559 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc; meson_crtc 563 drivers/gpu/drm/meson/meson_crtc.c meson_crtc = devm_kzalloc(priv->drm->dev, sizeof(*meson_crtc), meson_crtc 565 drivers/gpu/drm/meson/meson_crtc.c if (!meson_crtc) meson_crtc 568 drivers/gpu/drm/meson/meson_crtc.c meson_crtc->priv = priv; meson_crtc 569 drivers/gpu/drm/meson/meson_crtc.c crtc = &meson_crtc->base; meson_crtc 579 drivers/gpu/drm/meson/meson_crtc.c meson_crtc->enable_osd1 = meson_g12a_crtc_enable_osd1; meson_crtc 580 drivers/gpu/drm/meson/meson_crtc.c meson_crtc->enable_vd1 = meson_g12a_crtc_enable_vd1; meson_crtc 581 drivers/gpu/drm/meson/meson_crtc.c meson_crtc->viu_offset = MESON_G12A_VIU_OFFSET; meson_crtc 584 drivers/gpu/drm/meson/meson_crtc.c meson_crtc->enable_osd1 = meson_crtc_enable_osd1; meson_crtc 585 drivers/gpu/drm/meson/meson_crtc.c meson_crtc->enable_vd1 = meson_crtc_enable_vd1;