memory_exclude_page 1027 arch/mips/cavium-octeon/setup.c 			memory_exclude_page(CVMX_PCIE_BAR1_PHYS_BASE,
memory_exclude_page 1029 arch/mips/cavium-octeon/setup.c 			memory_exclude_page(CVMX_PCIE_BAR1_PHYS_BASE +