mdp5_encoder       22 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c static void bs_set(struct mdp5_encoder *mdp5_cmd_enc, int idx)
mdp5_encoder       35 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c static void bs_set(struct mdp5_encoder *mdp5_cmd_enc, int idx) {}
mdp5_encoder      136 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c 	struct mdp5_encoder *mdp5_cmd_enc = to_mdp5_encoder(encoder);
mdp5_encoder      156 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c 	struct mdp5_encoder *mdp5_cmd_enc = to_mdp5_encoder(encoder);
mdp5_encoder      178 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c 	struct mdp5_encoder *mdp5_cmd_enc = to_mdp5_encoder(encoder);
mdp5_encoder       48 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c static void bs_init(struct mdp5_encoder *mdp5_encoder)
mdp5_encoder       50 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	mdp5_encoder->bsc = msm_bus_scale_register_client(
mdp5_encoder       52 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	DBG("bus scale client: %08x", mdp5_encoder->bsc);
mdp5_encoder       55 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c static void bs_fini(struct mdp5_encoder *mdp5_encoder)
mdp5_encoder       57 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	if (mdp5_encoder->bsc) {
mdp5_encoder       58 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 		msm_bus_scale_unregister_client(mdp5_encoder->bsc);
mdp5_encoder       59 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 		mdp5_encoder->bsc = 0;
mdp5_encoder       63 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c static void bs_set(struct mdp5_encoder *mdp5_encoder, int idx)
mdp5_encoder       65 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	if (mdp5_encoder->bsc) {
mdp5_encoder       72 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 		msm_bus_scale_client_update_request(mdp5_encoder->bsc, idx);
mdp5_encoder       76 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c static void bs_init(struct mdp5_encoder *mdp5_encoder) {}
mdp5_encoder       77 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c static void bs_fini(struct mdp5_encoder *mdp5_encoder) {}
mdp5_encoder       78 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c static void bs_set(struct mdp5_encoder *mdp5_encoder, int idx) {}
mdp5_encoder       83 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);
mdp5_encoder       84 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	bs_fini(mdp5_encoder);
mdp5_encoder       86 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	kfree(mdp5_encoder);
mdp5_encoder       97 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);
mdp5_encoder      101 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	int intf = mdp5_encoder->intf->num;
mdp5_encoder      115 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	if (mdp5_encoder->intf->type != INTF_DSI) {
mdp5_encoder      160 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	if (mdp5_encoder->intf->type == INTF_eDP) {
mdp5_encoder      165 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	spin_lock_irqsave(&mdp5_encoder->intf_lock, flags);
mdp5_encoder      189 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags);
mdp5_encoder      196 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);
mdp5_encoder      198 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_ctl *ctl = mdp5_encoder->ctl;
mdp5_encoder      201 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_interface *intf = mdp5_encoder->intf;
mdp5_encoder      202 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	int intfn = mdp5_encoder->intf->num;
mdp5_encoder      205 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	if (WARN_ON(!mdp5_encoder->enabled))
mdp5_encoder      210 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	spin_lock_irqsave(&mdp5_encoder->intf_lock, flags);
mdp5_encoder      212 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags);
mdp5_encoder      225 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	bs_set(mdp5_encoder, 0);
mdp5_encoder      227 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	mdp5_encoder->enabled = false;
mdp5_encoder      232 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);
mdp5_encoder      234 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_ctl *ctl = mdp5_encoder->ctl;
mdp5_encoder      235 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_interface *intf = mdp5_encoder->intf;
mdp5_encoder      240 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	if (WARN_ON(mdp5_encoder->enabled))
mdp5_encoder      243 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	bs_set(mdp5_encoder, 1);
mdp5_encoder      244 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	spin_lock_irqsave(&mdp5_encoder->intf_lock, flags);
mdp5_encoder      246 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags);
mdp5_encoder      251 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	mdp5_encoder->enabled = true;
mdp5_encoder      258 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);
mdp5_encoder      259 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_interface *intf = mdp5_encoder->intf;
mdp5_encoder      269 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);
mdp5_encoder      270 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_interface *intf = mdp5_encoder->intf;
mdp5_encoder      280 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);
mdp5_encoder      281 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_interface *intf = mdp5_encoder->intf;
mdp5_encoder      297 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);
mdp5_encoder      299 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_interface *intf = mdp5_encoder->intf;
mdp5_encoder      300 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_ctl *ctl = mdp5_encoder->ctl;
mdp5_encoder      327 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);
mdp5_encoder      329 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	int intf = mdp5_encoder->intf->num;
mdp5_encoder      336 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);
mdp5_encoder      338 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	int intf = mdp5_encoder->intf->num;
mdp5_encoder      346 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);
mdp5_encoder      347 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_slave_enc = to_mdp5_encoder(slave_encoder);
mdp5_encoder      357 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	intf_num = mdp5_encoder->intf->num;
mdp5_encoder      378 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	mdp5_ctl_pair(mdp5_encoder->ctl, mdp5_slave_enc->ctl, true);
mdp5_encoder      387 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder = to_mdp5_encoder(encoder);
mdp5_encoder      388 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_interface *intf = mdp5_encoder->intf;
mdp5_encoder      408 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	struct mdp5_encoder *mdp5_encoder;
mdp5_encoder      413 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	mdp5_encoder = kzalloc(sizeof(*mdp5_encoder), GFP_KERNEL);
mdp5_encoder      414 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	if (!mdp5_encoder) {
mdp5_encoder      419 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	encoder = &mdp5_encoder->base;
mdp5_encoder      420 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	mdp5_encoder->ctl = ctl;
mdp5_encoder      421 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	mdp5_encoder->intf = intf;
mdp5_encoder      423 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	spin_lock_init(&mdp5_encoder->intf_lock);
mdp5_encoder      429 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	bs_init(mdp5_encoder);
mdp5_encoder      168 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h #define to_mdp5_encoder(x) container_of(x, struct mdp5_encoder, base)